include/configs/MVBLUE.h

   1 /*
   2  * (C) Copyright 2001
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24
  25 #ifndef __CONFIG_H
  26 #define __CONFIG_H
  27
  28 #define MV_VERSION      "v0.2.0"
  29
  30 /* LED0 = Power , LED1 = Error , LED2-5 = error code, LED6-7=00 -->PPCBoot error */
  31 #define ERR_NONE                0
  32 #define ERR_ENV                 1
  33 #define ERR_BOOTM_BADMAGIC      2
  34 #define ERR_BOOTM_BADCRC        3
  35 #define ERR_BOOTM_GUNZIP        4
  36 #define ERR_BOOTP_TIMEOUT       5
  37 #define ERR_DHCP                6
  38 #define ERR_TFTP                7
  39 #define ERR_NOLAN               8
  40 #define ERR_LANDRV              9
  41
  42 #define CONFIG_BOARD_TYPES      1
  43 #define MVBLUE_BOARD_BOX        1
  44 #define MVBLUE_BOARD_LYNX       2
  45
  46 #define CONFIG_SYS_TEXT_BASE    0xFFF00000
  47 #define CONFIG_SYS_LDSCRIPT     "board/mvblue/u-boot.lds"
  48
  49 #if 0
  50 #define ERR_LED(code)   do { if (code) \
  51                 *(volatile char *)(0xff000003) = ( 3 | (code<<4) ) & 0xf3; \
  52         else \
  53                 *(volatile char *)(0xff000003) = ( 1 ); \
  54 } while(0)
  55 #else
  56 #define ERR_LED(code)
  57 #endif
  58
  59 #define CONFIG_MPC824X          1
  60 #define CONFIG_MPC8245          1
  61 #define CONFIG_MVBLUE           1
  62
  63 #define CONFIG_CLOCKS_IN_MHZ    1
  64
  65 #define CONFIG_BOARD_TYPES      1
  66
  67 #define CONFIG_CONS_INDEX       1
  68 #define CONFIG_BAUDRATE         115200
  69 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
  70
  71 #define CONFIG_BOOTDELAY        3
  72 #define CONFIG_BOOT_RETRY_TIME  -1
  73
  74 #define CONFIG_AUTOBOOT_KEYED
  75 #define CONFIG_AUTOBOOT_PROMPT          \
  76         "autoboot in %d seconds (stop with 's')...\n", bootdelay
  77 #define CONFIG_AUTOBOOT_STOP_STR        "s"
  78 #define CONFIG_ZERO_BOOTDELAY_CHECK
  79 #define CONFIG_RESET_TO_RETRY           60
  80
  81
  82 /*
  83  * Command line configuration.
  84  */
  85
  86 #define CONFIG_CMD_ASKENV
  87 #define CONFIG_CMD_BOOTD
  88 #define CONFIG_CMD_CACHE
  89 #define CONFIG_CMD_DHCP
  90 #define CONFIG_CMD_ECHO
  91 #define CONFIG_CMD_SAVEENV
  92 #define CONFIG_CMD_FLASH
  93 #define CONFIG_CMD_IMI
  94 #define CONFIG_CMD_NET
  95 #define CONFIG_CMD_PCI
  96 #define CONFIG_CMD_RUN
  97
  98
  99 /*
 100  * BOOTP options
 101  */
 102 #define CONFIG_BOOTP_SUBNETMASK
 103 #define CONFIG_BOOTP_GATEWAY
 104 #define CONFIG_BOOTP_HOSTNAME
 105 #define CONFIG_BOOTP_BOOTPATH
 106 #define CONFIG_BOOTP_BOOTFILESIZE
 107 #define CONFIG_BOOTP_SUBNETMASK
 108 #define CONFIG_BOOTP_GATEWAY
 109 #define CONFIG_BOOTP_HOSTNAME
 110 #define CONFIG_BOOTP_NISDOMAIN
 111 #define CONFIG_BOOTP_BOOTPATH
 112 #define CONFIG_BOOTP_DNS
 113 #define CONFIG_BOOTP_DNS2
 114 #define CONFIG_BOOTP_SEND_HOSTNAME
 115 #define CONFIG_BOOTP_NTPSERVER
 116 #define CONFIG_BOOTP_TIMEOFFSET
 117
 118
 119 /*
 120  * Miscellaneous configurable options
 121  */
 122 #define CONFIG_SYS_LONGHELP                     /* undef to save memory         */
 123 #define CONFIG_SYS_PROMPT       "=> "           /* Monitor Command Prompt       */
 124 #define CONFIG_SYS_CBSIZE       256             /* Console I/O Buffer Size      */
 125
 126 #define CONFIG_SYS_PBSIZE       (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 127 #define CONFIG_SYS_MAXARGS      16              /* Max number of command args   */
 128 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size    */
 129 #define CONFIG_SYS_LOAD_ADDR    0x00100000      /* Default load address                 */
 130
 131 #define CONFIG_BOOTCOMMAND      "run nfsboot"
 132 #define CONFIG_BOOTARGS                 "root=/dev/mtdblock5 ro rootfstype=jffs2"
 133
 134 #define CONFIG_NFSBOOTCOMMAND   "bootp; run nfsargs addcons;bootm"
 135
 136 #define CONFIG_EXTRA_ENV_SETTINGS                       \
 137         "console_nr=0\0"                                \
 138     "dhcp_client_id=mvBOX-XP\0"                         \
 139     "dhcp_vendor-class-identifier=mvBOX\0"              \
 140     "adminboot=setenv bootargs root=/dev/mtdblock5 rw rootfstype=jffs2;run addcons;bootm ffc00000\0"    \
 141     "flashboot=setenv bootargs root=/dev/mtdblock5 ro rootfstype=jffs2;run addcons;bootm ffc00000\0"    \
 142     "safeboot=setenv bootargs root=/dev/mtdblock2 rw rootfstype=cramfs;run addcons;bootm ffc00000\0"    \
 143     "hdboot=setenv bootargs root=/dev/hda1;run addcons;bootm ffc00000\0"        \
 144         "nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} "     \
 145                         "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off\0"   \
 146         "addcons=setenv bootargs ${bootargs} console=ttyS${console_nr},${baudrate}N8\0" \
 147     "mv_version=" MV_VERSION "\0"       \
 148         "bootretry=30\0"
 149
 150 #define CONFIG_OVERWRITE_ETHADDR_ONCE
 151
 152 /*-----------------------------------------------------------------------
 153  * PCI stuff
 154  *-----------------------------------------------------------------------
 155  */
 156
 157 #define CONFIG_PCI
 158 #define CONFIG_PCI_PNP
 159 #define CONFIG_PCI_SCAN_SHOW
 160
 161 #define CONFIG_NET_MULTI
 162 #define CONFIG_NET_RETRY_COUNT          5
 163
 164 #define CONFIG_TULIP
 165 #define CONFIG_TULIP_FIX_DAVICOM        1
 166 #define CONFIG_ETHADDR                  b6:b4:45:eb:fb:c0
 167
 168 #define CONFIG_HW_WATCHDOG
 169
 170 /*-----------------------------------------------------------------------
 171  * Start addresses for the final memory configuration
 172  * (Set up by the startup code)
 173  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
 174  */
 175 #define CONFIG_SYS_SDRAM_BASE       0x00000000
 176
 177 #define CONFIG_SYS_FLASH_BASE      0xFFF00000
 178 #define CONFIG_SYS_MONITOR_BASE    CONFIG_SYS_TEXT_BASE
 179
 180 #define CONFIG_SYS_RESET_ADDRESS   0xFFF00100
 181 #define CONFIG_SYS_EUMB_ADDR        0xFC000000
 182
 183 #define CONFIG_SYS_MONITOR_LEN     0x00100000
 184 #define CONFIG_SYS_MALLOC_LEN      (512 << 10) /* Reserve some kB for malloc()  */
 185
 186 #define CONFIG_SYS_MEMTEST_START   0x00100000   /* memtest works on             */
 187 #define CONFIG_SYS_MEMTEST_END      0x00800000  /* 1M ... 8M in DRAM            */
 188
 189 /* Maximum amount of RAM.  */
 190 #define CONFIG_SYS_MAX_RAM_SIZE    0x10000000   /* 0 .. 256MB of (S)DRAM */
 191
 192
 193 #if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
 194 #undef CONFIG_SYS_RAMBOOT
 195 #else
 196 #define CONFIG_SYS_RAMBOOT
 197 #endif
 198
 199 #define CONFIG_SYS_ISA_IO      0xFE000000
 200
 201 /*
 202  * serial configuration
 203  */
 204 #define CONFIG_SYS_NS16550
 205 #define CONFIG_SYS_NS16550_SERIAL
 206
 207 #define CONFIG_SYS_NS16550_REG_SIZE    1
 208
 209 #define CONFIG_SYS_NS16550_CLK     get_bus_freq(0)
 210
 211 #define CONFIG_SYS_NS16550_COM1    (CONFIG_SYS_EUMB_ADDR + 0x4500)
 212 #define CONFIG_SYS_NS16550_COM2    (CONFIG_SYS_EUMB_ADDR + 0x4600)
 213
 214 /*-----------------------------------------------------------------------
 215  * Definitions for initial stack pointer and data area
 216  */
 217 #define CONFIG_SYS_INIT_RAM_ADDR     0x40000000
 218 #define CONFIG_SYS_INIT_RAM_SIZE      0x1000
 219 #define CONFIG_SYS_GBL_DATA_OFFSET   (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 220
 221 /*
 222  * Low Level Configuration Settings
 223  * (address mappings, register initial values, etc.)
 224  * You should know what you are doing if you make changes here.
 225  * For the detail description refer to the MPC8240 user's manual.
 226  */
 227
 228 #define CONFIG_SYS_CLK_FREQ  33000000
 229 #define CONFIG_SYS_HZ                    10000
 230
 231 /* Bit-field values for MCCR1.  */
 232 #define CONFIG_SYS_ROMNAL      7
 233 #define CONFIG_SYS_ROMFAL      11
 234
 235 /* Bit-field values for MCCR2.  */
 236 #define CONFIG_SYS_TSWAIT      0x5
 237 #define CONFIG_SYS_REFINT      430
 238
 239 /* Burst To Precharge. Bits of this value go to MCCR3 and MCCR4.  */
 240 #define CONFIG_SYS_BSTOPRE     121
 241
 242 /* Bit-field values for MCCR3.  */
 243 #define CONFIG_SYS_REFREC      8
 244
 245 /* Bit-field values for MCCR4.  */
 246 #define CONFIG_SYS_PRETOACT    3
 247 #define CONFIG_SYS_ACTTOPRE    5
 248 #define CONFIG_SYS_ACTORW      3
 249 #define CONFIG_SYS_SDMODE_CAS_LAT  3
 250 #define CONFIG_SYS_REGISTERD_TYPE_BUFFER 1
 251 #define CONFIG_SYS_EXTROM      1
 252 #define CONFIG_SYS_REGDIMM     0
 253 #define CONFIG_SYS_DBUS_SIZE2  1
 254 #define CONFIG_SYS_SDMODE_WRAP 0
 255
 256 #define CONFIG_SYS_PGMAX       0x32
 257 #define CONFIG_SYS_SDRAM_DSCD  0x20
 258
 259 /* Memory bank settings.
 260  * Only bits 20-29 are actually used from these vales to set the
 261  * start/end addresses. The upper two bits will always be 0, and the lower
 262  * 20 bits will be 0x00000 for a start address, or 0xfffff for an end
 263  * address. Refer to the MPC8240 book.
 264  */
 265
 266 #define CONFIG_SYS_BANK0_START      0x00000000
 267 #define CONFIG_SYS_BANK0_END        (CONFIG_SYS_MAX_RAM_SIZE - 1)
 268 #define CONFIG_SYS_BANK0_ENABLE    1
 269 #define CONFIG_SYS_BANK1_START     0x3ff00000
 270 #define CONFIG_SYS_BANK1_END       0x3fffffff
 271 #define CONFIG_SYS_BANK1_ENABLE    0
 272 #define CONFIG_SYS_BANK2_START     0x3ff00000
 273 #define CONFIG_SYS_BANK2_END       0x3fffffff
 274 #define CONFIG_SYS_BANK2_ENABLE    0
 275 #define CONFIG_SYS_BANK3_START     0x3ff00000
 276 #define CONFIG_SYS_BANK3_END       0x3fffffff
 277 #define CONFIG_SYS_BANK3_ENABLE    0
 278 #define CONFIG_SYS_BANK4_START     0x3ff00000
 279 #define CONFIG_SYS_BANK4_END       0x3fffffff
 280 #define CONFIG_SYS_BANK4_ENABLE    0
 281 #define CONFIG_SYS_BANK5_START     0x3ff00000
 282 #define CONFIG_SYS_BANK5_END       0x3fffffff
 283 #define CONFIG_SYS_BANK5_ENABLE    0
 284 #define CONFIG_SYS_BANK6_START     0x3ff00000
 285 #define CONFIG_SYS_BANK6_END       0x3fffffff
 286 #define CONFIG_SYS_BANK6_ENABLE    0
 287 #define CONFIG_SYS_BANK7_START     0x3ff00000
 288 #define CONFIG_SYS_BANK7_END       0x3fffffff
 289 #define CONFIG_SYS_BANK7_ENABLE    0
 290
 291 #define CONFIG_SYS_ODCR     0xff
 292
 293 #define CONFIG_SYS_IBAT0L  (CONFIG_SYS_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
 294 #define CONFIG_SYS_IBAT0U  (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
 295
 296 #define CONFIG_SYS_IBAT1L  (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_10 | BATL_MEMCOHERENCE)
 297 #define CONFIG_SYS_IBAT1U  (CONFIG_SYS_INIT_RAM_ADDR | BATU_BL_128K | BATU_VS | BATU_VP)
 298
 299 #define CONFIG_SYS_IBAT2L  (0x80000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
 300 #define CONFIG_SYS_IBAT2U  (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP)
 301
 302 #define CONFIG_SYS_IBAT3L  (0xF0000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
 303 #define CONFIG_SYS_IBAT3U  (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
 304
 305 #define CONFIG_SYS_DBAT0L  CONFIG_SYS_IBAT0L
 306 #define CONFIG_SYS_DBAT0U  CONFIG_SYS_IBAT0U
 307 #define CONFIG_SYS_DBAT1L  CONFIG_SYS_IBAT1L
 308 #define CONFIG_SYS_DBAT1U  CONFIG_SYS_IBAT1U
 309 #define CONFIG_SYS_DBAT2L  CONFIG_SYS_IBAT2L
 310 #define CONFIG_SYS_DBAT2U  CONFIG_SYS_IBAT2U
 311 #define CONFIG_SYS_DBAT3L  CONFIG_SYS_IBAT3L
 312 #define CONFIG_SYS_DBAT3U  CONFIG_SYS_IBAT3U
 313
 314 /*
 315  * For booting Linux, the board info and command line data
 316  * have to be in the first 8 MB of memory, since this is
 317  * the maximum mapped by the Linux kernel during initialization.
 318  */
 319 #define CONFIG_SYS_BOOTMAPSZ        (8 << 20)   /* Initial Memory map for Linux */
 320
 321 /*-----------------------------------------------------------------------
 322  * FLASH organization
 323  */
 324 #undef  CONFIG_SYS_FLASH_PROTECTION
 325 #define CONFIG_SYS_MAX_FLASH_BANKS              1       /* Max number of flash banks            */
 326 #define CONFIG_SYS_MAX_FLASH_SECT               63      /* Max number of sectors per flash      */
 327
 328 #define CONFIG_SYS_FLASH_ERASE_TOUT     12000
 329 #define CONFIG_SYS_FLASH_WRITE_TOUT     1000
 330
 331
 332 #define CONFIG_ENV_IS_IN_FLASH
 333
 334 #define CONFIG_ENV_OFFSET               0x00010000
 335 #define CONFIG_ENV_SIZE         0x00010000
 336 #define CONFIG_ENV_SECT_SIZE    0x00010000
 337
 338 /*-----------------------------------------------------------------------
 339  * Cache Configuration
 340  */
 341 #define CONFIG_SYS_CACHELINE_SIZE       32
 342 #if defined(CONFIG_CMD_KGDB)
 343 #define CONFIG_SYS_CACHELINE_SHIFT      5       /* log base 2 of the above value        */
 344 #endif
 345 #endif  /* __CONFIG_H */