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Makefile: move all Power Architecture boards into boards.cfg
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1 /*
2 * (C) Copyright 2003-2004
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * (C) Copyright 2004-2010
6 * Matrix-Vision GmbH, andre.schwarz@matrix-vision.de
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27 #ifndef __CONFIG_H
28 #define __CONFIG_H
29
30 #include <version.h>
31
32 #define CONFIG_MPC5xxx 1
33 #define CONFIG_MPC5200 1
34
35 #ifndef CONFIG_SYS_TEXT_BASE
36 #define CONFIG_SYS_TEXT_BASE 0xFF800000
37 #endif
38
39 #define CONFIG_SYS_MPC5XXX_CLKIN 33000000
40
41 #define BOOTFLAG_COLD 0x01
42 #define BOOTFLAG_WARM 0x02
43
44 #define CONFIG_MISC_INIT_R 1
45
46 #define CONFIG_SYS_CACHELINE_SIZE 32
47 #ifdef CONFIG_CMD_KGDB
48 #define CONFIG_SYS_CACHELINE_SHIFT 5
49 #endif
50
51 #define CONFIG_PSC_CONSOLE 1
52 #define CONFIG_BAUDRATE 115200
53 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200,\
54 230400}
55
56 #define CONFIG_PCI 1
57 #define CONFIG_PCI_PNP 1
58 #undef CONFIG_PCI_SCAN_SHOW
59 #define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
60
61 #define CONFIG_PCI_MEM_BUS 0x40000000
62 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
63 #define CONFIG_PCI_MEM_SIZE 0x10000000
64
65 #define CONFIG_PCI_IO_BUS 0x50000000
66 #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
67 #define CONFIG_PCI_IO_SIZE 0x01000000
68
69 #define CONFIG_SYS_XLB_PIPELINING 1
70 #define CONFIG_HIGH_BATS 1
71
72 #define MV_CI mvSMR
73 #define MV_VCI mvSMR
74 #define MV_FPGA_DATA 0xff840000
75 #define MV_FPGA_SIZE 0x1ff88
76 #define MV_KERNEL_ADDR 0xfff00000
77 #define MV_SCRIPT_ADDR 0xff806000
78 #define MV_INITRD_ADDR 0xff880000
79 #define MV_INITRD_LENGTH 0x00240000
80 #define MV_SCRATCH_ADDR 0xffcc0000
81 #define MV_SCRATCH_LENGTH MV_INITRD_LENGTH
82
83 #define CONFIG_SHOW_BOOT_PROGRESS 1
84
85 #define MV_KERNEL_ADDR_RAM 0x00100000
86 #define MV_INITRD_ADDR_RAM 0x00400000
87
88 /*
89 * Supported commands
90 */
91 #include <config_cmd_default.h>
92
93 #define CONFIG_CMD_CACHE
94 #define CONFIG_CMD_DHCP
95 #define CONFIG_CMD_FPGA
96 #define CONFIG_CMD_I2C
97 #define CONFIG_CMD_MII
98 #define CONFIG_CMD_NET
99 #define CONFIG_CMD_PCI
100 #define CONFIG_CMD_PING
101 #define CONFIG_CMD_SDRAM
102
103 #define CONFIG_BOOTP_BOOTFILESIZE
104 #define CONFIG_BOOTP_BOOTPATH
105 #define CONFIG_BOOTP_DNS
106 #define CONFIG_BOOTP_DNS2
107 #define CONFIG_BOOTP_GATEWAY
108 #define CONFIG_BOOTP_HOSTNAME
109 #define CONFIG_BOOTP_NTPSERVER
110 #define CONFIG_BOOTP_RANDOM_DELAY
111 #define CONFIG_BOOTP_SEND_HOSTNAME
112 #define CONFIG_BOOTP_SUBNETMASK
113 #define CONFIG_BOOTP_VENDOREX
114
115 /*
116 * Autoboot
117 */
118 #define CONFIG_BOOTDELAY 1
119 #define CONFIG_AUTOBOOT_KEYED
120 #define CONFIG_AUTOBOOT_STOP_STR "abcdefg"
121 #define CONFIG_ZERO_BOOTDELAY_CHECK
122
123 #define CONFIG_BOOTCOMMAND "source ${script_addr}"
124 #define CONFIG_BOOTARGS "root=/dev/ram ro rootfstype=squashfs" \
125 " allocate=6M"
126
127 #define XMK_STR(x) #x
128 #define MK_STR(x) XMK_STR(x)
129
130 #define CONFIG_EXTRA_ENV_SETTINGS \
131 "console_nr=0\0" \
132 "console=no\0" \
133 "stdin=serial\0" \
134 "stdout=serial\0" \
135 "stderr=serial\0" \
136 "fpga=0\0" \
137 "fpgadata=" MK_STR(MV_FPGA_DATA) "\0" \
138 "fpgadatasize=" MK_STR(MV_FPGA_SIZE) "\0" \
139 "mv_kernel_addr=" MK_STR(MV_KERNEL_ADDR) "\0" \
140 "mv_kernel_addr_ram=" MK_STR(MV_KERNEL_ADDR_RAM) "\0" \
141 "script_addr=" MK_STR(MV_SCRIPT_ADDR) "\0" \
142 "mv_initrd_addr=" MK_STR(MV_INITRD_ADDR) "\0" \
143 "mv_initrd_addr_ram=" MK_STR(MV_INITRD_ADDR_RAM) "\0" \
144 "mv_initrd_length=" MK_STR(MV_INITRD_LENGTH) "\0" \
145 "mv_scratch_addr=" MK_STR(MV_SCRATCH_ADDR) "\0" \
146 "mv_scratch_length=" MK_STR(MV_SCRATCH_LENGTH) "\0" \
147 "mv_version=" U_BOOT_VERSION "\0" \
148 "dhcp_client_id=" MK_STR(MV_CI) "\0" \
149 "dhcp_vendor-class-identifier=" MK_STR(MV_VCI) "\0" \
150 "netretry=no\0" \
151 "use_static_ipaddr=no\0" \
152 "static_ipaddr=192.168.0.101\0" \
153 "static_netmask=255.255.255.0\0" \
154 "static_gateway=0.0.0.0\0" \
155 "initrd_name=uInitrd.mvsmr-rfs\0" \
156 "zcip=yes\0" \
157 "netboot=no\0" \
158 ""
159
160 #undef XMK_STR
161 #undef MK_STR
162
163 /*
164 * IPB Bus clocking configuration.
165 */
166 #define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK
167
168 /*
169 * Flash configuration
170 */
171 #undef CONFIG_FLASH_16BIT
172 #define CONFIG_SYS_FLASH_CFI
173 #define CONFIG_FLASH_CFI_DRIVER
174 #define CONFIG_SYS_FLASH_CFI_AMD_RESET 1
175 #define CONFIG_SYS_FLASH_EMPTY_INFO
176
177 #define CONFIG_SYS_FLASH_ERASE_TOUT 50000
178 #define CONFIG_SYS_FLASH_WRITE_TOUT 1000
179
180 #define CONFIG_SYS_MAX_FLASH_BANKS 1
181 #define CONFIG_SYS_MAX_FLASH_SECT 256
182
183 #define CONFIG_SYS_LOWBOOT
184 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE
185 #define CONFIG_SYS_FLASH_SIZE 0x00800000
186
187 /*
188 * Environment settings
189 */
190 #define CONFIG_ENV_IS_IN_FLASH
191 #undef CONFIG_SYS_FLASH_PROTECTION
192 #define CONFIG_OVERWRITE_ETHADDR_ONCE
193
194 #define CONFIG_ENV_OFFSET 0x8000
195 #define CONFIG_ENV_SIZE 0x2000
196 #define CONFIG_ENV_SECT_SIZE 0x2000
197
198 /* used by linker script to wrap code around */
199 #define CONFIG_SCRIPT_OFFSET 0x6000
200 #define CONFIG_SCRIPT_SECT_SIZE 0x2000
201
202 /*
203 * Memory map
204 */
205 #define CONFIG_SYS_MBAR 0xF0000000
206 #define CONFIG_SYS_SDRAM_BASE 0x00000000
207 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
208
209 #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
210 #define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE
211
212 #define CONFIG_SYS_GBL_DATA_SIZE 128
213 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - \
214 CONFIG_SYS_GBL_DATA_SIZE)
215 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
216
217 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
218 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
219 #define CONFIG_SYS_RAMBOOT 1
220 #endif
221
222 /* CONFIG_SYS_MONITOR_LEN must be a multiple of CONFIG_ENV_SECT_SIZE */
223 #define CONFIG_SYS_MONITOR_LEN (512 << 10)
224 #define CONFIG_SYS_MALLOC_LEN (512 << 10)
225 #define CONFIG_SYS_BOOTMAPSZ (8 << 20)
226
227 /*
228 * I2C configuration
229 */
230 #define CONFIG_HARD_I2C 1
231 #define CONFIG_SYS_I2C_MODULE 1
232 #define CONFIG_SYS_I2C_SPEED 86000
233 #define CONFIG_SYS_I2C_SLAVE 0x7F
234
235 /*
236 * Ethernet configuration
237 */
238 #define CONFIG_NET_RETRY_COUNT 5
239
240 #define CONFIG_MPC5xxx_FEC
241 #define CONFIG_MPC5xxx_FEC_MII100
242 #define CONFIG_PHY_ADDR 0x00
243 #define CONFIG_NETDEV eth0
244
245 /*
246 * Miscellaneous configurable options
247 */
248 #define CONFIG_SYS_HUSH_PARSER
249 #define CONFIG_CMDLINE_EDITING
250 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
251 #undef CONFIG_SYS_LONGHELP
252 #define CONFIG_SYS_PROMPT "=> "
253 #ifdef CONFIG_CMD_KGDB
254 #define CONFIG_SYS_CBSIZE 1024
255 #else
256 #define CONFIG_SYS_CBSIZE 256
257 #endif
258 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
259 #define CONFIG_SYS_MAXARGS 16
260 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
261
262 #define CONFIG_SYS_MEMTEST_START 0x00800000
263 #define CONFIG_SYS_MEMTEST_END 0x02f00000
264
265 #define CONFIG_SYS_HZ 1000
266
267 /* default load address */
268 #define CONFIG_SYS_LOAD_ADDR 0x02000000
269 /* default location for tftp and bootm */
270 #define CONFIG_LOADADDR 0x00200000
271
272 /*
273 * Various low-level settings
274 */
275 #define CONFIG_SYS_GPS_PORT_CONFIG 0x00050044
276
277 #define CONFIG_SYS_HID0_INIT (HID0_ICE | HID0_ICFI)
278 #define CONFIG_SYS_HID0_FINAL HID0_ICE
279
280 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
281 #define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
282 #define CONFIG_SYS_BOOTCS_CFG 0x00047800
283 #define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
284 #define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
285
286 #define CONFIG_SYS_CS_BURST 0x000000f0
287 #define CONFIG_SYS_CS_DEADCYCLE 0x33333303
288
289 #define CONFIG_SYS_RESET_ADDRESS 0x00000100
290
291 #undef FPGA_DEBUG
292 #undef CONFIG_SYS_FPGA_PROG_FEEDBACK
293 #define CONFIG_FPGA CONFIG_SYS_XILINX_SPARTAN2
294 #define CONFIG_FPGA_XILINX 1
295 #define CONFIG_FPGA_SPARTAN2 1
296 #define CONFIG_FPGA_COUNT 1
297
298 #endif