include/configs/PIP405.h

   1 /*
   2  * (C) Copyright 2001
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 /*
  25  * board/config.h - configuration options, board specific
  26  */
  27
  28 #ifndef __CONFIG_H
  29 #define __CONFIG_H
  30
  31 /***********************************************************
  32  * High Level Configuration Options
  33  * (easy to change)
  34  ***********************************************************/
  35 #define CONFIG_405GP            1       /* This is a PPC405 CPU         */
  36 #define CONFIG_4xx              1       /* ...member of PPC4xx family   */
  37 #define CONFIG_PIP405           1       /* ...on a PIP405 board         */
  38 /***********************************************************
  39  * Clock
  40  ***********************************************************/
  41 #define CONFIG_SYS_CLK_FREQ     33000000 /* external frequency to pll   */
  42
  43
  44 /*
  45  * BOOTP options
  46  */
  47 #define CONFIG_BOOTP_BOOTFILESIZE
  48 #define CONFIG_BOOTP_BOOTPATH
  49 #define CONFIG_BOOTP_GATEWAY
  50 #define CONFIG_BOOTP_HOSTNAME
  51
  52
  53 /*
  54  * Command line configuration.
  55  */
  56 #include <config_cmd_default.h>
  57
  58 #define CONFIG_CMD_IDE
  59 #define CONFIG_CMD_DHCP
  60 #define CONFIG_CMD_PCI
  61 #define CONFIG_CMD_CACHE
  62 #define CONFIG_CMD_IRQ
  63 #define CONFIG_CMD_EEPROM
  64 #define CONFIG_CMD_I2C
  65 #define CONFIG_CMD_REGINFO
  66 #define CONFIG_CMD_FDC
  67 #define CONFIG_CMD_SCSI
  68 #define CONFIG_CMD_FAT
  69 #define CONFIG_CMD_DATE
  70 #define CONFIG_CMD_ELF
  71 #define CONFIG_CMD_USB
  72 #define CONFIG_CMD_MII
  73 #define CONFIG_CMD_SDRAM
  74 #define CONFIG_CMD_PING
  75 #define CONFIG_CMD_SAVES
  76 #define CONFIG_CMD_BSP
  77
  78 #define  CONFIG_SYS_HUSH_PARSER
  79 #define  CONFIG_SYS_PROMPT_HUSH_PS2 "> "
  80 /**************************************************************
  81  * I2C Stuff:
  82  * the PIP405 is equiped with an Atmel 24C128/256 EEPROM at address
  83  * 0x53.
  84  * Caution: on the same bus is the SPD (Serial Presens Detect
  85  * EEPROM of the SDRAM
  86  * The Atmel EEPROM uses 16Bit addressing.
  87  ***************************************************************/
  88 #define CONFIG_HARD_I2C                 /* I2c with hardware support */
  89 #define CONFIG_PPC4XX_I2C               /* use PPC4xx driver            */
  90 #define CONFIG_SYS_I2C_SPEED            50000   /* I2C speed and slave address */
  91 #define CONFIG_SYS_I2C_SLAVE            0x7F
  92
  93 #define CONFIG_SYS_I2C_EEPROM_ADDR      0x53
  94 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  2
  95 #define CONFIG_ENV_IS_IN_EEPROM    1       /* use EEPROM for environment vars */
  96 #define CONFIG_ENV_OFFSET          0x000   /* environment starts at the beginning of the EEPROM */
  97 #define CONFIG_ENV_SIZE            0x800   /* 2 kBytes may be used for env vars */
  98
  99 #undef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
 100 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6     /* The Atmel 24C128/256 has     */
 101                                         /* 64 byte page write mode using*/
 102                                         /* last 6 bits of the address   */
 103 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   10      /* and takes up to 10 msec */
 104
 105
 106 /***************************************************************
 107  * Definitions for Serial Presence Detect EEPROM address
 108  * (to get SDRAM settings)
 109  ***************************************************************/
 110 #define SPD_EEPROM_ADDRESS      0x50
 111
 112 #define CONFIG_BOARD_EARLY_INIT_F
 113 /**************************************************************
 114  * Environment definitions
 115  **************************************************************/
 116 #define CONFIG_BAUDRATE         9600    /* STD Baudrate */
 117
 118
 119 #define CONFIG_BOOTDELAY        5
 120 /* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */
 121 /* #define CONFIG_BOOT_RETRY_TIME       -10     /XXX* feature is available but not enabled */
 122 #define CONFIG_ZERO_BOOTDELAY_CHECK     /* check console even if bootdelay = 0 */
 123
 124
 125 #define CONFIG_BOOTCOMMAND      "diskboot 400000 0:1; bootm" /* autoboot command                */
 126 #define CONFIG_BOOTARGS         "console=ttyS0,9600 root=/dev/hda5" /* boot arguments */
 127
 128 #define CONFIG_IPADDR           10.0.0.100
 129 #define CONFIG_SERVERIP         10.0.0.1
 130 #define CONFIG_PREBOOT
 131 /***************************************************************
 132  * defines if the console is stored in the environment
 133  ***************************************************************/
 134 #define CONFIG_SYS_CONSOLE_IS_IN_ENV    /* stdin, stdout and stderr are in evironment */
 135 /***************************************************************
 136  * defines if an overwrite_console function exists
 137  *************************************************************/
 138 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
 139 #define CONFIG_SYS_CONSOLE_INFO_QUIET
 140 /***************************************************************
 141  * defines if the overwrite_console should be stored in the
 142  * environment
 143  **************************************************************/
 144 #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
 145
 146 /**************************************************************
 147  * loads config
 148  *************************************************************/
 149 #define CONFIG_LOADS_ECHO       1       /* echo on for serial download  */
 150 #define CONFIG_SYS_LOADS_BAUD_CHANGE    1       /* allow baudrate change        */
 151
 152 #define CONFIG_MISC_INIT_R
 153 /***********************************************************
 154  * Miscellaneous configurable options
 155  **********************************************************/
 156 #define CONFIG_SYS_LONGHELP                     /* undef to save memory         */
 157 #define CONFIG_SYS_PROMPT       "=> "           /* Monitor Command Prompt       */
 158 #if defined(CONFIG_CMD_KGDB)
 159 #define CONFIG_SYS_CBSIZE       1024            /* Console I/O Buffer Size      */
 160 #else
 161 #define CONFIG_SYS_CBSIZE       256             /* Console I/O Buffer Size      */
 162 #endif
 163 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
 164 #define CONFIG_SYS_MAXARGS      16              /* max number of command args   */
 165 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size    */
 166
 167 #define CONFIG_SYS_MEMTEST_START        0x0100000       /* memtest works on     */
 168 #define CONFIG_SYS_MEMTEST_END          0x0C00000       /* 1 ... 12 MB in DRAM  */
 169
 170 #define CONFIG_CONS_INDEX       1       /* Use UART0                    */
 171 #define CONFIG_SYS_NS16550
 172 #define CONFIG_SYS_NS16550_SERIAL
 173 #define CONFIG_SYS_NS16550_REG_SIZE     1
 174 #define CONFIG_SYS_NS16550_CLK          get_serial_clock()
 175
 176 #undef  CONFIG_SYS_EXT_SERIAL_CLOCK            /* no external serial clock used */
 177 #define CONFIG_SYS_BASE_BAUD       691200
 178
 179 /* The following table includes the supported baudrates */
 180 #define CONFIG_SYS_BAUDRATE_TABLE       \
 181         { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400,     \
 182          57600, 115200, 230400, 460800, 921600 }
 183
 184 #define CONFIG_SYS_LOAD_ADDR            0x400000        /* default load address */
 185 #define CONFIG_SYS_EXTBDINFO            1       /* To use extended board_into (bd_t) */
 186
 187 #define CONFIG_SYS_HZ           1000            /* decrementer freq: 1 ms ticks */
 188
 189 /*-----------------------------------------------------------------------
 190  * PCI stuff
 191  *-----------------------------------------------------------------------
 192  */
 193 #define PCI_HOST_ADAPTER 0              /* configure ar pci adapter     */
 194 #define PCI_HOST_FORCE  1               /* configure as pci host        */
 195 #define PCI_HOST_AUTO   2               /* detected via arbiter enable  */
 196
 197 #define CONFIG_PCI                      /* include pci support          */
 198 #define CONFIG_PCI_HOST PCI_HOST_FORCE  /* configure as pci-host        */
 199 #define CONFIG_PCI_PNP                  /* pci plug-and-play            */
 200                                         /* resource configuration       */
 201 #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x0000   /* PCI Vendor ID: to-do!!!      */
 202 #define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0x0000   /* PCI Device ID: to-do!!!      */
 203 #define CONFIG_SYS_PCI_PTM1LA   0x00000000      /* point to sdram               */
 204 #define CONFIG_SYS_PCI_PTM1MS   0x80000001      /* 2GB, enable hard-wired to 1  */
 205 #define CONFIG_SYS_PCI_PTM1PCI 0x00000000      /* Host: use this pci address   */
 206 #define CONFIG_SYS_PCI_PTM2LA   0x00000000      /* disabled                     */
 207 #define CONFIG_SYS_PCI_PTM2MS   0x00000000      /* disabled                     */
 208 #define CONFIG_SYS_PCI_PTM2PCI 0x00000000      /* Host: use this pci address   */
 209
 210 /*-----------------------------------------------------------------------
 211  * Start addresses for the final memory configuration
 212  * (Set up by the startup code)
 213  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
 214  */
 215 #define CONFIG_SYS_SDRAM_BASE           0x00000000
 216 #define CONFIG_SYS_FLASH_BASE           0xFFF80000
 217 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
 218 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)    /* Reserve 512 kB for Monitor   */
 219 #define CONFIG_SYS_MALLOC_LEN           (1024 * 1024)   /* Reserve 1024 kB for malloc() */
 220
 221 /*
 222  * For booting Linux, the board info and command line data
 223  * have to be in the first 8 MB of memory, since this is
 224  * the maximum mapped by the Linux kernel during initialization.
 225  */
 226 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)       /* Initial Memory map for Linux */
 227 /*-----------------------------------------------------------------------
 228  * FLASH organization
 229  */
 230 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max number of memory banks           */
 231 #define CONFIG_SYS_MAX_FLASH_SECT       256     /* max number of sectors on one chip    */
 232
 233 #define CONFIG_SYS_FLASH_ERASE_TOUT     120000  /* Timeout for Flash Erase (in ms)      */
 234 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Timeout for Flash Write (in ms)      */
 235
 236 /*
 237  * Init Memory Controller:
 238  */
 239 #define FLASH_MAX_SIZE          0x00800000              /* 8MByte max */
 240 #define FLASH_BASE_PRELIM       0xFF800000  /* open the flash CS */
 241 /* Size: 0=1MB, 1=2MB, 2=4MB, 3=8MB, 4=16MB, 5=32MB, 6=64MB, 7=128MB */
 242 #define FLASH_SIZE_PRELIM        3  /* maximal flash FLASH size bank #0 */
 243
 244 #define CONFIG_BOARD_EARLY_INIT_F
 245
 246 /* Configuration Port location */
 247 #define CONFIG_PORT_ADDR        0xF4000000
 248 #define MULTI_PURPOSE_SOCKET_ADDR 0xF8000000
 249
 250
 251 /*-----------------------------------------------------------------------
 252  * Definitions for initial stack pointer and data area (in On Chip SRAM)
 253  */
 254 #define CONFIG_SYS_TEMP_STACK_OCM       1
 255 #define CONFIG_SYS_OCM_DATA_ADDR        0xF0000000
 256 #define CONFIG_SYS_OCM_DATA_SIZE        0x1000
 257 #define CONFIG_SYS_INIT_RAM_ADDR        CONFIG_SYS_OCM_DATA_ADDR        /* inside of On Chip SRAM    */
 258 #define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_OCM_DATA_SIZE        /* End of On Chip SRAM         */
 259 #define CONFIG_SYS_GBL_DATA_SIZE        64              /* size in bytes reserved for initial data */
 260 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
 261 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 262
 263 /*
 264  * Internal Definitions
 265  *
 266  * Boot Flags
 267  */
 268 #define BOOTFLAG_COLD   0x01            /* Normal Power-On: Boot from FLASH     */
 269 #define BOOTFLAG_WARM   0x02            /* Software reboot                      */
 270
 271
 272 /***********************************************************************
 273  * External peripheral base address
 274  ***********************************************************************/
 275 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0xE8000000
 276
 277 /***********************************************************************
 278  * Last Stage Init
 279  ***********************************************************************/
 280 #define CONFIG_LAST_STAGE_INIT
 281 /************************************************************
 282  * Ethernet Stuff
 283  ***********************************************************/
 284 #define CONFIG_PPC4xx_EMAC
 285 #define CONFIG_MII              1       /* MII PHY management           */
 286 #define CONFIG_PHY_ADDR         1       /* PHY address                  */
 287 #define CONFIG_NET_MULTI
 288 /************************************************************
 289  * RTC
 290  ***********************************************************/
 291 #define CONFIG_RTC_MC146818
 292 #undef CONFIG_WATCHDOG                  /* watchdog disabled            */
 293
 294 /************************************************************
 295  * IDE/ATA stuff
 296  ************************************************************/
 297 #define CONFIG_SYS_IDE_MAXBUS           2   /* max. 2 IDE busses        */
 298 #define CONFIG_SYS_IDE_MAXDEVICE        (CONFIG_SYS_IDE_MAXBUS*2) /* max. 2 drives per IDE bus */
 299
 300 #define CONFIG_SYS_ATA_BASE_ADDR        CONFIG_SYS_ISA_IO_BASE_ADDRESS /* base address */
 301 #define CONFIG_SYS_ATA_IDE0_OFFSET      0x01F0  /* ide0 offste */
 302 #define CONFIG_SYS_ATA_IDE1_OFFSET      0x0170  /* ide1 offset */
 303 #define CONFIG_SYS_ATA_DATA_OFFSET      0       /* data reg offset      */
 304 #define CONFIG_SYS_ATA_REG_OFFSET       0       /* reg offset */
 305 #define CONFIG_SYS_ATA_ALT_OFFSET       0x200   /* alternate register offset */
 306
 307 #undef  CONFIG_IDE_8xx_DIRECT           /* no pcmcia interface required */
 308 #undef  CONFIG_IDE_LED                  /* no led for ide supported     */
 309 #define CONFIG_IDE_RESET                /* reset for ide supported...   */
 310 #define CONFIG_IDE_RESET_ROUTINE        /* with a special reset function */
 311 #define CONFIG_SUPPORT_VFAT
 312
 313 /************************************************************
 314  * ATAPI support (experimental)
 315  ************************************************************/
 316 #define CONFIG_ATAPI                    /* enable ATAPI Support */
 317
 318 /************************************************************
 319  * SCSI support (experimental) only SYM53C8xx supported
 320  ************************************************************/
 321 #define CONFIG_SCSI_SYM53C8XX
 322 #define CONFIG_SYS_SCSI_MAX_LUN 8       /* number of supported LUNs */
 323 #define CONFIG_SYS_SCSI_MAX_SCSI_ID     7       /* maximum SCSI ID (0..6) */
 324 #define CONFIG_SYS_SCSI_MAX_DEVICE      CONFIG_SYS_SCSI_MAX_SCSI_ID * CONFIG_SYS_SCSI_MAX_LUN /* maximum Target devices */
 325 #define CONFIG_SYS_SCSI_SPIN_UP_TIME    2
 326
 327 /************************************************************
 328  * Disk-On-Chip configuration
 329  ************************************************************/
 330 #define CONFIG_SYS_MAX_DOC_DEVICE       1       /* Max number of DOC devices            */
 331 #define CONFIG_SYS_DOC_SHORT_TIMEOUT
 332 #define CONFIG_SYS_DOC_SUPPORT_2000
 333 #define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM
 334
 335 /************************************************************
 336  * DISK Partition support
 337  ************************************************************/
 338 #define CONFIG_DOS_PARTITION
 339 #define CONFIG_MAC_PARTITION
 340 #define CONFIG_ISO_PARTITION /* Experimental */
 341
 342 /************************************************************
 343  * Keyboard support
 344  ************************************************************/
 345 #define CONFIG_ISA_KEYBOARD
 346
 347 /************************************************************
 348  * Video support
 349  ************************************************************/
 350 #define CONFIG_VIDEO                    /*To enable video controller support */
 351 #define CONFIG_VIDEO_CT69000
 352 #define CONFIG_CFB_CONSOLE
 353 #define CONFIG_VIDEO_LOGO
 354 #define CONFIG_CONSOLE_EXTRA_INFO
 355 #define CONFIG_VGA_AS_SINGLE_DEVICE
 356 #define CONFIG_VIDEO_SW_CURSOR
 357 #define CONFIG_VIDEO_ONBOARD            /* Video controller is on-board */
 358
 359 /************************************************************
 360  * USB support
 361  ************************************************************/
 362 #define CONFIG_USB_UHCI
 363 #define CONFIG_USB_KEYBOARD
 364 #define CONFIG_USB_STORAGE
 365
 366 /* Enable needed helper functions */
 367 #define CONFIG_SYS_STDIO_DEREGISTER             /* needs stdio_deregister */
 368
 369 /************************************************************
 370  * Debug support
 371  ************************************************************/
 372 #if defined(CONFIG_CMD_KGDB)
 373 #define CONFIG_KGDB_BAUDRATE    230400  /* speed to run kgdb serial port */
 374 #define CONFIG_KGDB_SER_INDEX   2       /* which serial port to use */
 375 #endif
 376
 377 /************************************************************
 378  * support BZIP2 compression
 379  ************************************************************/
 380 #define CONFIG_BZIP2            1
 381
 382 /************************************************************
 383  * Ident
 384  ************************************************************/
 385 #define VERSION_TAG "released"
 386 #define CONFIG_ISO_STRING "MEV-10066-001"
 387 #define CONFIG_IDENT_STRING "\n(c) 2002 by MPL AG Switzerland, " CONFIG_ISO_STRING " " VERSION_TAG
 388
 389
 390 #endif  /* __CONFIG_H */