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[people/ms/u-boot.git] / include / configs / SMN42.h
1 /*
2 * (C) Copyright 2007
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * Configuation settings for the SMN42 board from Siemens.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26 #ifndef __CONFIG_H
27 #define __CONFIG_H
28
29 /*
30 * If we are developing, we might want to start u-boot from ram
31 * so we MUST NOT initialize critical regs like mem-timing ...
32 */
33 #undef CONFIG_INIT_CRITICAL /* undef for developing */
34
35 #undef CONFIG_SKIP_LOWLEVEL_INIT
36 #undef CONFIG_SKIP_RELOCATE_UBOOT
37
38 /*
39 * High Level Configuration Options
40 * (easy to change)
41 */
42 #define CONFIG_ARM7 1 /* This is a ARM7 CPU */
43 #define CONFIG_ARM_THUMB 1 /* this is an ARM720TDMI */
44 #define CONFIG_LPC2292
45 #undef CONFIG_ARM7_REVD /* disable ARM720 REV.D Workarounds */
46
47 #undef CONFIG_USE_IRQ /* don't need them anymore */
48
49 /*
50 * Size of malloc() pool
51 */
52 #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
53 #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
54
55 /*
56 * Hardware drivers
57 */
58
59 /*
60 * select serial console configuration
61 */
62 #define CONFIG_SERIAL1 1 /* we use Serial line 1 */
63
64 /* allow to overwrite serial and ethaddr */
65 #define CONFIG_ENV_OVERWRITE
66
67 #define CONFIG_BAUDRATE 115200
68
69 #define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT|CONFIG_BOOTP_BOOTFILESIZE)
70
71 /* enable I2C and select the hardware/software driver */
72 #undef CONFIG_HARD_I2C /* I2C with hardware support */
73 #define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
74 /* this would be 0xAE if E0, E1 and E2 were pulled high */
75 #define CFG_I2C_SLAVE 0xA0
76 #define CFG_I2C_EEPROM_ADDR (0xA0 >> 1)
77 #define CFG_I2C_EEPROM_ADDR_LEN 2 /* 16 bit address */
78 #define CFG_EEPROM_PAGE_WRITE_BITS 6 /* 64 bytes per write */
79 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
80 /* not used but required by devices.c */
81 #define CFG_I2C_SPEED 10000
82
83 #ifdef CONFIG_SOFT_I2C
84 /*
85 * Software (bit-bang) I2C driver configuration
86 */
87 #define SCL 0x00000004 /* P0.2 */
88 #define SDA 0x00000008 /* P0.3 */
89
90 #define I2C_READ ((GET32(IO0PIN) & SDA) ? 1 : 0)
91 #define I2C_SDA(x) { if (x) PUT32(IO0SET, SDA); else PUT32(IO0CLR, SDA); }
92 #define I2C_SCL(x) { if (x) PUT32(IO0SET, SCL); else PUT32(IO0CLR, SCL); }
93 #define I2C_DELAY { udelay(100); }
94 #define I2C_ACTIVE { unsigned int i2ctmp; \
95 i2ctmp = GET32(IO0DIR); \
96 i2ctmp |= SDA; \
97 PUT32(IO0DIR, i2ctmp); }
98 #define I2C_TRISTATE { unsigned int i2ctmp; \
99 i2ctmp = GET32(IO0DIR); \
100 i2ctmp &= ~SDA; \
101 PUT32(IO0DIR, i2ctmp); }
102 #endif /* CONFIG_SOFT_I2C */
103
104 /*
105 * Supported commands
106 */
107 #define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
108 CFG_CMD_DHCP | \
109 CFG_CMD_FAT | \
110 CFG_CMD_MMC | \
111 CFG_CMD_NET | \
112 CFG_CMD_EEPROM | \
113 CFG_CMD_PING)
114
115 #define CONFIG_DOS_PARTITION
116
117 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
118 #include <cmd_confdefs.h>
119
120 #define CONFIG_BOOTDELAY 5
121
122 /*
123 * Miscellaneous configurable options
124 */
125 #define CFG_LONGHELP /* undef to save memory */
126 #define CFG_PROMPT "SMN42 # " /* Monitor Command Prompt */
127 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
128 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
129 #define CFG_MAXARGS 16 /* max number of command args */
130 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
131
132 #define CFG_MEMTEST_START 0x81800000 /* memtest works on */
133 #define CFG_MEMTEST_END 0x83000000 /* 24 MB in SRAM */
134
135 #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
136
137 #define CFG_LOAD_ADDR 0x81000000 /* default load address */
138 /* for uClinux img is here*/
139
140 #define CFG_SYS_CLK_FREQ 58982400 /* Hz */
141 #define CFG_HZ 2048 /* decrementer freq in Hz */
142
143 /* valid baudrates */
144 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
145
146 /*-----------------------------------------------------------------------
147 * Stack sizes
148 *
149 * The stack sizes are set up in start.S using the settings below
150 */
151 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
152 #ifdef CONFIG_USE_IRQ
153 #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
154 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
155 #endif
156
157 /*-----------------------------------------------------------------------
158 * Physical Memory Map
159 */
160 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of SRAM */
161 #define PHYS_SDRAM_1 0x81000000 /* SRAM Bank #1 */
162 #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB SRAM */
163
164 /* This is the external flash */
165 #define PHYS_FLASH_1 0x80000000 /* Flash Bank #1 */
166 #define PHYS_FLASH_SIZE 0x01000000 /* 16 MB */
167
168 /*-----------------------------------------------------------------------
169 * FLASH and environment organization
170 */
171
172 /*
173 * The first entry in CFG_FLASH_BANKS_LIST is a dummy, but it must be present.
174 */
175 #define CFG_FLASH_BANKS_LIST { 0, PHYS_FLASH_1 }
176 #define CFG_FLASH_ADDR0 0x555
177 #define CFG_FLASH_ADDR1 0x2AA
178 #define CFG_FLASH_ERASE_TOUT 16384 /* Timeout for Flash Erase (in ms) */
179 #define CFG_FLASH_WRITE_TOUT 5 /* Timeout for Flash Write (in ms) */
180
181 #define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
182
183 #define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
184
185 #define CFG_ENV_IS_IN_FLASH 1
186 /* The Environment Sector is in the CPU-internal flash */
187 #define CFG_FLASH_BASE 0
188 #define CFG_ENV_OFFSET 0x3C000
189 #define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
190 #define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
191
192 #define CONFIG_CMDLINE_TAG
193 #define CONFIG_SETUP_MEMORY_TAGS
194 #define CONFIG_INITRD_TAG
195 #define CONFIG_MMC 1
196 /* we use this ethernet chip */
197 #define CONFIG_ENC28J60
198
199 #endif /* __CONFIG_H */