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1 /*
2 * (C) Copyright 2003-2005
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * (C) Copyright 2004-2006
6 * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27 #ifndef __CONFIG_H
28 #define __CONFIG_H
29
30 /*
31 * High Level Configuration Options
32 * (easy to change)
33 */
34
35 #define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
36 #define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */
37 #define CONFIG_TQM5200 1 /* ... on TQM5200 module */
38 #undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */
39
40 /* On a Cameron or on a FO300 board or ... */
41 #if !defined(CONFIG_CAM5200) && !defined(CONFIG_FO300)
42 #define CONFIG_STK52XX 1 /* ... on a STK52XX board */
43 #endif
44
45 #define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
46
47 #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
48 #define BOOTFLAG_WARM 0x02 /* Software reboot */
49
50 /*
51 * Serial console configuration
52 */
53 #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
54 #define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
55 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
56
57 #ifdef CONFIG_FO300
58 #define CFG_DEVICE_NULLDEV 1 /* enable null device */
59 #define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
60 #define CONFIG_BOARD_EARLY_INIT_F 1 /* used to detect S1 switch position */
61 #define CONFIG_USB_BIN_FIXUP 1 /* for a buggy USB device */
62 #if 0
63 #define FO300_SILENT_CONSOLE_WHEN_S1_CLOSED 1 /* silent console on PSC1 when S1 */
64 /* switch is closed */
65 #endif
66
67 #undef FO300_SILENT_CONSOLE_WHEN_S1_CLOSED /* silent console on PSC1 when S1 */
68 /* switch is open */
69 #endif /* CONFIG_FO300 */
70
71 #ifdef CONFIG_STK52XX
72 #define CONFIG_PS2KBD /* AT-PS/2 Keyboard */
73 #define CONFIG_PS2MULT /* .. on PS/2 Multiplexer */
74 #define CONFIG_PS2SERIAL 6 /* .. on PSC6 */
75 #define CONFIG_PS2MULT_DELAY (CFG_HZ/2) /* Initial delay */
76 #define CONFIG_BOARD_EARLY_INIT_R
77 #endif /* CONFIG_STK52XX */
78
79 /*
80 * PCI Mapping:
81 * 0x40000000 - 0x4fffffff - PCI Memory
82 * 0x50000000 - 0x50ffffff - PCI IO Space
83 */
84 #ifdef CONFIG_STK52XX
85 #define CONFIG_PCI 1
86 #define CONFIG_PCI_PNP 1
87 /* #define CONFIG_PCI_SCAN_SHOW 1 */
88
89 #define CONFIG_PCI_MEM_BUS 0x40000000
90 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
91 #define CONFIG_PCI_MEM_SIZE 0x10000000
92
93 #define CONFIG_PCI_IO_BUS 0x50000000
94 #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
95 #define CONFIG_PCI_IO_SIZE 0x01000000
96
97 #define CONFIG_NET_MULTI 1
98 #define CONFIG_EEPRO100 1
99 #define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
100 #define CONFIG_NS8382X 1
101 #endif /* CONFIG_STK52XX */
102
103 /*
104 * Video console
105 */
106 #ifndef CONFIG_TQM5200S /* No graphics controller on TQM5200S */
107 #define CONFIG_VIDEO
108 #define CONFIG_VIDEO_SM501
109 #define CONFIG_VIDEO_SM501_32BPP
110 #define CONFIG_CFB_CONSOLE
111 #define CONFIG_VIDEO_LOGO
112
113 #ifndef CONFIG_FO300
114 #define CONFIG_CONSOLE_EXTRA_INFO
115 #else
116 #define CONFIG_VIDEO_BMP_LOGO
117 #endif
118
119 #define CONFIG_VGA_AS_SINGLE_DEVICE
120 #define CONFIG_VIDEO_SW_CURSOR
121 #define CONFIG_SPLASH_SCREEN
122 #define CFG_CONSOLE_IS_IN_ENV
123 #endif /* #ifndef CONFIG_TQM5200S */
124
125
126 /* Partitions */
127 #define CONFIG_MAC_PARTITION
128 #define CONFIG_DOS_PARTITION
129 #define CONFIG_ISO_PARTITION
130
131 /* USB */
132 #if defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
133 #define CONFIG_USB_OHCI_NEW
134 #define CFG_OHCI_BE_CONTROLLER
135 #define CONFIG_USB_STORAGE
136 #define CONFIG_CMD_FAT
137 #define CONFIG_CMD_USB
138
139 #undef CFG_USB_OHCI_BOARD_INIT
140 #define CFG_USB_OHCI_CPU_INIT
141 #define CFG_USB_OHCI_REGS_BASE MPC5XXX_USB
142 #define CFG_USB_OHCI_SLOT_NAME "mpc5200"
143 #define CFG_USB_OHCI_MAX_ROOT_PORTS 15
144
145 #endif
146
147 #ifndef CONFIG_CAM5200
148 /* POST support */
149 #define CONFIG_POST (CFG_POST_MEMORY | \
150 CFG_POST_CPU | \
151 CFG_POST_I2C)
152 #endif
153
154 #ifdef CONFIG_POST
155 /* preserve space for the post_word at end of on-chip SRAM */
156 #define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
157 #endif
158
159
160 /*
161 * BOOTP options
162 */
163 #define CONFIG_BOOTP_BOOTFILESIZE
164 #define CONFIG_BOOTP_BOOTPATH
165 #define CONFIG_BOOTP_GATEWAY
166 #define CONFIG_BOOTP_HOSTNAME
167
168
169 /*
170 * Command line configuration.
171 */
172 #include <config_cmd_default.h>
173
174 #define CONFIG_CMD_ASKENV
175 #define CONFIG_CMD_DATE
176 #define CONFIG_CMD_DHCP
177 #define CONFIG_CMD_EEPROM
178 #define CONFIG_CMD_I2C
179 #define CONFIG_CMD_JFFS2
180 #define CONFIG_CMD_MII
181 #define CONFIG_CMD_NFS
182 #define CONFIG_CMD_PING
183 #define CONFIG_CMD_REGINFO
184 #define CONFIG_CMD_SNTP
185 #define CONFIG_CMD_BSP
186
187 #ifdef CONFIG_VIDEO
188 #define CONFIG_CMD_BMP
189 #endif
190
191 #ifdef CONFIG_PCI
192 #define CONFIG_CMD_PCI
193 #define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
194 #endif
195
196 #if defined(CONFIG_MINIFAP) || defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
197 #define CONFIG_CMD_IDE
198 #define CONFIG_CMD_FAT
199 #define CONFIG_CMD_EXT2
200 #endif
201
202 #if defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
203 #define CONFIG_CFG_USB
204 #define CONFIG_CFG_FAT
205 #endif
206
207 #ifdef CONFIG_POST
208 #define CONFIG_CMD_DIAG
209 #endif
210
211
212 #define CONFIG_TIMESTAMP /* display image timestamps */
213
214 #if (TEXT_BASE != 0xFFF00000)
215 # define CFG_LOWBOOT 1 /* Boot low */
216 #endif
217
218 /*
219 * Autobooting
220 */
221 #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
222
223 #define CONFIG_PREBOOT "echo;" \
224 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
225 "echo"
226
227 #undef CONFIG_BOOTARGS
228
229 #if defined(CONFIG_TQM5200_B) && !defined(CFG_LOWBOOT)
230 # define ENV_UPDT \
231 "update=protect off FFF00000 +${filesize};" \
232 "erase FFF00000 +${filesize};" \
233 "cp.b 200000 FFF00000 ${filesize};" \
234 "protect on FFF00000 +${filesize}\0"
235 #else /* default lowboot configuration */
236 # define ENV_UPDT \
237 "update=protect off FC000000 +${filesize};" \
238 "erase FC000000 +${filesize};" \
239 "cp.b 200000 FC000000 ${filesize};" \
240 "protect on FC000000 +${filesize}\0"
241 #endif
242
243 #if defined(CONFIG_TQM5200)
244 #define CUSTOM_ENV_SETTINGS \
245 "hostname=tqm5200\0" \
246 "bootfile=/tftpboot/tqm5200/uImage\0" \
247 "fdt_file=/tftpboot/tqm5200/tqm5200.dtb\0" \
248 "u-boot=/tftpboot/tqm5200/u-boot.bin\0"
249 #elif defined(CONFIG_CAM5200)
250 #define CUSTOM_ENV_SETTINGS \
251 "bootfile=cam5200/uImage\0" \
252 "u-boot=cam5200/u-boot.bin\0" \
253 "setup=tftp 200000 cam5200/setup.img; autoscr 200000\0"
254 #endif
255
256 #if defined(CONFIG_TQM5200_B)
257 #define ENV_FLASH_LAYOUT \
258 "fdt_addr=FC100000\0" \
259 "kernel_addr=FC140000\0" \
260 "ramdisk_addr=FC600000\0"
261 #else /* !CONFIG_TQM5200_B */
262 #define ENV_FLASH_LAYOUT \
263 "fdt_addr=FC0A0000\0" \
264 "kernel_addr=FC0C0000\0" \
265 "ramdisk_addr=FC300000\0"
266 #endif
267
268 #define CONFIG_EXTRA_ENV_SETTINGS \
269 "netdev=eth0\0" \
270 "console=ttyPSC0\0" \
271 ENV_FLASH_LAYOUT \
272 "kernel_addr_r=400000\0" \
273 "fdt_addr_r=600000\0" \
274 "rootpath=/opt/eldk/ppc_6xx\0" \
275 "ramargs=setenv bootargs root=/dev/ram rw\0" \
276 "nfsargs=setenv bootargs root=/dev/nfs rw " \
277 "nfsroot=${serverip}:${rootpath}\0" \
278 "addip=setenv bootargs ${bootargs} " \
279 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
280 ":${hostname}:${netdev}:off panic=1\0" \
281 "addcons=setenv bootargs ${bootargs} " \
282 "console=${console},${baudrate}\0" \
283 "flash_self_old=sete console ttyS0; run ramargs addip addcons;" \
284 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
285 "flash_self=run ramargs addip addcons;" \
286 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
287 "flash_nfs_old=sete console ttyS0; run nfsargs addip addcons;" \
288 "bootm ${kernel_addr}\0" \
289 "flash_nfs=run nfsargs addip addcons;" \
290 "bootm ${kernel_addr} - ${fdt_addr}\0" \
291 "net_nfs_old=tftp ${kernel_addr_r} ${bootfile};" \
292 "sete console ttyS0; run nfsargs addip addcons;bootm\0" \
293 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
294 "tftp ${fdt_addr_r} ${fdt_file}; " \
295 "run nfsargs addip addcons; " \
296 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
297 CUSTOM_ENV_SETTINGS \
298 "load=tftp 200000 ${u-boot}\0" \
299 ENV_UPDT \
300 ""
301
302 #define CONFIG_BOOTCOMMAND "run net_nfs"
303
304 /*
305 * IPB Bus clocking configuration.
306 */
307 #define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
308
309 #if defined(CFG_IPBCLK_EQUALS_XLBCLK) && !defined(CONFIG_CAM5200)
310 /*
311 * PCI Bus clocking configuration
312 *
313 * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
314 * CFG_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock of
315 * 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
316 */
317 #define CFG_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
318 #endif
319
320 /*
321 * I2C configuration
322 */
323 #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
324 #ifdef CONFIG_TQM5200_REV100
325 #define CFG_I2C_MODULE 1 /* Select I2C module #1 for rev. 100 board */
326 #else
327 #define CFG_I2C_MODULE 2 /* Select I2C module #2 for all other revs */
328 #endif
329
330 /*
331 * I2C clock frequency
332 *
333 * Please notice, that the resulting clock frequency could differ from the
334 * configured value. This is because the I2C clock is derived from system
335 * clock over a frequency divider with only a few divider values. U-boot
336 * calculates the best approximation for CFG_I2C_SPEED. However the calculated
337 * approximation allways lies below the configured value, never above.
338 */
339 #define CFG_I2C_SPEED 100000 /* 100 kHz */
340 #define CFG_I2C_SLAVE 0x7F
341
342 /*
343 * EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
344 * also). For other EEPROMs configuration should be verified. On Mini-FAP the
345 * EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
346 * same configuration could be used.
347 */
348 #define CFG_I2C_EEPROM_ADDR 0x50 /* 1010000x */
349 #define CFG_I2C_EEPROM_ADDR_LEN 2
350 #define CFG_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
351 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
352
353 /*
354 * HW-Monitor configuration on Mini-FAP
355 */
356 #if defined (CONFIG_MINIFAP)
357 #define CFG_I2C_HWMON_ADDR 0x2C
358 #endif
359
360 /* List of I2C addresses to be verified by POST */
361 #if defined (CONFIG_MINIFAP)
362 #undef I2C_ADDR_LIST
363 #define I2C_ADDR_LIST { CFG_I2C_EEPROM_ADDR, \
364 CFG_I2C_HWMON_ADDR, \
365 CFG_I2C_SLAVE }
366 #endif
367
368 /*
369 * Flash configuration
370 */
371 #define CFG_FLASH_BASE 0xFC000000
372
373 #if defined(CONFIG_CAM5200) && defined(CONFIG_CAM5200_NIOSFLASH)
374 #define CFG_MAX_FLASH_BANKS 2 /* max num of flash banks
375 (= chip selects) */
376 #define CFG_FLASH_WORD_SIZE unsigned int /* main flash device with */
377 #define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
378 #define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
379
380 #define CFG_FLASH_ADDR0 0x555
381 #define CFG_FLASH_ADDR1 0x2AA
382 #define CFG_FLASH_2ND_16BIT_DEV 1 /* NIOS flash is a 16bit device */
383 #define CFG_MAX_FLASH_SECT 128
384 #else
385 /* use CFI flash driver */
386 #define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
387 #define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
388 #define CFG_FLASH_BANKS_LIST { CFG_BOOTCS_START }
389 #define CFG_MAX_FLASH_BANKS 1 /* max num of flash banks
390 (= chip selects) */
391 #define CFG_MAX_FLASH_SECT 512 /* max num of sects on one chip */
392 #endif
393
394 #define CFG_FLASH_EMPTY_INFO
395 #define CFG_FLASH_SIZE 0x04000000 /* 64 MByte */
396 #define CFG_FLASH_USE_BUFFER_WRITE 1
397
398 #if defined (CONFIG_CAM5200)
399 # define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00040000)
400 #elif defined(CONFIG_TQM5200_B)
401 # define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00080000)
402 #else
403 # define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00060000)
404 #endif
405
406 /* Dynamic MTD partition support */
407 #define CONFIG_JFFS2_CMDLINE
408 #define MTDIDS_DEFAULT "nor0=TQM5200-0"
409
410 #ifdef CONFIG_STK52XX
411 # if defined(CONFIG_TQM5200_B)
412 # if defined(CFG_LOWBOOT)
413 # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:1m(firmware)," \
414 "256k(dtb)," \
415 "2304k(kernel)," \
416 "2560k(small-fs)," \
417 "2m(initrd)," \
418 "8m(misc)," \
419 "16m(big-fs)"
420 # else /* highboot */
421 # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:2560k(kernel)," \
422 "3584k(small-fs)," \
423 "2m(initrd)," \
424 "8m(misc)," \
425 "15m(big-fs)," \
426 "1m(firmware)"
427 # endif /* CFG_LOWBOOT */
428 # else /* !CONFIG_TQM5200_B */
429 # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \
430 "128k(dtb)," \
431 "2304k(kernel)," \
432 "2m(initrd)," \
433 "4m(small-fs)," \
434 "8m(misc)," \
435 "15m(big-fs)"
436 # endif /* CONFIG_TQM5200_B */
437 #elif defined (CONFIG_CAM5200)
438 # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:768k(firmware)," \
439 "1792k(kernel)," \
440 "5632k(rootfs)," \
441 "24m(home)"
442 #elif defined (CONFIG_FO300)
443 # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \
444 "1408k(kernel)," \
445 "2m(initrd)," \
446 "4m(small-fs)," \
447 "8m(misc)," \
448 "16m(big-fs)"
449 #else
450 # error "Unknown Carrier Board"
451 #endif /* CONFIG_STK52XX */
452
453 /*
454 * Environment settings
455 */
456 #define CFG_ENV_IS_IN_FLASH 1
457 #define CFG_ENV_SIZE 0x4000 /* 16 k - keep small for fast booting */
458 #if defined(CONFIG_TQM5200_B) || defined (CONFIG_CAM5200)
459 #define CFG_ENV_SECT_SIZE 0x40000
460 #else
461 #define CFG_ENV_SECT_SIZE 0x20000
462 #endif /* CONFIG_TQM5200_B */
463 #define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
464 #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
465
466 /*
467 * Memory map
468 */
469 #define CFG_MBAR 0xF0000000
470 #define CFG_SDRAM_BASE 0x00000000
471 #define CFG_DEFAULT_MBAR 0x80000000
472
473 /* Use ON-Chip SRAM until RAM will be available */
474 #define CFG_INIT_RAM_ADDR MPC5XXX_SRAM
475 #ifdef CONFIG_POST
476 /* preserve space for the post_word at end of on-chip SRAM */
477 #define CFG_INIT_RAM_END MPC5XXX_SRAM_POST_SIZE
478 #else
479 #define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE
480 #endif
481
482
483 #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
484 #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
485 #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
486
487 #define CFG_MONITOR_BASE TEXT_BASE
488 #if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
489 # define CFG_RAMBOOT 1
490 #endif
491
492 #if defined (CONFIG_CAM5200)
493 # define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
494 #elif defined(CONFIG_TQM5200_B)
495 # define CFG_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
496 #else
497 # define CFG_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
498 #endif
499
500 #define CFG_MALLOC_LEN (1024 << 10) /* Reserve 1024 kB for malloc() */
501 #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
502
503 /*
504 * Ethernet configuration
505 */
506 #define CONFIG_MPC5xxx_FEC 1
507 /*
508 * Define CONFIG_FEC_10MBIT to force FEC at 10Mb
509 */
510 /* #define CONFIG_FEC_10MBIT 1 */
511 #define CONFIG_PHY_ADDR 0x00
512
513 /*
514 * GPIO configuration
515 *
516 * use CS1: Bit 0 (mask: 0x80000000):
517 * 1 -> Pin gpio_wkup_6 as second SDRAM chip select (mem_cs1).
518 * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
519 * 00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
520 * SPI on PSC3 according to PSC3 setting. Use for CAM5200.
521 * 01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
522 * Use for REV200 STK52XX boards and FO300 boards. Do not use
523 * with REV100 modules (because, there I2C1 is used as I2C bus).
524 * use ATA: Bits 6-7 (mask 0x03000000):
525 * 00 -> No ATA chip selects, csb_4/5 used as normal chip selects.
526 * Use for CAM5200 board.
527 * 01 -> ATA cs0/1 on csb_4/5. Use for the remaining boards.
528 * use PSC6: Bits 9-11 (mask 0x00700000):
529 * 000 -> use PSC6_0 to PSC6_3 as GPIO, PSC6 could not be used as
530 * UART, CODEC or IrDA.
531 * GPIO on PSC6_3 is used in post_hotkeys_pressed() to
532 * enable extended POST tests.
533 * Use for MINI-FAP and TQM5200_IB boards.
534 * 101 -> use PSC6 as UART. Pins PSC6_0 to PSC6_3 are used.
535 * Extended POST test is not available.
536 * Use for STK52xx, FO300 and CAM5200 boards.
537 * use PCI_DIS: Bit 16 (mask 0x00008000):
538 * 1 -> disable PCI controller (on CAM5200 board).
539 * use USB: Bits 18-19 (mask 0x00003000):
540 * 10 -> two UARTs (on FO300 and CAM5200).
541 * use PSC3: Bits 20-23 (mask: 0x00000f00):
542 * 0000 -> All PSC3 pins are GPIOs.
543 * 1100 -> UART/SPI (on FO300 board).
544 * 0100 -> UART (on CAM5200 board).
545 * use PSC2: Bits 25:27 (mask: 0x00000030):
546 * 000 -> All PSC2 pins are GPIOs.
547 * 100 -> UART (on CAM5200 board).
548 * 001 -> CAN1/2 on PSC2 pins.
549 * Use for REV100 STK52xx boards
550 * 01x -> Use AC97 (on FO300 board).
551 * use PSC1: Bits 29-31 (mask: 0x00000007):
552 * 100 -> UART (on all boards).
553 */
554 #if defined (CONFIG_MINIFAP)
555 # define CFG_GPS_PORT_CONFIG 0x91000004
556 #elif defined (CONFIG_STK52XX)
557 # if defined (CONFIG_STK52XX_REV100)
558 # define CFG_GPS_PORT_CONFIG 0x81500014
559 # else /* STK52xx REV200 and above */
560 # if defined (CONFIG_TQM5200_REV100)
561 # error TQM5200 REV100 not supported on STK52XX REV200 or above
562 # else/* TQM5200 REV200 and above */
563 # define CFG_GPS_PORT_CONFIG 0x91500404
564 # endif
565 # endif
566 #elif defined (CONFIG_FO300)
567 # define CFG_GPS_PORT_CONFIG 0x91502c24
568 #elif defined (CONFIG_CAM5200)
569 # define CFG_GPS_PORT_CONFIG 0x8050A444
570 #else /* TMQ5200 Inbetriebnahme-Board */
571 # define CFG_GPS_PORT_CONFIG 0x81000004
572 #endif
573
574 /*
575 * RTC configuration
576 */
577 #if defined (CONFIG_STK52XX) && !defined (CONFIG_STK52XX_REV100)
578 # define CONFIG_RTC_M41T11 1
579 # define CFG_I2C_RTC_ADDR 0x68
580 # define CFG_M41T11_BASE_YEAR 1900 /* because Linux uses the same base
581 year */
582 #else
583 # define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
584 #endif
585
586 /*
587 * Miscellaneous configurable options
588 */
589 #define CFG_LONGHELP /* undef to save memory */
590 #define CFG_PROMPT "=> " /* Monitor Command Prompt */
591
592 #define CONFIG_CMDLINE_EDITING 1 /* add command line history */
593 #define CFG_HUSH_PARSER 1 /* use "hush" command parser */
594 #define CFG_PROMPT_HUSH_PS2 "> "
595
596 #define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
597 #if defined(CONFIG_CMD_KGDB)
598 #define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
599 #endif
600
601 #if defined(CONFIG_CMD_KGDB)
602 #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
603 #else
604 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
605 #endif
606 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
607 #define CFG_MAXARGS 16 /* max number of command args */
608 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
609
610 /* Enable an alternate, more extensive memory test */
611 #define CFG_ALT_MEMTEST
612
613 #define CFG_MEMTEST_START 0x00100000 /* memtest works on */
614 #define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
615
616 #define CFG_LOAD_ADDR 0x100000 /* default load address */
617
618 #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
619
620 /*
621 * Enable loopw command.
622 */
623 #define CONFIG_LOOPW
624
625 /*
626 * Various low-level settings
627 */
628 #if defined(CONFIG_MPC5200)
629 #define CFG_HID0_INIT HID0_ICE | HID0_ICFI
630 #define CFG_HID0_FINAL HID0_ICE
631 #else
632 #define CFG_HID0_INIT 0
633 #define CFG_HID0_FINAL 0
634 #endif
635
636 #define CFG_BOOTCS_START CFG_FLASH_BASE
637 #define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
638 #ifdef CFG_PCICLK_EQUALS_IPBCLK_DIV2
639 #define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
640 #else
641 #define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
642 #endif
643 #define CFG_CS0_START CFG_FLASH_BASE
644 #define CFG_CS0_SIZE CFG_FLASH_SIZE
645
646 #define CONFIG_LAST_STAGE_INIT
647
648 /*
649 * SRAM - Do not map below 2 GB in address space, because this area is used
650 * for SDRAM autosizing.
651 */
652 #define CFG_CS2_START 0xE5000000
653 #define CFG_CS2_SIZE 0x100000 /* 1 MByte */
654 #define CFG_CS2_CFG 0x0004D930
655
656 /*
657 * Grafic controller - Do not map below 2 GB in address space, because this
658 * area is used for SDRAM autosizing.
659 */
660 #define SM501_FB_BASE 0xE0000000
661 #define CFG_CS1_START (SM501_FB_BASE)
662 #define CFG_CS1_SIZE 0x4000000 /* 64 MByte */
663 #define CFG_CS1_CFG 0x8F48FF70
664 #define SM501_MMIO_BASE CFG_CS1_START + 0x03E00000
665
666 #define CFG_CS_BURST 0x00000000
667 #define CFG_CS_DEADCYCLE 0x33333311 /* 1 dead cycle for flash and SM501 */
668
669 #if defined(CONFIG_CAM5200)
670 #define CFG_CS4_START 0xB0000000
671 #define CFG_CS4_SIZE 0x00010000
672 #define CFG_CS4_CFG 0x01019C10
673
674 #define CFG_CS5_START 0xD0000000
675 #define CFG_CS5_SIZE 0x01208000
676 #define CFG_CS5_CFG 0x1414BF10
677 #endif
678
679 #define CFG_RESET_ADDRESS 0xff000000
680
681 /*-----------------------------------------------------------------------
682 * USB stuff
683 *-----------------------------------------------------------------------
684 */
685 #define CONFIG_USB_CLOCK 0x0001BBBB
686 #define CONFIG_USB_CONFIG 0x00001000
687
688 /*-----------------------------------------------------------------------
689 * IDE/ATA stuff Supports IDE harddisk
690 *-----------------------------------------------------------------------
691 */
692
693 #undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
694
695 #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
696 #undef CONFIG_IDE_LED /* LED for ide not supported */
697
698 #define CONFIG_IDE_RESET /* reset for ide supported */
699 #define CONFIG_IDE_PREINIT
700
701 #define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
702 #define CFG_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
703
704 #define CFG_ATA_IDE0_OFFSET 0x0000
705
706 #define CFG_ATA_BASE_ADDR MPC5XXX_ATA
707
708 /* Offset for data I/O */
709 #define CFG_ATA_DATA_OFFSET (0x0060)
710
711 /* Offset for normal register accesses */
712 #define CFG_ATA_REG_OFFSET (CFG_ATA_DATA_OFFSET)
713
714 /* Offset for alternate registers */
715 #define CFG_ATA_ALT_OFFSET (0x005C)
716
717 /* Interval between registers */
718 #define CFG_ATA_STRIDE 4
719
720 /*-----------------------------------------------------------------------
721 * Open firmware flat tree support
722 *-----------------------------------------------------------------------
723 */
724 #define CONFIG_OF_LIBFDT 1
725 #define CONFIG_OF_BOARD_SETUP 1
726
727 #define OF_CPU "PowerPC,5200@0"
728 #define OF_SOC "soc5200@f0000000"
729 #define OF_TBCLK (bd->bi_busfreq / 4)
730 #define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
731
732 #endif /* __CONFIG_H */