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1 /*
2 * (C) Copyright 2003-2005
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * (C) Copyright 2004-2006
6 * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27 #ifndef __CONFIG_H
28 #define __CONFIG_H
29
30 /*
31 * High Level Configuration Options
32 * (easy to change)
33 */
34
35 #define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
36 #define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */
37 #define CONFIG_TQM5200 1 /* ... on TQM5200 module */
38 #undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */
39
40 /* On a Cameron or on a FO300 board or ... */
41 #if !defined(CONFIG_CAM5200) && !defined(CONFIG_FO300)
42 #define CONFIG_STK52XX 1 /* ... on a STK52XX board */
43 #endif
44
45 #define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
46
47 #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
48 #define BOOTFLAG_WARM 0x02 /* Software reboot */
49
50 /*
51 * Serial console configuration
52 */
53 #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
54 #define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
55 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
56
57 #ifdef CONFIG_FO300
58 #define CFG_DEVICE_NULLDEV 1 /* enable null device */
59 #define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
60 #define CONFIG_BOARD_EARLY_INIT_F 1 /* used to detect S1 switch position */
61 #define CONFIG_USB_BIN_FIXUP 1 /* for a buggy USB device */
62 #if 0
63 #define FO300_SILENT_CONSOLE_WHEN_S1_CLOSED 1 /* silent console on PSC1 when S1 */
64 /* switch is closed */
65 #endif
66
67 #undef FO300_SILENT_CONSOLE_WHEN_S1_CLOSED /* silent console on PSC1 when S1 */
68 /* switch is open */
69 #endif /* CONFIG_FO300 */
70
71 #ifdef CONFIG_STK52XX
72 #define CONFIG_PS2KBD /* AT-PS/2 Keyboard */
73 #define CONFIG_PS2MULT /* .. on PS/2 Multiplexer */
74 #define CONFIG_PS2SERIAL 6 /* .. on PSC6 */
75 #define CONFIG_PS2MULT_DELAY (CFG_HZ/2) /* Initial delay */
76 #define CONFIG_BOARD_EARLY_INIT_R
77 #endif /* CONFIG_STK52XX */
78
79 /*
80 * PCI Mapping:
81 * 0x40000000 - 0x4fffffff - PCI Memory
82 * 0x50000000 - 0x50ffffff - PCI IO Space
83 */
84 #ifdef CONFIG_STK52XX
85 #define CONFIG_PCI 1
86 #define CONFIG_PCI_PNP 1
87 /* #define CONFIG_PCI_SCAN_SHOW 1 */
88
89 #define CONFIG_PCI_MEM_BUS 0x40000000
90 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
91 #define CONFIG_PCI_MEM_SIZE 0x10000000
92
93 #define CONFIG_PCI_IO_BUS 0x50000000
94 #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
95 #define CONFIG_PCI_IO_SIZE 0x01000000
96
97 #define CONFIG_NET_MULTI 1
98 #define CONFIG_EEPRO100 1
99 #define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
100 #define CONFIG_NS8382X 1
101 #endif /* CONFIG_STK52XX */
102
103 /*
104 * Video console
105 */
106 #ifndef CONFIG_TQM5200S /* No graphics controller on TQM5200S */
107 #define CONFIG_VIDEO
108 #define CONFIG_VIDEO_SM501
109 #define CONFIG_VIDEO_SM501_32BPP
110 #define CONFIG_CFB_CONSOLE
111 #define CONFIG_VIDEO_LOGO
112
113 #ifndef CONFIG_FO300
114 #define CONFIG_CONSOLE_EXTRA_INFO
115 #else
116 #define CONFIG_VIDEO_BMP_LOGO
117 #endif
118
119 #define CONFIG_VGA_AS_SINGLE_DEVICE
120 #define CONFIG_VIDEO_SW_CURSOR
121 #define CONFIG_SPLASH_SCREEN
122 #define CFG_CONSOLE_IS_IN_ENV
123 #endif /* #ifndef CONFIG_TQM5200S */
124
125
126 /* Partitions */
127 #define CONFIG_MAC_PARTITION
128 #define CONFIG_DOS_PARTITION
129 #define CONFIG_ISO_PARTITION
130
131 /* USB */
132 #if defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
133 #define CONFIG_USB_OHCI_NEW
134 #define CFG_OHCI_BE_CONTROLLER
135 #define CONFIG_USB_STORAGE
136 #define CONFIG_CMD_FAT
137 #define CONFIG_CMD_USB
138
139 #undef CFG_USB_OHCI_BOARD_INIT
140 #define CFG_USB_OHCI_CPU_INIT
141 #define CFG_USB_OHCI_REGS_BASE MPC5XXX_USB
142 #define CFG_USB_OHCI_SLOT_NAME "mpc5200"
143 #define CFG_USB_OHCI_MAX_ROOT_PORTS 15
144
145 #endif
146
147 #ifndef CONFIG_CAM5200
148 /* POST support */
149 #define CONFIG_POST (CFG_POST_MEMORY | \
150 CFG_POST_CPU | \
151 CFG_POST_I2C)
152 #endif
153
154 #ifdef CONFIG_POST
155 /* preserve space for the post_word at end of on-chip SRAM */
156 #define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
157 #endif
158
159
160 /*
161 * BOOTP options
162 */
163 #define CONFIG_BOOTP_BOOTFILESIZE
164 #define CONFIG_BOOTP_BOOTPATH
165 #define CONFIG_BOOTP_GATEWAY
166 #define CONFIG_BOOTP_HOSTNAME
167
168
169 /*
170 * Command line configuration.
171 */
172 #include <config_cmd_default.h>
173
174 #define CONFIG_CMD_ASKENV
175 #define CONFIG_CMD_DATE
176 #define CONFIG_CMD_DHCP
177 #define CONFIG_CMD_EEPROM
178 #define CONFIG_CMD_I2C
179 #define CONFIG_CMD_JFFS2
180 #define CONFIG_CMD_MII
181 #define CONFIG_CMD_NFS
182 #define CONFIG_CMD_PING
183 #define CONFIG_CMD_REGINFO
184 #define CONFIG_CMD_SNTP
185 #define CONFIG_CMD_BSP
186
187 #ifdef CONFIG_VIDEO
188 #define CONFIG_CMD_BMP
189 #endif
190
191 #ifdef CONFIG_PCI
192 #define CONFIG_CMD_PCI
193 #endif
194
195 #if defined(CONFIG_MINIFAP) || defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
196 #define CONFIG_CMD_IDE
197 #define CONFIG_CMD_FAT
198 #define CONFIG_CMD_EXT2
199 #endif
200
201 #if defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
202 #define CONFIG_CFG_USB
203 #define CONFIG_CFG_FAT
204 #endif
205
206 #ifdef CONFIG_POST
207 #define CONFIG_CMD_DIAG
208 #endif
209
210
211 #define CONFIG_TIMESTAMP /* display image timestamps */
212
213 #if (TEXT_BASE != 0xFFF00000)
214 # define CFG_LOWBOOT 1 /* Boot low */
215 #endif
216
217 /*
218 * Autobooting
219 */
220 #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
221
222 #define CONFIG_PREBOOT "echo;" \
223 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
224 "echo"
225
226 #undef CONFIG_BOOTARGS
227
228 #if defined(CONFIG_TQM5200_B) && !defined(CFG_LOWBOOT)
229 # define ENV_UPDT \
230 "update=protect off FFF00000 +${filesize};" \
231 "erase FFF00000 +${filesize};" \
232 "cp.b 200000 FFF00000 ${filesize};" \
233 "protect on FFF00000 +${filesize}\0"
234 #else /* default lowboot configuration */
235 # define ENV_UPDT \
236 "update=protect off FC000000 +${filesize};" \
237 "erase FC000000 +${filesize};" \
238 "cp.b 200000 FC000000 ${filesize};" \
239 "protect on FC000000 +${filesize}\0"
240 #endif
241
242 #if defined(CONFIG_TQM5200)
243 #define CUSTOM_ENV_SETTINGS \
244 "hostname=tqm5200\0" \
245 "bootfile=/tftpboot/tqm5200/uImage\0" \
246 "fdt_file=/tftpboot/tqm5200/tqm5200.dtb\0" \
247 "u-boot=/tftpboot/tqm5200/u-boot.bin\0"
248 #elif defined(CONFIG_CAM5200)
249 #define CUSTOM_ENV_SETTINGS \
250 "bootfile=cam5200/uImage\0" \
251 "u-boot=cam5200/u-boot.bin\0" \
252 "setup=tftp 200000 cam5200/setup.img; autoscr 200000\0"
253 #endif
254
255 #define CONFIG_EXTRA_ENV_SETTINGS \
256 "netdev=eth0\0" \
257 "console=ttyPSC0\0" \
258 "fdt_addr=FC0A0000\0" \
259 "kernel_addr=FC0C0000\0" \
260 "ramdisk_addr=FC300000\0" \
261 "kernel_addr_r=400000\0" \
262 "fdt_addr_r=600000\0" \
263 "rootpath=/opt/eldk/ppc_6xx\0" \
264 "ramargs=setenv bootargs root=/dev/ram rw\0" \
265 "nfsargs=setenv bootargs root=/dev/nfs rw " \
266 "nfsroot=${serverip}:${rootpath}\0" \
267 "addip=setenv bootargs ${bootargs} " \
268 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
269 ":${hostname}:${netdev}:off panic=1\0" \
270 "addcons=setenv bootargs ${bootargs} " \
271 "console=${console},${baudrate}\0" \
272 "flash_self_old=sete console ttyS0; run ramargs addip addcons;" \
273 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
274 "flash_self=run ramargs addip addcons;" \
275 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
276 "flash_nfs_old=sete console ttyS0; run nfsargs addip addcons;" \
277 "bootm ${kernel_addr}\0" \
278 "flash_nfs=run nfsargs addip addcons;" \
279 "bootm ${kernel_addr} - ${fdt_addr}\0" \
280 "net_nfs_old=tftp ${kernel_addr_r} ${bootfile};" \
281 "sete console ttyS0; run nfsargs addip addcons;bootm\0" \
282 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
283 "tftp ${fdt_addr_r} ${fdt_file}; " \
284 "run nfsargs addip addcons; " \
285 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
286 CUSTOM_ENV_SETTINGS \
287 "load=tftp 200000 ${u-boot}\0" \
288 ENV_UPDT \
289 ""
290
291 #define CONFIG_BOOTCOMMAND "run net_nfs"
292
293 /*
294 * IPB Bus clocking configuration.
295 */
296 #define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
297
298 #if defined(CFG_IPBCLK_EQUALS_XLBCLK) && !defined(CONFIG_CAM5200)
299 /*
300 * PCI Bus clocking configuration
301 *
302 * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
303 * CFG_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock of
304 * 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
305 */
306 #define CFG_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
307 #endif
308
309 /*
310 * I2C configuration
311 */
312 #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
313 #ifdef CONFIG_TQM5200_REV100
314 #define CFG_I2C_MODULE 1 /* Select I2C module #1 for rev. 100 board */
315 #else
316 #define CFG_I2C_MODULE 2 /* Select I2C module #2 for all other revs */
317 #endif
318
319 /*
320 * I2C clock frequency
321 *
322 * Please notice, that the resulting clock frequency could differ from the
323 * configured value. This is because the I2C clock is derived from system
324 * clock over a frequency divider with only a few divider values. U-boot
325 * calculates the best approximation for CFG_I2C_SPEED. However the calculated
326 * approximation allways lies below the configured value, never above.
327 */
328 #define CFG_I2C_SPEED 100000 /* 100 kHz */
329 #define CFG_I2C_SLAVE 0x7F
330
331 /*
332 * EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
333 * also). For other EEPROMs configuration should be verified. On Mini-FAP the
334 * EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
335 * same configuration could be used.
336 */
337 #define CFG_I2C_EEPROM_ADDR 0x50 /* 1010000x */
338 #define CFG_I2C_EEPROM_ADDR_LEN 2
339 #define CFG_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
340 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
341
342 /*
343 * HW-Monitor configuration on Mini-FAP
344 */
345 #if defined (CONFIG_MINIFAP)
346 #define CFG_I2C_HWMON_ADDR 0x2C
347 #endif
348
349 /* List of I2C addresses to be verified by POST */
350 #if defined (CONFIG_MINIFAP)
351 #undef I2C_ADDR_LIST
352 #define I2C_ADDR_LIST { CFG_I2C_EEPROM_ADDR, \
353 CFG_I2C_HWMON_ADDR, \
354 CFG_I2C_SLAVE }
355 #endif
356
357 /*
358 * Flash configuration
359 */
360 #define CFG_FLASH_BASE 0xFC000000
361
362 #if defined(CONFIG_CAM5200) && defined(CONFIG_CAM5200_NIOSFLASH)
363 #define CFG_MAX_FLASH_BANKS 2 /* max num of flash banks
364 (= chip selects) */
365 #define CFG_FLASH_WORD_SIZE unsigned int /* main flash device with */
366 #define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
367 #define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
368
369 #define CFG_FLASH_ADDR0 0x555
370 #define CFG_FLASH_ADDR1 0x2AA
371 #define CFG_FLASH_2ND_16BIT_DEV 1 /* NIOS flash is a 16bit device */
372 #define CFG_MAX_FLASH_SECT 128
373 #else
374 /* use CFI flash driver */
375 #define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
376 #define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
377 #define CFG_FLASH_BANKS_LIST { CFG_BOOTCS_START }
378 #define CFG_MAX_FLASH_BANKS 1 /* max num of flash banks
379 (= chip selects) */
380 #define CFG_MAX_FLASH_SECT 512 /* max num of sects on one chip */
381 #endif
382
383 #define CFG_FLASH_EMPTY_INFO
384 #define CFG_FLASH_SIZE 0x04000000 /* 64 MByte */
385 #define CFG_FLASH_USE_BUFFER_WRITE 1
386
387 #if defined (CONFIG_CAM5200)
388 # define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00040000)
389 #elif defined(CONFIG_TQM5200_B)
390 # define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00080000)
391 #else
392 # define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00060000)
393 #endif
394
395 /* Dynamic MTD partition support */
396 #define CONFIG_JFFS2_CMDLINE
397 #define MTDIDS_DEFAULT "nor0=TQM5200-0"
398
399 #ifdef CONFIG_STK52XX
400 # if defined(CONFIG_TQM5200_B)
401 # if defined(CFG_LOWBOOT)
402 # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:1m(firmware)," \
403 "1536k(kernel)," \
404 "3584k(small-fs)," \
405 "2m(initrd)," \
406 "8m(misc)," \
407 "16m(big-fs)"
408 # else /* highboot */
409 # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:2560k(kernel)," \
410 "3584k(small-fs)," \
411 "2m(initrd)," \
412 "8m(misc)," \
413 "15m(big-fs)," \
414 "1m(firmware)"
415 # endif /* CFG_LOWBOOT */
416 # else /* !CONFIG_TQM5200_B */
417 # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \
418 "128k(dtb)," \
419 "2304k(kernel)," \
420 "2m(initrd)," \
421 "4m(small-fs)," \
422 "8m(misc)," \
423 "15m(big-fs)"
424 # endif /* CONFIG_TQM5200_B */
425 #elif defined (CONFIG_CAM5200)
426 # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:768k(firmware)," \
427 "1792k(kernel)," \
428 "5632k(rootfs)," \
429 "24m(home)"
430 #elif defined (CONFIG_FO300)
431 # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \
432 "1408k(kernel)," \
433 "2m(initrd)," \
434 "4m(small-fs)," \
435 "8m(misc)," \
436 "16m(big-fs)"
437 #else
438 # error "Unknown Carrier Board"
439 #endif /* CONFIG_STK52XX */
440
441 /*
442 * Environment settings
443 */
444 #define CFG_ENV_IS_IN_FLASH 1
445 #define CFG_ENV_SIZE 0x4000 /* 16 k - keep small for fast booting */
446 #if defined(CONFIG_TQM5200_B) || defined (CONFIG_CAM5200)
447 #define CFG_ENV_SECT_SIZE 0x40000
448 #else
449 #define CFG_ENV_SECT_SIZE 0x20000
450 #endif /* CONFIG_TQM5200_B */
451 #define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
452 #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
453
454 /*
455 * Memory map
456 */
457 #define CFG_MBAR 0xF0000000
458 #define CFG_SDRAM_BASE 0x00000000
459 #define CFG_DEFAULT_MBAR 0x80000000
460
461 /* Use ON-Chip SRAM until RAM will be available */
462 #define CFG_INIT_RAM_ADDR MPC5XXX_SRAM
463 #ifdef CONFIG_POST
464 /* preserve space for the post_word at end of on-chip SRAM */
465 #define CFG_INIT_RAM_END MPC5XXX_SRAM_POST_SIZE
466 #else
467 #define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE
468 #endif
469
470
471 #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
472 #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
473 #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
474
475 #define CFG_MONITOR_BASE TEXT_BASE
476 #if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
477 # define CFG_RAMBOOT 1
478 #endif
479
480 #if defined (CONFIG_CAM5200)
481 # define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
482 #elif defined(CONFIG_TQM5200_B)
483 # define CFG_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
484 #else
485 # define CFG_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
486 #endif
487
488 #define CFG_MALLOC_LEN (1024 << 10) /* Reserve 1024 kB for malloc() */
489 #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
490
491 /*
492 * Ethernet configuration
493 */
494 #define CONFIG_MPC5xxx_FEC 1
495 /*
496 * Define CONFIG_FEC_10MBIT to force FEC at 10Mb
497 */
498 /* #define CONFIG_FEC_10MBIT 1 */
499 #define CONFIG_PHY_ADDR 0x00
500
501 /*
502 * GPIO configuration
503 *
504 * use CS1: Bit 0 (mask: 0x80000000):
505 * 1 -> Pin gpio_wkup_6 as second SDRAM chip select (mem_cs1).
506 * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
507 * 00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
508 * SPI on PSC3 according to PSC3 setting. Use for CAM5200.
509 * 01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
510 * Use for REV200 STK52XX boards and FO300 boards. Do not use
511 * with REV100 modules (because, there I2C1 is used as I2C bus).
512 * use ATA: Bits 6-7 (mask 0x03000000):
513 * 00 -> No ATA chip selects, csb_4/5 used as normal chip selects.
514 * Use for CAM5200 board.
515 * 01 -> ATA cs0/1 on csb_4/5. Use for the remaining boards.
516 * use PSC6: Bits 9-11 (mask 0x00700000):
517 * 000 -> use PSC6_0 to PSC6_3 as GPIO, PSC6 could not be used as
518 * UART, CODEC or IrDA.
519 * GPIO on PSC6_3 is used in post_hotkeys_pressed() to
520 * enable extended POST tests.
521 * Use for MINI-FAP and TQM5200_IB boards.
522 * 101 -> use PSC6 as UART. Pins PSC6_0 to PSC6_3 are used.
523 * Extended POST test is not available.
524 * Use for STK52xx, FO300 and CAM5200 boards.
525 * use PCI_DIS: Bit 16 (mask 0x00008000):
526 * 1 -> disable PCI controller (on CAM5200 board).
527 * use USB: Bits 18-19 (mask 0x00003000):
528 * 10 -> two UARTs (on FO300 and CAM5200).
529 * use PSC3: Bits 20-23 (mask: 0x00000f00):
530 * 0000 -> All PSC3 pins are GPIOs.
531 * 1100 -> UART/SPI (on FO300 board).
532 * 0100 -> UART (on CAM5200 board).
533 * use PSC2: Bits 25:27 (mask: 0x00000030):
534 * 000 -> All PSC2 pins are GPIOs.
535 * 100 -> UART (on CAM5200 board).
536 * 001 -> CAN1/2 on PSC2 pins.
537 * Use for REV100 STK52xx boards
538 * 01x -> Use AC97 (on FO300 board).
539 * use PSC1: Bits 29-31 (mask: 0x00000007):
540 * 100 -> UART (on all boards).
541 */
542 #if defined (CONFIG_MINIFAP)
543 # define CFG_GPS_PORT_CONFIG 0x91000004
544 #elif defined (CONFIG_STK52XX)
545 # if defined (CONFIG_STK52XX_REV100)
546 # define CFG_GPS_PORT_CONFIG 0x81500014
547 # else /* STK52xx REV200 and above */
548 # if defined (CONFIG_TQM5200_REV100)
549 # error TQM5200 REV100 not supported on STK52XX REV200 or above
550 # else/* TQM5200 REV200 and above */
551 # define CFG_GPS_PORT_CONFIG 0x91500404
552 # endif
553 # endif
554 #elif defined (CONFIG_FO300)
555 # define CFG_GPS_PORT_CONFIG 0x91502c24
556 #elif defined (CONFIG_CAM5200)
557 # define CFG_GPS_PORT_CONFIG 0x8050A444
558 #else /* TMQ5200 Inbetriebnahme-Board */
559 # define CFG_GPS_PORT_CONFIG 0x81000004
560 #endif
561
562 /*
563 * RTC configuration
564 */
565 #if defined (CONFIG_STK52XX) && !defined (CONFIG_STK52XX_REV100)
566 # define CONFIG_RTC_M41T11 1
567 # define CFG_I2C_RTC_ADDR 0x68
568 # define CFG_M41T11_BASE_YEAR 1900 /* because Linux uses the same base
569 year */
570 #else
571 # define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
572 #endif
573
574 /*
575 * Miscellaneous configurable options
576 */
577 #define CFG_LONGHELP /* undef to save memory */
578 #define CFG_PROMPT "=> " /* Monitor Command Prompt */
579
580 #define CONFIG_CMDLINE_EDITING 1 /* add command line history */
581 #define CFG_HUSH_PARSER 1 /* use "hush" command parser */
582 #define CFG_PROMPT_HUSH_PS2 "> "
583
584 #define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
585 #if defined(CONFIG_CMD_KGDB)
586 #define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
587 #endif
588
589 #if defined(CONFIG_CMD_KGDB)
590 #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
591 #else
592 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
593 #endif
594 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
595 #define CFG_MAXARGS 16 /* max number of command args */
596 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
597
598 /* Enable an alternate, more extensive memory test */
599 #define CFG_ALT_MEMTEST
600
601 #define CFG_MEMTEST_START 0x00100000 /* memtest works on */
602 #define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
603
604 #define CFG_LOAD_ADDR 0x100000 /* default load address */
605
606 #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
607
608 /*
609 * Enable loopw command.
610 */
611 #define CONFIG_LOOPW
612
613 /*
614 * Various low-level settings
615 */
616 #if defined(CONFIG_MPC5200)
617 #define CFG_HID0_INIT HID0_ICE | HID0_ICFI
618 #define CFG_HID0_FINAL HID0_ICE
619 #else
620 #define CFG_HID0_INIT 0
621 #define CFG_HID0_FINAL 0
622 #endif
623
624 #define CFG_BOOTCS_START CFG_FLASH_BASE
625 #define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
626 #ifdef CFG_PCICLK_EQUALS_IPBCLK_DIV2
627 #define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
628 #else
629 #define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
630 #endif
631 #define CFG_CS0_START CFG_FLASH_BASE
632 #define CFG_CS0_SIZE CFG_FLASH_SIZE
633
634 #define CONFIG_LAST_STAGE_INIT
635
636 /*
637 * SRAM - Do not map below 2 GB in address space, because this area is used
638 * for SDRAM autosizing.
639 */
640 #define CFG_CS2_START 0xE5000000
641 #define CFG_CS2_SIZE 0x100000 /* 1 MByte */
642 #define CFG_CS2_CFG 0x0004D930
643
644 /*
645 * Grafic controller - Do not map below 2 GB in address space, because this
646 * area is used for SDRAM autosizing.
647 */
648 #define SM501_FB_BASE 0xE0000000
649 #define CFG_CS1_START (SM501_FB_BASE)
650 #define CFG_CS1_SIZE 0x4000000 /* 64 MByte */
651 #define CFG_CS1_CFG 0x8F48FF70
652 #define SM501_MMIO_BASE CFG_CS1_START + 0x03E00000
653
654 #define CFG_CS_BURST 0x00000000
655 #define CFG_CS_DEADCYCLE 0x33333311 /* 1 dead cycle for flash and SM501 */
656
657 #if defined(CONFIG_CAM5200)
658 #define CFG_CS4_START 0xB0000000
659 #define CFG_CS4_SIZE 0x00010000
660 #define CFG_CS4_CFG 0x01019C10
661
662 #define CFG_CS5_START 0xD0000000
663 #define CFG_CS5_SIZE 0x01208000
664 #define CFG_CS5_CFG 0x1414BF10
665 #endif
666
667 #define CFG_RESET_ADDRESS 0xff000000
668
669 /*-----------------------------------------------------------------------
670 * USB stuff
671 *-----------------------------------------------------------------------
672 */
673 #define CONFIG_USB_CLOCK 0x0001BBBB
674 #define CONFIG_USB_CONFIG 0x00001000
675
676 /*-----------------------------------------------------------------------
677 * IDE/ATA stuff Supports IDE harddisk
678 *-----------------------------------------------------------------------
679 */
680
681 #undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
682
683 #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
684 #undef CONFIG_IDE_LED /* LED for ide not supported */
685
686 #define CONFIG_IDE_RESET /* reset for ide supported */
687 #define CONFIG_IDE_PREINIT
688
689 #define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
690 #define CFG_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
691
692 #define CFG_ATA_IDE0_OFFSET 0x0000
693
694 #define CFG_ATA_BASE_ADDR MPC5XXX_ATA
695
696 /* Offset for data I/O */
697 #define CFG_ATA_DATA_OFFSET (0x0060)
698
699 /* Offset for normal register accesses */
700 #define CFG_ATA_REG_OFFSET (CFG_ATA_DATA_OFFSET)
701
702 /* Offset for alternate registers */
703 #define CFG_ATA_ALT_OFFSET (0x005C)
704
705 /* Interval between registers */
706 #define CFG_ATA_STRIDE 4
707
708 /*-----------------------------------------------------------------------
709 * Open firmware flat tree support
710 *-----------------------------------------------------------------------
711 */
712 #define CONFIG_OF_LIBFDT 1
713 #define CONFIG_OF_BOARD_SETUP 1
714
715 #define OF_CPU "PowerPC,5200@0"
716 #define OF_SOC "soc5200@f0000000"
717 #define OF_TBCLK (bd->bi_busfreq / 4)
718 #define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
719
720 #endif /* __CONFIG_H */