include/configs/VCMA9.h

   1 /*
   2  * (C) Copyright 2002, 2003
   3  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   4  * Marius Groeger <mgroeger@sysgo.de>
   5  * Gary Jennejohn <gj@denx.de>
   6  * David Mueller <d.mueller@elsoft.ch>
   7  *
   8  * Configuation settings for the MPL VCMA9 board.
   9  *
  10  * See file CREDITS for list of people who contributed to this
  11  * project.
  12  *
  13  * This program is free software; you can redistribute it and/or
  14  * modify it under the terms of the GNU General Public License as
  15  * published by the Free Software Foundation; either version 2 of
  16  * the License, or (at your option) any later version.
  17  *
  18  * This program is distributed in the hope that it will be useful,
  19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21  * GNU General Public License for more details.
  22  *
  23  * You should have received a copy of the GNU General Public License
  24  * along with this program; if not, write to the Free Software
  25  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  26  * MA 02111-1307 USA
  27  */
  28
  29 #ifndef __CONFIG_H
  30 #define __CONFIG_H
  31
  32 /*
  33  * High Level Configuration Options
  34  * (easy to change)
  35  */
  36 #define CONFIG_ARM920T          1       /* This is an ARM920T Core      */
  37 #define CONFIG_S3C2410          1       /* in a SAMSUNG S3C2410 SoC     */
  38 #define CONFIG_VCMA9            1       /* on a MPL VCMA9 Board  */
  39 #define LITTLEENDIAN            1       /* used by usb_ohci.c           */
  40
  41 /* input clock of PLL */
  42 #define CONFIG_SYS_CLK_FREQ     12000000/* VCMA9 has 12MHz input clock  */
  43
  44 #define USE_920T_MMU            1
  45 #undef CONFIG_USE_IRQ                   /* we don't need IRQ/FIQ stuff  */
  46
  47 #define CONFIG_CMDLINE_TAG       1      /* enable passing of ATAGs      */
  48 #define CONFIG_SETUP_MEMORY_TAGS 1
  49 #define CONFIG_INITRD_TAG        1
  50
  51
  52 /*
  53  * BOOTP options
  54  */
  55 #define CONFIG_BOOTP_BOOTFILESIZE
  56 #define CONFIG_BOOTP_BOOTPATH
  57 #define CONFIG_BOOTP_GATEWAY
  58 #define CONFIG_BOOTP_HOSTNAME
  59
  60
  61 /*
  62  * Command line configuration.
  63  */
  64 #include <config_cmd_default.h>
  65
  66 #define CONFIG_CMD_CACHE
  67 #define CONFIG_CMD_EEPROM
  68 #define CONFIG_CMD_I2C
  69 #define CONFIG_CMD_USB
  70 #define CONFIG_CMD_REGINFO
  71 #define CONFIG_CMD_FAT
  72 #define CONFIG_CMD_DATE
  73 #define CONFIG_CMD_ELF
  74 #define CONFIG_CMD_DHCP
  75 #define CONFIG_CMD_PING
  76 #define CONFIG_CMD_BSP
  77
  78
  79 #define CONFIG_SYS_HUSH_PARSER
  80 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
  81 /***********************************************************
  82  * I2C stuff:
  83  * the MPL VCMA9 is equipped with an ATMEL 24C256 EEPROM at
  84  * address 0x50 with 16bit addressing
  85  ***********************************************************/
  86 #define CONFIG_HARD_I2C                 /* I2C with hardware support */
  87 #define CONFIG_SYS_I2C_SPEED            100000  /* I2C speed */
  88 #define CONFIG_SYS_I2C_SLAVE            0x7F    /* I2C slave addr */
  89
  90 #define CONFIG_SYS_I2C_EEPROM_ADDR      0x50
  91 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  2
  92 #define CONFIG_ENV_IS_IN_EEPROM 1       /* use EEPROM for environment vars */
  93 #define CONFIG_ENV_OFFSET               0x000   /* environment starts at offset 0 */
  94 #define CONFIG_ENV_SIZE         0x800   /* 2KB should be more than enough */
  95
  96 #undef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
  97 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6     /* 64 bytes page write mode on 24C256 */
  98 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
  99
 100 /*
 101  * Size of malloc() pool
 102  */
 103 /*#define CONFIG_MALLOC_SIZE    (CONFIG_ENV_SIZE + 128*1024)*/
 104 #define CONFIG_SYS_GBL_DATA_SIZE        128             /* size in bytes reserved for initial data */
 105
 106 #define CONFIG_SYS_MONITOR_LEN          (256 * 1024)
 107 #define CONFIG_SYS_MALLOC_LEN           (1024 * 1024)   /* BUNZIP2 needs a lot of RAM */
 108
 109 /*
 110  * Hardware drivers
 111  */
 112 #define CONFIG_DRIVER_CS8900    1               /* we have a CS8900 on-board */
 113 #define CS8900_BASE             0x20000300
 114 #define CS8900_BUS16            1               /* the Linux driver does accesses as shorts */
 115
 116 #define CONFIG_DRIVER_S3C24X0_I2C       1       /* we use the buildin I2C controller */
 117
 118 /*
 119  * select serial console configuration
 120  */
 121 #define CONFIG_SERIAL1          1       /* we use SERIAL 1 on VCMA9 */
 122
 123 /************************************************************
 124  * USB support
 125  ************************************************************/
 126 #define CONFIG_USB_OHCI         1
 127 #define CONFIG_USB_KEYBOARD     1
 128 #define CONFIG_USB_STORAGE      1
 129 #define CONFIG_DOS_PARTITION    1
 130
 131 /* Enable needed helper functions */
 132 #define CONFIG_SYS_DEVICE_DEREGISTER            /* needs device_deregister */
 133
 134 /************************************************************
 135  * RTC
 136  ************************************************************/
 137 #define CONFIG_RTC_S3C24X0      1
 138
 139
 140 /* allow to overwrite serial and ethaddr */
 141 #define CONFIG_ENV_OVERWRITE
 142
 143 #define CONFIG_BAUDRATE         9600
 144
 145 #define CONFIG_BOOTDELAY        5
 146 /* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */
 147 /* #define CONFIG_BOOT_RETRY_TIME       -10     /XXX* feature is available but not enabled */
 148 #define CONFIG_ZERO_BOOTDELAY_CHECK     /* check console even if bootdelay = 0 */
 149
 150 #define CONFIG_NETMASK          255.255.255.0
 151 #define CONFIG_IPADDR           10.0.0.110
 152 #define CONFIG_SERVERIP         10.0.0.1
 153
 154 #if defined(CONFIG_CMD_KGDB)
 155 #define CONFIG_KGDB_BAUDRATE    115200          /* speed to run kgdb serial port */
 156 /* what's this ? it's not used anywhere */
 157 #define CONFIG_KGDB_SER_INDEX   1               /* which serial port to use */
 158 #endif
 159
 160 /*
 161  * Miscellaneous configurable options
 162  */
 163 #define CONFIG_SYS_LONGHELP                             /* undef to save memory         */
 164 #define CONFIG_SYS_PROMPT               "VCMA9 # "      /* Monitor Command Prompt       */
 165 #define CONFIG_SYS_CBSIZE               256             /* Console I/O Buffer Size      */
 166 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
 167 #define CONFIG_SYS_MAXARGS              16              /* max number of command args   */
 168 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size    */
 169
 170 #define CONFIG_SYS_MEMTEST_START        0x30000000      /* memtest works on     */
 171 #define CONFIG_SYS_MEMTEST_END          0x30F80000      /* 15.5 MB in DRAM      */
 172
 173 #define CONFIG_SYS_ALT_MEMTEST
 174 #define CONFIG_SYS_LOAD_ADDR            0x30800000      /* default load address */
 175
 176
 177 #undef  CONFIG_SYS_CLKS_IN_HZ           /* everything, incl board info, in Hz */
 178
 179 /* we configure PWM Timer 4 to 1us ~ 1MHz */
 180 /*#define       CONFIG_SYS_HZ                   1000000 */
 181 #define CONFIG_SYS_HZ                   1562500
 182
 183 /* valid baudrates */
 184 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
 185
 186 /* support BZIP2 compression */
 187 #define CONFIG_BZIP2            1
 188
 189 /************************************************************
 190  * Ident
 191  ************************************************************/
 192 /*#define VERSION_TAG "released"*/
 193 #define VERSION_TAG "unstable"
 194 #define CONFIG_IDENT_STRING "\n(c) 2003 by MPL AG Switzerland, MEV-10080-001 " VERSION_TAG
 195
 196 /*-----------------------------------------------------------------------
 197  * Stack sizes
 198  *
 199  * The stack sizes are set up in start.S using the settings below
 200  */
 201 #define CONFIG_STACKSIZE        (128*1024)      /* regular stack */
 202 #ifdef CONFIG_USE_IRQ
 203 #define CONFIG_STACKSIZE_IRQ    (4*1024)        /* IRQ stack */
 204 #define CONFIG_STACKSIZE_FIQ    (4*1024)        /* FIQ stack */
 205 #endif
 206
 207 /*-----------------------------------------------------------------------
 208  * Physical Memory Map
 209  */
 210 #define CONFIG_NR_DRAM_BANKS    1          /* we have 1 bank of DRAM */
 211 #define PHYS_SDRAM_1            0x30000000 /* SDRAM Bank #1 */
 212 #define PHYS_FLASH_1            0x00000000 /* Flash Bank #1 */
 213
 214 #define CONFIG_SYS_FLASH_BASE           PHYS_FLASH_1
 215
 216 /*-----------------------------------------------------------------------
 217  * FLASH and environment organization
 218  */
 219
 220 #define CONFIG_AMD_LV400        1       /* uncomment this if you have a LV400 flash */
 221 #if 0
 222 #define CONFIG_AMD_LV800        1       /* uncomment this if you have a LV800 flash */
 223 #endif
 224
 225 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max number of memory banks */
 226 #ifdef CONFIG_AMD_LV800
 227 #define PHYS_FLASH_SIZE         0x00100000 /* 1MB */
 228 #define CONFIG_SYS_MAX_FLASH_SECT       (19)    /* max number of sectors on one chip */
 229 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x0F0000) /* addr of environment */
 230 #endif
 231 #ifdef CONFIG_AMD_LV400
 232 #define PHYS_FLASH_SIZE         0x00080000 /* 512KB */
 233 #define CONFIG_SYS_MAX_FLASH_SECT       (11)    /* max number of sectors on one chip */
 234 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x070000) /* addr of environment */
 235 #endif
 236
 237 /* timeout values are in ticks */
 238 #define CONFIG_SYS_FLASH_ERASE_TOUT     (5*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
 239 #define CONFIG_SYS_FLASH_WRITE_TOUT     (5*CONFIG_SYS_HZ) /* Timeout for Flash Write */
 240
 241 #if 0
 242 #define CONFIG_ENV_IS_IN_FLASH  1
 243 #define CONFIG_ENV_SIZE         0x10000 /* Total Size of Environment Sector */
 244 #endif
 245
 246
 247 #define CONFIG_SYS_JFFS2_FIRST_BANK     0
 248 #define CONFIG_SYS_JFFS2_NUM_BANKS      1
 249
 250 #define MULTI_PURPOSE_SOCKET_ADDR 0x08000000
 251
 252 /*-----------------------------------------------------------------------
 253  * NAND flash settings
 254  */
 255 #if defined(CONFIG_CMD_NAND)
 256
 257 #define CONFIG_NAND_LEGACY
 258 #define CONFIG_SYS_MAX_NAND_DEVICE      1       /* Max number of NAND devices           */
 259 #define SECTORSIZE 512
 260
 261 #define ADDR_COLUMN 1
 262 #define ADDR_PAGE 2
 263 #define ADDR_COLUMN_PAGE 3
 264
 265 #define NAND_ChipID_UNKNOWN     0x00
 266 #define NAND_MAX_FLOORS 1
 267
 268 #define NAND_WAIT_READY(nand)   NF_WaitRB()
 269
 270 #define NAND_DISABLE_CE(nand)   NF_SetCE(NFCE_HIGH)
 271 #define NAND_ENABLE_CE(nand)    NF_SetCE(NFCE_LOW)
 272
 273
 274 #define WRITE_NAND_COMMAND(d, adr)      NF_Cmd(d)
 275 #define WRITE_NAND_COMMANDW(d, adr)     NF_CmdW(d)
 276 #define WRITE_NAND_ADDRESS(d, adr)      NF_Addr(d)
 277 #define WRITE_NAND(d, adr)              NF_Write(d)
 278 #define READ_NAND(adr)                  NF_Read()
 279 /* the following functions are NOP's because S3C24X0 handles this in hardware */
 280 #define NAND_CTL_CLRALE(nandptr)
 281 #define NAND_CTL_SETALE(nandptr)
 282 #define NAND_CTL_CLRCLE(nandptr)
 283 #define NAND_CTL_SETCLE(nandptr)
 284
 285 #define CONFIG_MTD_NAND_VERIFY_WRITE    1
 286 #define CONFIG_MTD_NAND_ECC_JFFS2       1
 287
 288 #endif
 289
 290 #endif  /* __CONFIG_H */