include/configs/VoVPN-GW.h

   1 /*
   2  * (C) Copyright 2004
   3  * Elmeg Communications Systems GmbH, Juergen Selent (j.selent@elmeg.de)
   4  *
   5  * Support for the Elmeg VoVPN Gateway Module
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 of
  10  * the License, or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20  * MA 02111-1307 USA
  21  */
  22
  23 #ifndef __CONFIG_H
  24 #define __CONFIG_H
  25
  26 /* define cpu used */
  27 #define CONFIG_MPC8272                  1
  28
  29 /* define busmode: 8260 */
  30 #undef  CONFIG_BUSMODE_60x
  31
  32 #define CONFIG_SYS_TEXT_BASE            0xfff00000
  33
  34 /* system clock rate (CLKIN) - equal to the 60x and local bus speed */
  35 #ifdef  CONFIG_CLKIN_66MHz
  36 #define CONFIG_8260_CLKIN               66666666        /* in Hz */
  37 #else
  38 #define CONFIG_8260_CLKIN               100000000       /* in Hz */
  39 #endif
  40
  41 /* call board_early_init_f */
  42 #define CONFIG_BOARD_EARLY_INIT_F       1
  43
  44 /* have misc_init_r() function */
  45 #define CONFIG_MISC_INIT_R              1
  46
  47 /* have reset_phy_r() function */
  48 #define CONFIG_RESET_PHY_R              1
  49
  50 /* have special reset function */
  51 #define CONFIG_HAVE_OWN_RESET           1
  52
  53 /* allow serial and ethaddr to be overwritten */
  54 #define CONFIG_ENV_OVERWRITE
  55
  56 /* watchdog disabled */
  57 #undef  CONFIG_WATCHDOG
  58
  59 /* include support for bzip2 compressed images */
  60 #undef  CONFIG_BZIP2
  61
  62 /* status led */
  63 #undef  CONFIG_STATUS_LED               /* XXX jse */
  64
  65 /* vendor parameter protection */
  66 #define CONFIG_ENV_OVERWRITE
  67
  68 /*
  69  * select serial console configuration
  70  *
  71  * if either CONFIG_CONS_ON_SMC or CONFIG_CONS_ON_SCC is selected, then
  72  * CONFIG_CONS_INDEX must be set to the channel number (1-2 for SMC, 1-4
  73  * for SCC).
  74  */
  75 #define CONFIG_CONS_ON_SMC
  76 #undef  CONFIG_CONS_ON_SCC
  77 #undef  CONFIG_CONS_NONE
  78 #define CONFIG_CONS_INDEX               1
  79
  80 /* serial port default baudrate */
  81 #define CONFIG_BAUDRATE                 115200
  82
  83 /* echo on for serial download  */
  84 #define CONFIG_LOADS_ECHO               1
  85
  86 /* don't allow baudrate change  */
  87 #undef  CONFIG_SYS_LOADS_BAUD_CHANGE
  88
  89 /* supported baudrates */
  90 #define CONFIG_SYS_BAUDRATE_TABLE               { 9600, 19200, 38400, 57600, 115200 }
  91
  92 /*
  93  * select ethernet configuration
  94  *
  95  * if either CONFIG_ETHER_ON_SCC or CONFIG_ETHER_ON_FCC is selected, then
  96  * CONFIG_ETHER_INDEX must be set to the channel number (1-4 for SCC, 1-3
  97  * for FCC)
  98  *
  99  * if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be
 100  * defined elsewhere (as for the console), or CONFIG_CMD_NET must be unset.
 101  */
 102 #undef  CONFIG_ETHER_ON_SCC
 103 #define CONFIG_ETHER_ON_FCC
 104 #undef  CONFIG_ETHER_NONE
 105
 106 #ifdef  CONFIG_ETHER_ON_FCC
 107
 108 /* which SCC/FCC channel for ethernet */
 109 #define CONFIG_ETHER_INDEX              1
 110
 111 /* Marvell Switch SMI base addr */
 112 #define CONFIG_SYS_PHY_ADDR                     0x10
 113
 114 /* FCC1 RMII REFCLK is CLK10 */
 115 #define CONFIG_SYS_CMXFCR_VALUE         CMXFCR_TF1CS_CLK10
 116 #define CONFIG_SYS_CMXFCR_MASK                  (CMXFCR_FC1|CMXFCR_TF1CS_MSK)
 117
 118 /* BDs and buffers on 60x bus */
 119 #define CONFIG_SYS_CPMFCR_RAMTYPE               0
 120
 121 /* Local Protect, Full duplex, Flowcontrol, RMII */
 122 #define CONFIG_SYS_FCC_PSMR                     (FCC_PSMR_LPB|FCC_PSMR_FDE|\
 123                                          FCC_PSMR_FCE|FCC_PSMR_RMII)
 124
 125 /* bit-bang MII PHY management  */
 126 #define CONFIG_BITBANGMII
 127
 128 #define MDIO_PORT                       1               /* Port B */
 129
 130 #define MDIO_DECLARE            volatile ioport_t *iop = ioport_addr ( \
 131                                         (immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
 132 #define MDC_DECLARE             MDIO_DECLARE
 133
 134 #define CONFIG_SYS_MDIO_PIN                     0x00002000      /* PB18 */
 135 #define CONFIG_SYS_MDC_PIN                      0x00001000      /* PB19 */
 136 #define MDIO_ACTIVE                     (iop->pdir |=  CONFIG_SYS_MDIO_PIN)
 137 #define MDIO_TRISTATE                   (iop->pdir &= ~CONFIG_SYS_MDIO_PIN)
 138 #define MDIO_READ                       ((iop->pdat &  CONFIG_SYS_MDIO_PIN) != 0)
 139 #define MDIO(bit)                       if(bit) iop->pdat |=  CONFIG_SYS_MDIO_PIN; \
 140                                         else    iop->pdat &= ~CONFIG_SYS_MDIO_PIN
 141 #define MDC(bit)                        if(bit) iop->pdat |=  CONFIG_SYS_MDC_PIN; \
 142                                         else    iop->pdat &= ~CONFIG_SYS_MDC_PIN
 143 #define MIIDELAY                        udelay(1)
 144
 145 #endif
 146
 147 /*
 148  * BOOTP options
 149  */
 150 #define CONFIG_BOOTP_BOOTFILESIZE
 151 #define CONFIG_BOOTP_BOOTPATH
 152 #define CONFIG_BOOTP_GATEWAY
 153 #define CONFIG_BOOTP_HOSTNAME
 154
 155
 156 /*
 157  * Command line configuration.
 158  */
 159
 160 #define CONFIG_CMD_BDI
 161 #define CONFIG_CMD_CONSOLE
 162 #define CONFIG_CMD_ECHO
 163 #define CONFIG_CMD_FLASH
 164 #define CONFIG_CMD_IMI
 165 #define CONFIG_CMD_IMLS
 166 #define CONFIG_CMD_LOADB
 167 #define CONFIG_CMD_MEMORY
 168 #define CONFIG_CMD_MISC
 169 #define CONFIG_CMD_NET
 170 #define CONFIG_CMD_PING
 171 #define CONFIG_CMD_RUN
 172 #define CONFIG_CMD_SAVEENV
 173 #define CONFIG_CMD_SOURCE
 174
 175
 176 /*
 177  * boot options & environment
 178  */
 179 #define CONFIG_BOOTDELAY                3
 180 #define CONFIG_BOOTCOMMAND              "run flash_self"
 181 #undef  CONFIG_BOOTARGS
 182 #define CONFIG_EXTRA_ENV_SETTINGS       \
 183 "clean_nv=erase fff20000 ffffffff\0" \
 184 "update_boss=tftp 100000 PPC/logic157.bin; protect off fff00000 ffffffff; erase fff00000 ffffffff; cp.b 100000 fff00000 ${filesize}; tftp 100000 PPC/bootmon157.bin; cp.b 100000 fff20000 ${filesize}\0" \
 185 "update_lx=tftp 100000 ${kernel}; erase ${kernel_addr} ffefffff; cp.b 100000 ${kernel_addr} ${filesize}\0" \
 186 "update_fs=tftp 100000 ${fs}.${fstype}; erase ff840000 ffdfffff; cp.b 100000 ff840000 ${filesize}\0" \
 187 "update_ub=tftp 100000 ${uboot}; protect off fff00000 fff1ffff; erase fff00000 fff1ffff; cp.b 100000 fff00000 ${filesize}; protect off ff820000 ff83ffff; erase ff820000 ff83ffff\0" \
 188 "flashargs=setenv bootargs root=${rootdev} rw rootfstype=${fstype}\0" \
 189 "nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath}\0" \
 190 "addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off\0" \
 191 "addmisc=setenv bootargs ${bootargs} console=${console},${baudrate} ethaddr=${ethaddr} panic=1\0" \
 192 "net_nfs=tftpboot 400000 ${kernel}; run nfsargs addip addmisc; bootm\0" \
 193 "net_self=tftpboot 400000 ${kernel}; run flashargs addmisc; bootm\0" \
 194 "flash_self=run flashargs addmisc; bootm ${kernel_addr}\0" \
 195 "flash_nfs=run nfsargs addip addmisc; bootm ${kernel_addr}\0" \
 196 "fstype=cramfs\0" \
 197 "rootpath=/root_fs\0" \
 198 "uboot=PPC/u-boot.bin\0" \
 199 "kernel=PPC/uImage\0" \
 200 "kernel_addr=ffe00000\0" \
 201 "fs=PPC/root_fs\0" \
 202 "console=ttyS0\0" \
 203 "netdev=eth0\0" \
 204 "rootdev=31:3\0" \
 205 "ethaddr=00:09:4f:01:02:03\0" \
 206 "ipaddr=10.0.0.201\0" \
 207 "netmask=255.255.255.0\0" \
 208 "serverip=10.0.0.136\0" \
 209 "gatewayip=10.0.0.10\0" \
 210 "hostname=bastard\0" \
 211 ""
 212
 213
 214 /*
 215  * miscellaneous configurable options
 216  */
 217
 218 /* undef to save memory */
 219 #define CONFIG_SYS_LONGHELP
 220
 221 /* monitor command prompt */
 222 #define CONFIG_SYS_PROMPT                       "=> "
 223
 224 /* console i/o buffer size */
 225 #if defined(CONFIG_CMD_KGDB)
 226 #define CONFIG_SYS_CBSIZE                       1024
 227 #else
 228 #define CONFIG_SYS_CBSIZE                       256
 229 #endif
 230
 231 /* print buffer size */
 232 #define CONFIG_SYS_PBSIZE                       (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 233
 234 /* max number of command args */
 235 #define CONFIG_SYS_MAXARGS                      16
 236
 237 /* boot argument buffer size */
 238 #define CONFIG_SYS_BARGSIZE                     CONFIG_SYS_CBSIZE
 239
 240 /* memtest works on */
 241 #define CONFIG_SYS_MEMTEST_START                0x00100000
 242 /* 1 ... 15 MB in DRAM */
 243 #define CONFIG_SYS_MEMTEST_END                  0x00f00000
 244 /* full featured memtest */
 245 #define CONFIG_SYS_ALT_MEMTEST
 246
 247 /* default load address */
 248 #define CONFIG_SYS_LOAD_ADDR                    0x00100000
 249
 250 /* decrementer freq: 1 ms ticks */
 251 #define CONFIG_SYS_HZ                           1000
 252
 253 /* configure flash */
 254 #define CONFIG_SYS_FLASH_BASE                   0xff800000
 255 #define CONFIG_SYS_MAX_FLASH_BANKS              1
 256 #define CONFIG_SYS_MAX_FLASH_SECT               64
 257 #define CONFIG_SYS_FLASH_SIZE                   8
 258 #undef  CONFIG_SYS_FLASH_16BIT
 259 #define CONFIG_SYS_FLASH_ERASE_TOUT             240000
 260 #define CONFIG_SYS_FLASH_WRITE_TOUT             500
 261 #define CONFIG_SYS_FLASH_LOCK_TOUT              500
 262 #define CONFIG_SYS_FLASH_UNLOCK_TOUT            10000
 263 #define CONFIG_SYS_FLASH_PROTECTION
 264
 265 /* monitor in flash */
 266 #define CONFIG_SYS_MONITOR_OFFSET               0x00700000
 267
 268 /* environment in flash */
 269 #define CONFIG_ENV_IS_IN_FLASH          1
 270 #define CONFIG_ENV_ADDR                 (CONFIG_SYS_FLASH_BASE + 0x00020000)
 271 #define CONFIG_ENV_SIZE                 0x00020000
 272 #define CONFIG_ENV_SECT_SIZE            0x00020000
 273
 274 /*
 275  * Initial memory map for linux
 276  * For booting Linux, the board info and command line data
 277  * have to be in the first 8 MB of memory, since this is
 278  * the maximum mapped by the Linux kernel during initialization.
 279  */
 280 #define CONFIG_SYS_BOOTMAPSZ                    (8 << 20)
 281
 282 /* hard reset configuration words */
 283 #ifdef  CONFIG_CLKIN_66MHz
 284 #define CONFIG_SYS_HRCW_MASTER                  0x04643050
 285 #else
 286 #error NO HRCW FOR 100MHZ SPECIFIED !!!
 287 #endif
 288 #define CONFIG_SYS_HRCW_SLAVE1                  0x00000000
 289 #define CONFIG_SYS_HRCW_SLAVE2                  0x00000000
 290 #define CONFIG_SYS_HRCW_SLAVE3                  0x00000000
 291 #define CONFIG_SYS_HRCW_SLAVE4                  0x00000000
 292 #define CONFIG_SYS_HRCW_SLAVE5                  0x00000000
 293 #define CONFIG_SYS_HRCW_SLAVE6                  0x00000000
 294 #define CONFIG_SYS_HRCW_SLAVE7                  0x00000000
 295
 296 /* internal memory mapped register */
 297 #define CONFIG_SYS_IMMR                 0xF0000000
 298
 299 /* definitions for initial stack pointer and data area (in DPRAM) */
 300 #define CONFIG_SYS_INIT_RAM_ADDR                CONFIG_SYS_IMMR
 301 #define CONFIG_SYS_INIT_RAM_SIZE                0x2000
 302 #define CONFIG_SYS_GBL_DATA_OFFSET              (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 303 #define CONFIG_SYS_INIT_SP_OFFSET               CONFIG_SYS_GBL_DATA_OFFSET
 304
 305 /*
 306  * Start addresses for the final memory configuration
 307  * (Set up by the startup code)
 308  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
 309  */
 310 #define CONFIG_SYS_SDRAM_BASE                   0x00000000
 311 #define CONFIG_SYS_SDRAM_SIZE                   (32*1024*1024)
 312 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_TEXT_BASE
 313 #define CONFIG_SYS_MONITOR_FLASH                (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_OFFSET)
 314 #define CONFIG_SYS_MONITOR_LEN                  0x00020000
 315 #define CONFIG_SYS_MALLOC_LEN                   0x00020000
 316
 317 /* cache configuration */
 318 #define CONFIG_SYS_CACHELINE_SIZE               32      /* for MPC8260 */
 319 #if defined(CONFIG_CMD_KGDB)
 320 #define CONFIG_SYS_CACHELINE_SHIFT              5       /* log base 2 of above */
 321 #endif
 322
 323 /*
 324  * HIDx - Hardware Implementation-dependent Registers
 325  *-----------------------------------------------------------------------
 326  * HID0 also contains cache control - initially enable both caches and
 327  * invalidate contents, then the final state leaves only the instruction
 328  * cache enabled. Note that Power-On and Hard reset invalidate the caches,
 329  * but Soft reset does not.
 330  *
 331  * HID1 has only read-only information - nothing to set.
 332  */
 333 #define CONFIG_SYS_HID0_INIT                    (HID0_ICE|HID0_DCE|\
 334                                          HID0_ICFI|HID0_DCI|HID0_IFEM|HID0_ABE)
 335 #define CONFIG_SYS_HID0_FINAL                   (HID0_IFEM|HID0_ABE)
 336 #define CONFIG_SYS_HID2                 0
 337
 338 /* RMR - reset mode register - turn on checkstop reset enable */
 339 #define CONFIG_SYS_RMR                          RMR_CSRE
 340
 341 /* BCR - bus configuration */
 342 #define CONFIG_SYS_BCR                          0x00000000
 343
 344 /* SIUMCR - siu module configuration */
 345 #define CONFIG_SYS_SIUMCR                       0x4905c000
 346
 347 /* SYPCR - system protection control */
 348 #if defined(CONFIG_WATCHDOG)
 349 #define CONFIG_SYS_SYPCR                        0xffffff87
 350 #else
 351 #define CONFIG_SYS_SYPCR                        0xffffff83
 352 #endif
 353
 354 /* TMCNTSC - time counter status and control */
 355 /* clear interrupts XXX jse */
 356 /*#define CONFIG_SYS_TMCNTSC                    (TMCNTSC_SEC|TMCNTSC_ALR) */
 357 #define CONFIG_SYS_TMCNTSC                      (TMCNTSC_SEC|TMCNTSC_ALR|\
 358                                          TMCNTSC_TCF|TMCNTSC_TCE)
 359
 360 /* PISCR - periodic interrupt status and control */
 361 /* clear interrupts XXX jse */
 362 /*#define CONFIG_SYS_PISCR                      (PISCR_PS) */
 363 #define CONFIG_SYS_PISCR                        (PISCR_PS|PISCR_PTF|PISCR_PTE)
 364
 365 /* SCCR - system clock control */
 366 #define CONFIG_SYS_SCCR                 0x000001a9
 367
 368 /* RCCR - risc controller configuration */
 369 #define CONFIG_SYS_RCCR                 0
 370
 371 /*
 372  * MEMORY MAP
 373  * ----------
 374  * CS0 - FLASH    8MB/8Bit      base=0xff800000 (boot: 0xfe000000, 8x mirrored)
 375  * CS1 - SDRAM   32MB/64Bit     base=0x00000000
 376  * CS2 - DSP/SL1  1MB/16Bit     base=0xf0100000
 377  * CS3 - DSP/SL2  1MB/16Bit     base=0xf0200000
 378  * CS4 - DSP/SL3  1MB/16Bit     base=0xf0300000
 379  * CS5 - DSP/SL4  1MB/16Bit     base=0xf0400000
 380  * CS7 - DPRAM    1KB/8Bit      base=0xf0500000, size=32KB (32x mirrored)
 381  *  x  - IMMR     384KB         base=0xf0000000
 382  */
 383 /* XXX jse 100MHz TODO */
 384 #define CONFIG_SYS_BR0_PRELIM                   0xff800801
 385 #define CONFIG_SYS_OR0_PRELIM                   0xff801e44
 386 #define CONFIG_SYS_BR1_PRELIM                   0x00000041
 387 #define CONFIG_SYS_OR1_PRELIM                   0xfe002ec0
 388 #if 1
 389 #define CONFIG_SYS_BR2_PRELIM                   0xf0101001
 390 #define CONFIG_SYS_OR2_PRELIM                   0xfff00ef4
 391 #define CONFIG_SYS_BR3_PRELIM                   0xf0201001
 392 #define CONFIG_SYS_OR3_PRELIM                   0xfff00ef4
 393 #define CONFIG_SYS_BR4_PRELIM                   0xf0301001
 394 #define CONFIG_SYS_OR4_PRELIM                   0xfff00ef4
 395 #define CONFIG_SYS_BR5_PRELIM                   0xf0401001
 396 #define CONFIG_SYS_OR5_PRELIM                   0xfff00ef4
 397 #else
 398 #define CONFIG_SYS_BR2_PRELIM                   0xf0101081
 399 #define CONFIG_SYS_OR2_PRELIM                   0xfff00104
 400 #define CONFIG_SYS_BR3_PRELIM                   0xf0201081
 401 #define CONFIG_SYS_OR3_PRELIM                   0xfff00104
 402 #define CONFIG_SYS_BR4_PRELIM                   0xf0301081
 403 #define CONFIG_SYS_OR4_PRELIM                   0xfff00104
 404 #define CONFIG_SYS_BR5_PRELIM                   0xf0401081
 405 #define CONFIG_SYS_OR5_PRELIM                   0xfff00104
 406 #endif
 407 #define CONFIG_SYS_BR7_PRELIM                   0xf0500881
 408 #define CONFIG_SYS_OR7_PRELIM                   0xffff8104
 409 #define CONFIG_SYS_MPTPR                        0x2700
 410 #define CONFIG_SYS_PSDMR                        0x822a2452      /* optimal */
 411 /*#define CONFIG_SYS_PSDMR                      0x822a48a3 */   /* relaxed */
 412 #define CONFIG_SYS_PSRT                 0x1a
 413
 414 /* "bad" address */
 415 #define CONFIG_SYS_RESET_ADDRESS                0x40000000
 416
 417 #endif  /* __CONFIG_H */