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1 /*
2 * Configuation settings for the Renesas Solutions AP-325RXA board
3 *
4 * Copyright (C) 2008 Renesas Solutions Corp.
5 * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10 #ifndef __AP325RXA_H
11 #define __AP325RXA_H
12
13 #define CONFIG_CPU_SH7723 1
14 #define CONFIG_AP325RXA 1
15
16 #define CONFIG_CMD_SDRAM
17
18 #define CONFIG_BOOTARGS "console=ttySC2,38400"
19
20 #define CONFIG_DISPLAY_BOARDINFO
21 #undef CONFIG_SHOW_BOOT_PROGRESS
22
23 /* SMC9118 */
24 #define CONFIG_SMC911X 1
25 #define CONFIG_SMC911X_32_BIT 1
26 #define CONFIG_SMC911X_BASE 0xB6080000
27
28 /* MEMORY */
29 #define AP325RXA_SDRAM_BASE (0x88000000)
30 #define AP325RXA_FLASH_BASE_1 (0xA0000000)
31 #define AP325RXA_FLASH_BANK_SIZE (128 * 1024 * 1024)
32
33 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000
34
35 /* undef to save memory */
36 #define CONFIG_SYS_LONGHELP
37 /* Monitor Command Prompt */
38 /* Buffer size for input from the Console */
39 #define CONFIG_SYS_CBSIZE 256
40 /* Buffer size for Console output */
41 #define CONFIG_SYS_PBSIZE 256
42 /* max args accepted for monitor commands */
43 #define CONFIG_SYS_MAXARGS 16
44 /* Buffer size for Boot Arguments passed to kernel */
45 #define CONFIG_SYS_BARGSIZE 512
46 /* List of legal baudrate settings for this board */
47 #define CONFIG_SYS_BAUDRATE_TABLE { 38400 }
48
49 /* SCIF */
50 #define CONFIG_SCIF_CONSOLE 1
51 #define CONFIG_SCIF_A 1 /* SH7723 has SCIF and SCIFA */
52 #define CONFIG_CONS_SCIF5 1
53
54 /* Suppress display of console information at boot */
55
56 #define CONFIG_SYS_MEMTEST_START (AP325RXA_SDRAM_BASE)
57 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
58
59 /* Enable alternate, more extensive, memory test */
60 #undef CONFIG_SYS_ALT_MEMTEST
61 /* Scratch address used by the alternate memory test */
62 #undef CONFIG_SYS_MEMTEST_SCRATCH
63
64 /* Enable temporary baudrate change while serial download */
65 #undef CONFIG_SYS_LOADS_BAUD_CHANGE
66
67 #define CONFIG_SYS_SDRAM_BASE (AP325RXA_SDRAM_BASE)
68 /* maybe more, but if so u-boot doesn't know about it... */
69 #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024)
70 /* default load address for scripts ?!? */
71 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
72
73 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
74 #define CONFIG_SYS_MONITOR_BASE (AP325RXA_FLASH_BASE_1)
75 /* Monitor size */
76 #define CONFIG_SYS_MONITOR_LEN (128 * 1024)
77 /* Size of DRAM reserved for malloc() use */
78 #define CONFIG_SYS_MALLOC_LEN (256 * 1024)
79 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
80
81 /* FLASH */
82 #define CONFIG_FLASH_CFI_DRIVER 1
83 #define CONFIG_SYS_FLASH_CFI
84 #undef CONFIG_SYS_FLASH_QUIET_TEST
85 /* print 'E' for empty sector on flinfo */
86 #define CONFIG_SYS_FLASH_EMPTY_INFO
87 /* Physical start address of Flash memory */
88 #define CONFIG_SYS_FLASH_BASE (AP325RXA_FLASH_BASE_1)
89 /* Max number of sectors on each Flash chip */
90 #define CONFIG_SYS_MAX_FLASH_SECT 512
91
92 /*
93 * IDE support
94 */
95 #define CONFIG_IDE_RESET 1
96 #define CONFIG_SYS_PIO_MODE 1
97 #define CONFIG_SYS_IDE_MAXBUS 1 /* IDE bus */
98 #define CONFIG_SYS_IDE_MAXDEVICE 1
99 #define CONFIG_SYS_ATA_BASE_ADDR 0xB4180000
100 #define CONFIG_SYS_ATA_STRIDE 2 /* 1bit shift */
101 #define CONFIG_SYS_ATA_DATA_OFFSET 0x200 /* data reg offset */
102 #define CONFIG_SYS_ATA_REG_OFFSET 0x200 /* reg offset */
103 #define CONFIG_SYS_ATA_ALT_OFFSET 0x210 /* alternate register offset */
104 #define CONFIG_IDE_SWAP_IO
105
106 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */
107 #define CONFIG_SYS_MAX_FLASH_BANKS 1
108 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + (0 * AP325RXA_FLASH_BANK_SIZE)}
109
110 /* Timeout for Flash erase operations (in ms) */
111 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
112 /* Timeout for Flash write operations (in ms) */
113 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
114 /* Timeout for Flash set sector lock bit operations (in ms) */
115 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
116 /* Timeout for Flash clear lock bit operations (in ms) */
117 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
118
119 /*
120 * Use hardware flash sectors protection instead
121 * of U-Boot software protection
122 */
123 #undef CONFIG_SYS_FLASH_PROTECTION
124 #undef CONFIG_SYS_DIRECT_FLASH_TFTP
125
126 /* ENV setting */
127 #define CONFIG_ENV_IS_IN_FLASH
128 #define CONFIG_ENV_OVERWRITE 1
129 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
130 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
131 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
132 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
133 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
134 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
135
136 /* Board Clock */
137 #define CONFIG_SYS_CLK_FREQ 33333333
138 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
139 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
140 #define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */
141
142 #endif /* __AP325RXA_H */