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Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated value
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1 /*
2 * (C) Copyright 2005-2008
3 * Samsung Electronics,
4 * Kyungmin Park <kyungmin.park@samsung.com>
5 *
6 * Configuration settings for the 2420 Samsung Apollon board.
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27 #ifndef __CONFIG_H
28 #define __CONFIG_H
29
30 /*
31 * High Level Configuration Options
32 */
33 #define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */
34 #define CONFIG_OMAP 1 /* in a TI OMAP core */
35 #define CONFIG_OMAP2420 1 /* which is in a 2420 */
36 #define CONFIG_OMAP2420_APOLLON 1
37 #define CONFIG_APOLLON 1
38 #define CONFIG_APOLLON_PLUS 1 /* If you have apollon plus 1.x */
39
40 /* Clock config to target*/
41 #define PRCM_CONFIG_I 1
42 /* #define PRCM_CONFIG_II 1 */
43
44 /* Boot method */
45 /* uncomment if you use NOR boot */
46 /* #define CONFIG_SYS_NOR_BOOT 1 */
47
48 /* uncomment if you use NOR on CS3 */
49 /* #define CONFIG_SYS_USE_NOR 1 */
50
51 #ifdef CONFIG_SYS_NOR_BOOT
52 #undef CONFIG_SYS_USE_NOR
53 #define CONFIG_SYS_USE_NOR 1
54 #endif
55
56 /* uncommnet if you want to use UBI */
57 #define CONFIG_SYS_USE_UBI
58
59 #include <asm/arch/omap2420.h> /* get chip and board defs */
60
61 #define V_SCLK 12000000
62
63 /* input clock of PLL */
64 /* the OMAP2420 H4 has 12MHz, 13MHz, or 19.2Mhz crystal input */
65 #define CONFIG_SYS_CLK_FREQ V_SCLK
66
67 #undef CONFIG_USE_IRQ /* no support for IRQs */
68 #define CONFIG_MISC_INIT_R
69
70 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
71 #define CONFIG_SETUP_MEMORY_TAGS 1
72 #define CONFIG_INITRD_TAG 1
73 #define CONFIG_REVISION_TAG 1
74
75 /*
76 * Size of malloc() pool
77 */
78 #define CONFIG_ENV_SIZE SZ_128K /* Total Size of Environment Sector */
79 #define CONFIG_ENV_SIZE_FLEX SZ_256K
80 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_1M)
81 /* bytes reserved for initial data */
82
83 /*
84 * Hardware drivers
85 */
86
87 /*
88 * SMC91c96 Etherent
89 */
90 #define CONFIG_NET_MULTI
91 #define CONFIG_LAN91C96
92 #define CONFIG_LAN91C96_BASE (APOLLON_CS1_BASE+0x300)
93 #define CONFIG_LAN91C96_EXT_PHY
94
95 /*
96 * NS16550 Configuration
97 */
98 #define V_NS16550_CLK (48000000) /* 48MHz (APLL96/2) */
99
100 #define CONFIG_SYS_NS16550
101 #define CONFIG_SYS_NS16550_SERIAL
102 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
103 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK /* 3MHz (1.5MHz*2) */
104 #define CONFIG_SYS_NS16550_COM1 OMAP2420_UART1
105
106 /*
107 * select serial console configuration
108 */
109 #define CONFIG_SERIAL1 1 /* UART1 on H4 */
110
111 /* allow to overwrite serial and ethaddr */
112 #define CONFIG_ENV_OVERWRITE
113 #define CONFIG_CONS_INDEX 1
114 #define CONFIG_BAUDRATE 115200
115 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
116
117 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
118 #include <config_cmd_default.h>
119
120 #define CONFIG_CMD_DHCP
121 #define CONFIG_CMD_DIAG
122 #define CONFIG_CMD_ONENAND
123
124 #ifdef CONFIG_SYS_USE_UBI
125 #define CONFIG_CMD_JFFS2
126 #define CONFIG_CMD_UBI
127 #define CONFIG_RBTREE
128 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
129 #define CONFIG_MTD_PARTITIONS
130 #endif
131
132 #undef CONFIG_CMD_SOURCE
133
134 #ifndef CONFIG_SYS_USE_NOR
135 # undef CONFIG_CMD_FLASH
136 # undef CONFIG_CMD_IMLS
137 #endif
138
139 #define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
140
141 #define CONFIG_BOOTDELAY 1
142
143 #define CONFIG_NETMASK 255.255.255.0
144 #define CONFIG_IPADDR 192.168.116.25
145 #define CONFIG_SERVERIP 192.168.116.1
146 #define CONFIG_BOOTFILE "uImage"
147 #define CONFIG_ETHADDR 00:0E:99:00:24:20
148
149 #ifdef CONFIG_APOLLON_PLUS
150 #define CONFIG_SYS_MEM "mem=64M"
151 #else
152 #define CONFIG_SYS_MEM "mem=128"
153 #endif
154
155 #ifdef CONFIG_SYS_USE_UBI
156 #define CONFIG_SYS_UBI "ubi.mtd=4"
157 #else
158 #define CONFIG_SYS_UBI ""
159 #endif
160
161 #define CONFIG_BOOTARGS "root=/dev/nfs rw " CONFIG_SYS_MEM \
162 " console=ttyS0,115200n8" \
163 " ip=192.168.116.25:192.168.116.1:192.168.116.1:255.255.255.0:" \
164 "apollon:eth0:off nfsroot=/tftpboot/nfsroot profile=2 " \
165 CONFIG_SYS_UBI
166
167 #define CONFIG_EXTRA_ENV_SETTINGS \
168 "Image=tftp 0x80008000 Image; go 0x80008000\0" \
169 "zImage=tftp 0x80180000 zImage; go 0x80180000\0" \
170 "uImage=tftp 0x80180000 uImage; bootm 0x80180000\0" \
171 "uboot=tftp 0x80008000 u-boot.bin; go 0x80008000\0" \
172 "xloader=tftp 0x80180000 x-load.bin; " \
173 " cp.w 0x80180000 0x00000400 0x1000; go 0x00000400\0" \
174 "syncmode50=mw.w 0x1e442 0xc0c4; mw 0x6800a060 0xe30d1201\0" \
175 "syncmode=mw.w 0x1e442 0xe0f4; mw 0x6800a060 0xe30d1201\0" \
176 "norboot=cp32 0x18040000 0x80008000 0x200000; go 0x80008000\0" \
177 "oneboot=onenand read 0x80008000 0x40000 0x200000; go 0x80008000\0" \
178 "onesyncboot=run syncmode oneboot\0" \
179 "updateb=tftp 0x80180000 u-boot-onenand.bin; " \
180 " onenand erase 0x0 0x20000; onenand write 0x80180000 0x0 0x20000\0" \
181 "ubi=setenv bootargs ${bootargs} ubi.mtd=4 ${mtdparts}; run uImage\0" \
182 "bootcmd=run uboot\0"
183
184 /*
185 * Miscellaneous configurable options
186 */
187 #define CONFIG_SYS_LONGHELP /* undef to save memory */
188 #define CONFIG_SYS_PROMPT "Apollon # "
189 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
190 /* Print Buffer Size */
191 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
192 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
193 /* Boot Argument Buffer Size */
194 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
195 /* memtest works on */
196 #define CONFIG_SYS_MEMTEST_START (OMAP2420_SDRC_CS0)
197 #define CONFIG_SYS_MEMTEST_END (OMAP2420_SDRC_CS0+SZ_31M)
198
199 /* default load address */
200 #define CONFIG_SYS_LOAD_ADDR (OMAP2420_SDRC_CS0)
201
202 /* The 2420 has 12 GP timers, they can be driven by the SysClk (12/13/19.2)
203 * or by 32KHz clk, or from external sig. This rate is divided by a local
204 * divisor.
205 */
206 #define CONFIG_SYS_TIMERBASE OMAP2420_GPT2
207 #define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */
208 #define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
209
210 /*-----------------------------------------------------------------------
211 * Stack sizes
212 *
213 * The stack sizes are set up in start.S using the settings below
214 */
215 #define CONFIG_STACKSIZE SZ_128K /* regular stack */
216 #ifdef CONFIG_USE_IRQ
217 # define CONFIG_STACKSIZE_IRQ SZ_4K /* IRQ stack */
218 # define CONFIG_STACKSIZE_FIQ SZ_4K /* FIQ stack */
219 #endif
220
221 /*-----------------------------------------------------------------------
222 * Physical Memory Map
223 */
224 #define CONFIG_NR_DRAM_BANKS 1 /* CS1 may or may not be populated */
225 #define PHYS_SDRAM_1 OMAP2420_SDRC_CS0
226 #define PHYS_SDRAM_1_SIZE SZ_128M
227 #define PHYS_SDRAM_2 OMAP2420_SDRC_CS1
228
229 /*-----------------------------------------------------------------------
230 * FLASH and environment organization
231 */
232 #ifdef CONFIG_SYS_USE_NOR
233 /* OneNAND boot, NOR has CS3, But NOR has CS0 when NOR boot */
234 # define CONFIG_SYS_FLASH_BASE 0x18000000
235 # define CONFIG_SYS_MAX_FLASH_BANKS 1
236 # define CONFIG_SYS_MAX_FLASH_SECT 1024
237 /*-----------------------------------------------------------------------
238 * CFI FLASH driver setup
239 */
240 /* Flash memory is CFI compliant */
241 # define CONFIG_SYS_FLASH_CFI 1
242 # define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */
243 /* Use buffered writes (~10x faster) */
244 /* #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 */
245 /* Use h/w sector protection*/
246 # define CONFIG_SYS_FLASH_PROTECTION 1
247
248 #else /* !CONFIG_SYS_USE_NOR */
249 # define CONFIG_SYS_NO_FLASH 1
250 #endif /* CONFIG_SYS_USE_NOR */
251
252 /* OneNAND boot, OneNAND has CS0, NOR boot ONeNAND has CS2 */
253 #define CONFIG_SYS_ONENAND_BASE 0x00000000
254 #define CONFIG_SYS_MONITOR_LEN SZ_256K /* U-Boot image size */
255 #define CONFIG_ENV_IS_IN_ONENAND 1
256 #define CONFIG_ENV_ADDR 0x00020000
257 #define CONFIG_ENV_ADDR_FLEX 0x00040000
258
259 #ifdef CONFIG_SYS_USE_UBI
260 #define CONFIG_CMD_MTDPARTS
261 #define MTDIDS_DEFAULT "onenand0=onenand"
262 #define MTDPARTS_DEFAULT "mtdparts=onenand:128k(bootloader)," \
263 "128k(params)," \
264 "2m(kernel)," \
265 "16m(rootfs)," \
266 "32m(fs)," \
267 "-(ubifs)"
268 #endif
269
270 #endif /* __CONFIG_H */