]>
git.ipfire.org Git - people/ms/u-boot.git/blob - include/configs/aristainetos-common.h
4 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
7 * Copyright (C) 2012 Freescale Semiconductor, Inc.
9 * Configuration settings for the Freescale i.MX6Q SabreSD board.
11 * SPDX-License-Identifier: GPL-2.0+
13 #ifndef __ARISTAINETOS_COMMON_CONFIG_H
14 #define __ARISTAINETOS_COMMON_CONFIG_H
18 #include "mx6_common.h"
20 #define CONFIG_DISPLAY_CPUINFO
21 #define CONFIG_DISPLAY_BOARDINFO
23 #define CONFIG_MACH_TYPE 4501
24 #define CONFIG_MMCROOT "/dev/mmcblk0p1"
25 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
27 #define CONFIG_SYS_GENERIC_BOARD
29 /* Size of malloc() pool */
30 #define CONFIG_SYS_MALLOC_LEN (64 * SZ_1M)
32 #define CONFIG_BOARD_EARLY_INIT_F
33 #define CONFIG_MXC_GPIO
35 #define CONFIG_MXC_UART
37 #define CONFIG_CMD_FUSE
38 #define CONFIG_MXC_OCOTP
41 #define CONFIG_FSL_ESDHC
42 #define CONFIG_FSL_USDHC
43 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
46 #define CONFIG_CMD_MMC
47 #define CONFIG_GENERIC_MMC
48 #define CONFIG_BOUNCE_BUFFER
49 #define CONFIG_CMD_EXT2
50 #define CONFIG_CMD_FAT
51 #define CONFIG_DOS_PARTITION
53 #define CONFIG_CMD_PING
54 #define CONFIG_CMD_DHCP
55 #define CONFIG_CMD_MII
56 #define CONFIG_CMD_NET
57 #define CONFIG_FEC_MXC
59 #define IMX_FEC_BASE ENET_BASE_ADDR
60 #define CONFIG_ETHPRIME "FEC"
61 #define CONFIG_FEC_MXC_PHYADDR 0
64 #define CONFIG_PHY_MICREL
67 #define CONFIG_SPI_FLASH
68 #define CONFIG_SPI_FLASH_MTD
69 #define CONFIG_SPI_FLASH_STMICRO
70 #define CONFIG_MXC_SPI
71 #define CONFIG_SF_DEFAULT_BUS 3
72 #define CONFIG_SF_DEFAULT_SPEED 20000000
73 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
74 #define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
76 /* allow to overwrite serial and ethaddr */
77 #define CONFIG_ENV_OVERWRITE
78 #define CONFIG_CONS_INDEX 1
79 #define CONFIG_BAUDRATE 115200
81 /* Command definition */
82 #define CONFIG_CMD_BMODE
83 #define CONFIG_CMD_BOOTZ
84 #define CONFIG_CMD_SETEXPR
86 #define CONFIG_BOOTDELAY 3
88 #define CONFIG_LOADADDR 0x12000000
89 #define CONFIG_SYS_TEXT_BASE 0x17800000
91 #define CONFIG_EXTRA_ENV_SETTINGS \
92 "script=u-boot.scr\0" \
93 "fit_file=/boot/system.itb\0" \
94 "loadaddr=0x12000000\0" \
95 "fit_addr_r=0x14000000\0" \
96 "uboot=/boot/u-boot.imx\0" \
98 "rescue_sys_addr=f0000\0" \
99 "rescue_sys_length=f10000\0" \
102 "console=" CONFIG_CONSOLE_DEV "\0" \
103 "fdt_high=0xffffffff\0" \
104 "initrd_high=0xffffffff\0" \
105 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
106 "set_fit_default=fdt addr ${fit_addr_r};fdt set /configurations " \
107 "default ${board_type}\0" \
108 "get_env=mw ${loadaddr} 0 0x20000;" \
110 "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} env.txt;" \
111 "env import -t ${loadaddr}\0" \
112 "default_env=mw ${loadaddr} 0 0x20000;" \
113 "env export -t ${loadaddr} serial# ethaddr eth1addr " \
114 "board_type panel;" \
116 "env import -t ${loadaddr}\0" \
118 "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
119 "bootscript=echo Running bootscript from mmc ...; " \
123 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
124 "mmcargs=setenv bootargs console=${console},${baudrate} " \
125 "root=${mmcroot}\0" \
126 "mmcboot=echo Booting from mmc ...; " \
127 "run mmcargs addmtd addmisc set_fit_default;" \
128 "bootm ${fit_addr_r}\0" \
129 "mmc_load_fit=ext2load mmc ${mmcdev}:${mmcpart} ${fit_addr_r} " \
131 "mmc_load_uboot=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
133 "mmc_upd_uboot=mw.b ${loadaddr} 0xff ${uboot_sz};" \
134 "setexpr cmp_buf ${loadaddr} + ${uboot_sz};" \
135 "setexpr uboot_maxsize ${uboot_sz} - 400;" \
136 "mw.b ${cmp_buf} 0x00 ${uboot_sz};" \
137 "run mmc_load_uboot;sf probe;sf erase 0 ${uboot_sz};" \
138 "sf write ${loadaddr} 400 ${filesize};" \
139 "sf read ${cmp_buf} 400 ${uboot_sz};" \
140 "cmp.b ${loadaddr} ${cmp_buf} ${uboot_maxsize}\0" \
141 "ubiboot=echo Booting from ubi ...; " \
142 "run ubiargs addmtd addmisc set_fit_default;" \
143 "bootm ${fit_addr_r}\0" \
144 "ubifs_load_fit=sf probe;ubi part ubi 2048;ubifsmount ubi:rootfs;" \
145 "ubifsload ${fit_addr_r} /boot/system.itb; " \
146 "imi ${fit_addr_r}\0 " \
147 "rescueargs=setenv bootargs console=${console},${baudrate} " \
148 "root=/dev/ram rw\0 " \
149 "rescueboot=echo Booting rescue system from NOR ...; " \
150 "run rescueargs addmtd addmisc set_fit_default;" \
151 "bootm ${fit_addr_r}\0" \
152 "rescue_load_fit=sf probe;sf read ${fit_addr_r} ${rescue_sys_addr} " \
153 "${rescue_sys_length}; imi ${fit_addr_r}\0" \
154 CONFIG_EXTRA_ENV_BOARD_SETTINGS
156 #define CONFIG_BOOTCOMMAND \
157 "mmc dev ${mmcdev};" \
158 "if mmc rescan; then " \
159 "if run loadbootscript; then " \
162 "if run mmc_load_fit; then " \
165 "if run ubifs_load_fit; then " \
168 "if run rescue_load_fit; then " \
171 "echo RESCUE SYSTEM BOOT " \
178 "if run ubifs_load_fit; then " \
181 "if run rescue_load_fit; then " \
184 "echo RESCUE SYSTEM BOOT FAILURE;" \
189 #define CONFIG_ARP_TIMEOUT 200UL
191 /* Miscellaneous configurable options */
192 #define CONFIG_SYS_LONGHELP
193 #define CONFIG_SYS_HUSH_PARSER
194 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
195 #define CONFIG_AUTO_COMPLETE
196 #define CONFIG_SYS_CBSIZE 256
198 /* Print Buffer Size */
199 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
200 #define CONFIG_SYS_MAXARGS 16
201 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
203 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
204 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
205 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
207 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
209 #define CONFIG_CMDLINE_EDITING
210 #define CONFIG_STACKSIZE (128 * 1024)
212 /* Physical Memory Map */
213 #define CONFIG_NR_DRAM_BANKS 1
214 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
216 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
217 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
218 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
220 #define CONFIG_SYS_INIT_SP_OFFSET \
221 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
222 #define CONFIG_SYS_INIT_SP_ADDR \
223 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
225 /* Environment organization */
226 #define CONFIG_ENV_SIZE (12 * 1024)
227 #define CONFIG_ENV_IS_IN_SPI_FLASH
228 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
229 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
230 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
231 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
232 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
233 #define CONFIG_ENV_SECT_SIZE (0x010000)
234 #define CONFIG_ENV_OFFSET (0x0d0000)
235 #define CONFIG_ENV_OFFSET_REDUND (0x0e0000)
237 #define CONFIG_OF_LIBFDT
239 #define CONFIG_CMD_CACHE
241 #define CONFIG_SYS_FSL_USDHC_NUM 2
244 #define CONFIG_CMD_I2C
245 #define CONFIG_SYS_I2C
246 #define CONFIG_SYS_I2C_MXC
247 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
248 #define CONFIG_SYS_I2C_SPEED 100000
249 #define CONFIG_SYS_I2C_SLAVE 0x7f
250 #define CONFIG_SYS_I2C_NOPROBES { {0, 0x00} }
252 #define CONFIG_CMD_GPIO
255 #define CONFIG_CMD_NAND
256 #define CONFIG_CMD_NAND_TRIMFFS
257 #define CONFIG_NAND_MXS
258 #define CONFIG_SYS_MAX_NAND_DEVICE 1
259 #define CONFIG_SYS_NAND_BASE 0x40000000
260 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
261 #define CONFIG_SYS_NAND_ONFI_DETECTION
263 /* DMA stuff, needed for GPMI/MXS NAND support */
264 #define CONFIG_APBH_DMA
265 #define CONFIG_APBH_DMA_BURST
266 #define CONFIG_APBH_DMA_BURST8
269 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
270 #define CONFIG_SYS_RTC_BUS_NUM 2
271 #define CONFIG_RTC_M41T11
272 #define CONFIG_CMD_DATE
275 #define CONFIG_CMD_USB
276 #define CONFIG_CMD_FAT
277 #define CONFIG_USB_EHCI
278 #define CONFIG_USB_EHCI_MX6
279 #define CONFIG_USB_STORAGE
280 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
281 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
282 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
283 #define CONFIG_MXC_USB_FLAGS 0
286 #define CONFIG_CMD_MTDPARTS
287 #define CONFIG_MTD_PARTITIONS
288 #define CONFIG_MTD_DEVICE
289 #define CONFIG_RBTREE
291 #define CONFIG_CMD_UBI
292 #define CONFIG_CMD_UBIFS
294 #define CONFIG_MTD_UBI_FASTMAP
295 #define CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT 1
297 #define CONFIG_HW_WATCHDOG
298 #define CONFIG_IMX_WATCHDOG
304 #define CONFIG_VIDEO_IPUV3
305 /* check this console not needed, after test remove it */
306 #define CONFIG_CFB_CONSOLE
307 #define CONFIG_VGA_AS_SINGLE_DEVICE
308 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
309 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
310 #define CONFIG_VIDEO_BMP_RLE8
311 #define CONFIG_SPLASH_SCREEN
312 #define CONFIG_SPLASH_SCREEN_ALIGN
313 #define CONFIG_BMP_16BPP
314 #define CONFIG_VIDEO_LOGO
315 #define CONFIG_VIDEO_BMP_LOGO
316 #define CONFIG_IPUV3_CLK 198000000
317 #define CONFIG_IMX_VIDEO_SKIP
319 #define CONFIG_CMD_BMP
321 #define CONFIG_PWM_IMX
322 #define CONFIG_IMX6_PWM_PER_CLK 66000000
324 #endif /* __ARISTAINETOS_COMMON_CONFIG_H */