include/configs/atngw100.h

   1 /*
   2  * Copyright (C) 2006 Atmel Corporation
   3  *
   4  * Configuration settings for the AVR32 Network Gateway
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8 #ifndef __CONFIG_H
   9 #define __CONFIG_H
  10
  11 #include <asm/arch/hardware.h>
  12
  13 #define CONFIG_AT32AP
  14 #define CONFIG_AT32AP7000
  15 #define CONFIG_ATNGW100
  16
  17 /*
  18  * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
  19  * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency
  20  * and the PBA bus to run at 1/4 the PLL frequency.
  21  */
  22 #define CONFIG_PLL
  23 #define CONFIG_SYS_POWER_MANAGER
  24 #define CONFIG_SYS_OSC0_HZ                      20000000
  25 #define CONFIG_SYS_PLL0_DIV                     1
  26 #define CONFIG_SYS_PLL0_MUL                     7
  27 #define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16
  28 #define CONFIG_SYS_CLKDIV_CPU                   0
  29 #define CONFIG_SYS_CLKDIV_HSB                   1
  30 #define CONFIG_SYS_CLKDIV_PBA                   2
  31 #define CONFIG_SYS_CLKDIV_PBB                   1
  32
  33 /* Reserve VM regions for SDRAM and NOR flash */
  34 #define CONFIG_SYS_NR_VM_REGIONS                2
  35
  36 /*
  37  * The PLLOPT register controls the PLL like this:
  38  *   icp = PLLOPT<2>
  39  *   ivco = PLLOPT<1:0>
  40  *
  41  * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz).
  42  */
  43 #define CONFIG_SYS_PLL0_OPT                     0x04
  44
  45 #define CONFIG_USART_BASE               ATMEL_BASE_USART1
  46 #define CONFIG_USART_ID                 1
  47 /* User serviceable stuff */
  48 #define CONFIG_DOS_PARTITION
  49
  50 #define CONFIG_CMDLINE_TAG
  51 #define CONFIG_SETUP_MEMORY_TAGS
  52 #define CONFIG_INITRD_TAG
  53
  54 #define CONFIG_STACKSIZE                (2048)
  55
  56 #define CONFIG_BAUDRATE                 115200
  57 #define CONFIG_BOOTARGS                                                 \
  58         "console=ttyS0 root=/dev/mtdblock1 rootfstype=jffs2"
  59 #define CONFIG_BOOTCOMMAND                                              \
  60         "fsload; bootm"
  61
  62 /*
  63  * Only interrupt autoboot if <space> is pressed. Otherwise, garbage
  64  * data on the serial line may interrupt the boot sequence.
  65  */
  66 #define CONFIG_BOOTDELAY                1
  67 #define CONFIG_AUTOBOOT
  68 #define CONFIG_AUTOBOOT_KEYED
  69 #define CONFIG_AUTOBOOT_PROMPT          \
  70         "Press SPACE to abort autoboot in %d seconds\n", bootdelay
  71 #define CONFIG_AUTOBOOT_DELAY_STR       "d"
  72 #define CONFIG_AUTOBOOT_STOP_STR        " "
  73
  74 /*
  75  * After booting the board for the first time, new ethernet addresses
  76  * should be generated and assigned to the environment variables
  77  * "ethaddr" and "eth1addr". This is normally done during production.
  78  */
  79 #define CONFIG_OVERWRITE_ETHADDR_ONCE
  80
  81 /*
  82  * BOOTP/DHCP options
  83  */
  84 #define CONFIG_BOOTP_SUBNETMASK
  85 #define CONFIG_BOOTP_GATEWAY
  86
  87 /*
  88  * Command line configuration.
  89  */
  90 #include <config_cmd_default.h>
  91
  92 #define CONFIG_CMD_ASKENV
  93 #define CONFIG_CMD_DHCP
  94 #define CONFIG_CMD_EXT2
  95 #define CONFIG_CMD_FAT
  96 #define CONFIG_CMD_JFFS2
  97 #define CONFIG_CMD_MMC
  98 #define CONFIG_CMD_SF
  99 #define CONFIG_CMD_SPI
 100
 101 #undef CONFIG_CMD_FPGA
 102 #undef CONFIG_CMD_SETGETDCR
 103 #undef CONFIG_CMD_SOURCE
 104 #undef CONFIG_CMD_XIMG
 105
 106 #define CONFIG_ATMEL_USART
 107 #define CONFIG_MACB
 108 #define CONFIG_PORTMUX_PIO
 109 #define CONFIG_SYS_NR_PIOS                      5
 110 #define CONFIG_SYS_HSDRAMC
 111 #define CONFIG_MMC
 112 #define CONFIG_GENERIC_ATMEL_MCI
 113 #define CONFIG_GENERIC_MMC
 114 #define CONFIG_ATMEL_SPI
 115
 116 #define CONFIG_SPI_FLASH
 117 #define CONFIG_SPI_FLASH_ATMEL
 118
 119 #define CONFIG_SYS_DCACHE_LINESZ                32
 120 #define CONFIG_SYS_ICACHE_LINESZ                32
 121
 122 #define CONFIG_NR_DRAM_BANKS            1
 123
 124 #define CONFIG_SYS_FLASH_CFI
 125 #define CONFIG_FLASH_CFI_DRIVER
 126
 127 #define CONFIG_SYS_FLASH_BASE                   0x00000000
 128 #define CONFIG_SYS_FLASH_SIZE                   0x800000
 129 #define CONFIG_SYS_MAX_FLASH_BANKS              1
 130 #define CONFIG_SYS_MAX_FLASH_SECT               135
 131
 132 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 133 #define CONFIG_SYS_TEXT_BASE            0x00000000
 134
 135 #define CONFIG_SYS_INTRAM_BASE                  INTERNAL_SRAM_BASE
 136 #define CONFIG_SYS_INTRAM_SIZE                  INTERNAL_SRAM_SIZE
 137 #define CONFIG_SYS_SDRAM_BASE                   EBI_SDRAM_BASE
 138
 139 #define CONFIG_ENV_IS_IN_FLASH
 140 #define CONFIG_ENV_SIZE                 65536
 141 #define CONFIG_ENV_ADDR                 (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
 142
 143 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE)
 144
 145 #define CONFIG_SYS_MALLOC_LEN                   (256*1024)
 146
 147 /* Allow 4MB for the kernel run-time image */
 148 #define CONFIG_SYS_LOAD_ADDR                    (EBI_SDRAM_BASE + 0x00400000)
 149 #define CONFIG_SYS_BOOTPARAMS_LEN               (16 * 1024)
 150
 151 /* Other configuration settings that shouldn't have to change all that often */
 152 #define CONFIG_SYS_PROMPT                       "U-Boot> "
 153 #define CONFIG_SYS_CBSIZE                       256
 154 #define CONFIG_SYS_MAXARGS                      16
 155 #define CONFIG_SYS_PBSIZE                       (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 156 #define CONFIG_SYS_LONGHELP
 157
 158 #define CONFIG_SYS_MEMTEST_START                EBI_SDRAM_BASE
 159 #define CONFIG_SYS_MEMTEST_END                  (CONFIG_SYS_MEMTEST_START + 0x1f00000)
 160
 161 #define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
 162
 163 #endif /* __CONFIG_H */