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git.ipfire.org Git - people/ms/u-boot.git/blob - include/configs/bf533-ezkit.h
2 * U-boot - Configuration file for BF533 EZKIT board
5 #ifndef __CONFIG_BF533_EZKIT_H__
6 #define __CONFIG_BF533_EZKIT_H__
8 #include <asm/config-pre.h>
14 #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
19 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
20 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
22 /* CONFIG_CLKIN_HZ is any value in Hz */
23 #define CONFIG_CLKIN_HZ 27000000
24 /* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
26 #define CONFIG_CLKIN_HALF 0
27 /* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
29 #define CONFIG_PLL_BYPASS 0
30 /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
31 /* Values can range from 0-63 (where 0 means 64) */
32 #define CONFIG_VCO_MULT 22
33 /* CCLK_DIV controls the core clock divider */
34 /* Values can be 1, 2, 4, or 8 ONLY */
35 #define CONFIG_CCLK_DIV 1
36 /* SCLK_DIV controls the system clock divider */
37 /* Values can range from 1-15 */
38 #define CONFIG_SCLK_DIV 5
44 #define CONFIG_MEM_SIZE 32
45 /* Early EZKITs had 32megs, but later have 64megs */
46 #if (CONFIG_MEM_SIZE == 64)
47 # define CONFIG_MEM_ADD_WDTH 10
49 # define CONFIG_MEM_ADD_WDTH 9
52 #define CONFIG_EBIU_SDRRC_VAL 0x398
53 #define CONFIG_EBIU_SDGCTL_VAL 0x91118d
55 #define CONFIG_EBIU_AMGCTL_VAL 0xFF
56 #define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0
57 #define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0
59 #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
60 #define CONFIG_SYS_MALLOC_LEN (128 * 1024)
66 #define ADI_CMDS_NETWORK 1
67 #define CONFIG_NET_MULTI
68 #define CONFIG_SMC91111 1
69 #define CONFIG_SMC91111_BASE 0x20310300
70 #define SMC91111_EEPROM_INIT() \
72 bfin_write_FIO_DIR(bfin_read_FIO_DIR() | PF1 | PF0); \
73 bfin_write_FIO_FLAG_C(PF1); \
74 bfin_write_FIO_FLAG_S(PF0); \
77 #define CONFIG_HOSTNAME bf533-ezkit
78 /* Uncomment next line to use fixed MAC address */
79 /* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */
85 #define CONFIG_SYS_FLASH_BASE 0x20000000
86 #define CONFIG_SYS_MAX_FLASH_BANKS 3
87 #define CONFIG_SYS_MAX_FLASH_SECT 40
88 #define CONFIG_ENV_IS_IN_FLASH
89 #define CONFIG_ENV_ADDR 0x20030000
90 #define CONFIG_ENV_SECT_SIZE 0x10000
91 #define FLASH_TOT_SECT 40
97 #define CONFIG_SOFT_I2C
98 #define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF0
99 #define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF1
105 #define CONFIG_MISC_INIT_R
106 #define CONFIG_RTC_BFIN
107 #define CONFIG_UART_CONSOLE 0
111 * Pull in common ADI header for remaining command/environment setup
113 #include <configs/bfin_adi_common.h>