include/configs/brppt1.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * brtpp1.h
   4  *
   5  * specific parts for B&R T-Series Motherboard
   6  *
   7  * Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at> -
   8  * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
   9  */
  10
  11 #ifndef __CONFIG_BRPPT1_H__
  12 #define __CONFIG_BRPPT1_H__
  13
  14 #include <configs/bur_cfg_common.h>
  15 #include <configs/bur_am335x_common.h>
  16 #include <linux/stringify.h>
  17 /* ------------------------------------------------------------------------- */
  18 /* memory */
  19 #define CONFIG_SYS_BOOTM_LEN            SZ_32M
  20
  21 /* Clock Defines */
  22 #define V_OSCK                          26000000  /* Clock output from T2 */
  23 #define V_SCLK                          (V_OSCK)
  24
  25 #define CONFIG_POWER_TPS65217
  26
  27 /*
  28  * When we have NAND flash we expect to be making use of mtdparts,
  29  * both for ease of use in U-Boot and for passing information on to
  30  * the Linux kernel.
  31  */
  32
  33 #ifdef CONFIG_SPL_OS_BOOT
  34 #define CONFIG_SYS_SPL_ARGS_ADDR                0x80F80000
  35
  36 /* RAW SD card / eMMC */
  37 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR   0x80    /* address 0x10000 */
  38 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS  0x80    /* 64KiB */
  39
  40 /* NAND */
  41 #ifdef CONFIG_MTD_RAW_NAND
  42 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS         0x140000
  43 #endif /* CONFIG_MTD_RAW_NAND */
  44 #endif /* CONFIG_SPL_OS_BOOT */
  45
  46 #ifdef CONFIG_MTD_RAW_NAND
  47 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
  48 #endif /* CONFIG_MTD_RAW_NAND */
  49
  50 #ifdef CONFIG_MTD_RAW_NAND
  51 #define NANDTGTS \
  52 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
  53 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
  54 "cfgscr=mw ${dtbaddr} 0; nand read ${cfgaddr} cfgscr && source ${cfgaddr};" \
  55 " fdt addr ${dtbaddr} || cp ${fdtcontroladdr} ${dtbaddr} 4000\0" \
  56 "nandargs=setenv bootargs console=${console} ${optargs} ${optargs_rot} " \
  57         "root=mtd6 rootfstype=jffs2 b_mode=${b_mode}\0" \
  58 "b_nand=nand read ${loadaddr} kernel; nand read ${dtbaddr} dtb; " \
  59         "run nandargs; run cfgscr; bootz ${loadaddr} - ${dtbaddr}\0" \
  60 "b_tgts_std=usb0 nand net\0" \
  61 "b_tgts_rcy=net usb0 nand\0" \
  62 "b_tgts_pme=usb0 nand net\0"
  63 #else
  64 #define NANDTGTS ""
  65 #endif /* CONFIG_MTD_RAW_NAND */
  66
  67 #define MMCSPI_TGTS \
  68 "t30args#0=setenv bootargs ${optargs_rot} ${optargs} console=${console} " \
  69         "b_mode=${b_mode} root=/dev/mmcblk0p2 rootfstype=ext4\0" \
  70 "b_t30lgcy#0=" \
  71         "load ${loaddev}:2 ${loadaddr} /boot/PPTImage.md5 && " \
  72         "load ${loaddev}:2 ${loadaddr} /boot/zImage && " \
  73         "load ${loaddev}:2 ${dtbaddr} /boot/am335x-ppt30.dtb || " \
  74         "load ${loaddev}:1 ${dtbaddr} am335x-ppt30-legacy.dtb; "\
  75         "run t30args#0; run cfgscr; bootz ${loadaddr} - ${dtbaddr}\0" \
  76 "t30args#1=setenv bootargs ${optargs_rot} ${optargs} console=${console} " \
  77         "b_mode=${b_mode}\0" \
  78 "b_t30lgcy#1=" \
  79         "load ${loaddev}:1 ${loadaddr} zImage && " \
  80         "load ${loaddev}:1 ${dtbaddr} am335x-ppt30.dtb && " \
  81         "load ${loaddev}:1 ${ramaddr} rootfsPPT30.uboot && " \
  82         "run t30args#1; run cfgscr; bootz ${loadaddr} ${ramaddr} ${dtbaddr}\0" \
  83 "b_mmc0=load ${loaddev}:1 ${scraddr} bootscr.img && source ${scraddr}\0" \
  84 "b_mmc1=load ${loaddev}:1 ${scraddr} /boot/bootscr.img && source ${scraddr}\0" \
  85 "b_tgts_std=mmc0 mmc1 t30lgcy#0 t30lgcy#1 usb0 net\0" \
  86 "b_tgts_rcy=t30lgcy#1 usb0 net\0" \
  87 "b_tgts_pme=net usb0 mmc0 mmc1\0" \
  88 "loaddev=mmc 1\0"
  89
  90 #ifdef CONFIG_ENV_IS_IN_MMC
  91 #define MMCTGTS \
  92 MMCSPI_TGTS \
  93 "cfgscr=mw ${dtbaddr} 0;" \
  94 " mmc dev 1; mmc read ${cfgaddr} 200 80; source ${cfgaddr};" \
  95 " fdt addr ${dtbaddr} || cp ${fdtcontroladdr} ${dtbaddr} 4000\0"
  96 #else
  97 #define MMCTGTS ""
  98 #endif /* CONFIG_MMC */
  99
 100 #ifdef CONFIG_SPI
 101 #define SPITGTS \
 102 MMCSPI_TGTS \
 103 "cfgscr=mw ${dtbaddr} 0;" \
 104 " sf probe; sf read ${cfgaddr} 0xC0000 10000; source ${cfgaddr};" \
 105 " fdt addr ${dtbaddr} || cp ${fdtcontroladdr} ${dtbaddr} 4000\0"
 106 #else
 107 #define SPITGTS ""
 108 #endif /* CONFIG_SPI */
 109
 110 #define LOAD_OFFSET(x)                  0x8##x
 111
 112 #ifndef CONFIG_SPL_BUILD
 113 #define CONFIG_EXTRA_ENV_SETTINGS \
 114 BUR_COMMON_ENV \
 115 "verify=no\0" \
 116 "autoload=0\0" \
 117 "scraddr=" __stringify(LOAD_OFFSET(0000000)) "\0" \
 118 "cfgaddr=" __stringify(LOAD_OFFSET(0020000)) "\0" \
 119 "dtbaddr=" __stringify(LOAD_OFFSET(0040000)) "\0" \
 120 "loadaddr=" __stringify(LOAD_OFFSET(0100000)) "\0" \
 121 "ramaddr=" __stringify(LOAD_OFFSET(2000000)) "\0" \
 122 "console=ttyO0,115200n8\0" \
 123 "optargs=consoleblank=0 quiet panic=2\0" \
 124 "b_break=0\0" \
 125 "b_usb0=usb start && load usb 0 ${scraddr} bootscr.img && source ${scraddr}\0" \
 126 "b_net=tftp ${scraddr} netscript.img && source ${scraddr}\0" \
 127 MMCTGTS \
 128 SPITGTS \
 129 NANDTGTS \
 130 "b_deftgts=if test ${b_mode} = 12; then setenv b_tgts ${b_tgts_pme};" \
 131 " elif test ${b_mode} = 0; then setenv b_tgts ${b_tgts_rcy};" \
 132 " else setenv b_tgts ${b_tgts_std}; fi\0" \
 133 "b_default=run b_deftgts; for target in ${b_tgts};"\
 134 " do echo \"### booting ${target} ###\"; run b_${target};" \
 135 " if test ${b_break} = 1; then; exit; fi; done\0"
 136 #endif /* !CONFIG_SPL_BUILD*/
 137
 138 #ifdef CONFIG_MTD_RAW_NAND
 139 /*
 140  * GPMC  block.  We support 1 device and the physical address to
 141  * access CS0 at is 0x8000000.
 142  */
 143 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 144 #define CONFIG_SYS_NAND_BASE            0x8000000
 145 /* don't change OMAP_ELM, ECCSCHEME. ROM code only supports this */
 146 #define CONFIG_SYS_NAND_ECCPOS          {2, 3, 4, 5, 6, 7, 8, 9, \
 147                                         10, 11, 12, 13, 14, 15, 16, 17, \
 148                                         18, 19, 20, 21, 22, 23, 24, 25, \
 149                                         26, 27, 28, 29, 30, 31, 32, 33, \
 150                                         34, 35, 36, 37, 38, 39, 40, 41, \
 151                                         42, 43, 44, 45, 46, 47, 48, 49, \
 152                                         50, 51, 52, 53, 54, 55, 56, 57, }
 153
 154 #define CONFIG_SYS_NAND_ECCSIZE         512
 155 #define CONFIG_SYS_NAND_ECCBYTES        14
 156
 157 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 158
 159 #define CONFIG_NAND_OMAP_GPMC_WSCFG     1
 160 #endif /* CONFIG_MTD_RAW_NAND */
 161
 162 #if defined(CONFIG_ENV_IS_IN_NAND)
 163 #define CONFIG_SYS_ENV_SECT_SIZE        CONFIG_ENV_SIZE
 164 #endif
 165
 166 #endif  /* ! __CONFIG_BRPPT1_H__ */