include/configs/bur_am335x_common.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * bur_am335x_common.h
   4  *
   5  * common parts used by B&R AM335x based boards
   6  *
   7  * Copyright (C) 2016 Hannes Schmelzer <oe5hpm@oevsv.at> -
   8  * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
   9  */
  10
  11 #ifndef __BUR_AM335X_COMMON_H__
  12 #define __BUR_AM335X_COMMON_H__
  13 /* ------------------------------------------------------------------------- */
  14 #define CONFIG_MAX_RAM_BANK_SIZE        (1024 << 20)    /* 1GB */
  15
  16 /* Timer information */
  17 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
  18 #define CONFIG_SYS_TIMERBASE            0x48040000      /* Use Timer2 */
  19 #define CONFIG_POWER_TPS65217
  20
  21 #include <asm/arch/omap.h>
  22
  23 /* NS16550 Configuration */
  24 #define CONFIG_SYS_NS16550_SERIAL
  25 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  26 #define CONFIG_SYS_NS16550_CLK          48000000
  27 #define CONFIG_SYS_NS16550_COM1         0x44e09000      /* UART0 */
  28
  29 /* Network defines */
  30 #define CONFIG_MII                      /* Required in net/eth.c */
  31 #define CONFIG_PHY_NATSEMI
  32
  33 /*
  34  * SPL related defines.  The Public RAM memory map the ROM defines the
  35  * area between 0x402F0400 and 0x4030B800 as a download area and
  36  * 0x4030B800 to 0x4030CE00 as a public stack area.  The ROM also
  37  * supports X-MODEM loading via UART, and we leverage this and then use
  38  * Y-MODEM to load u-boot.img, when booted over UART.  We must also include
  39  * the scratch space that U-Boot uses in SRAM.
  40  */
  41 #define CONFIG_SPL_TEXT_BASE            0x402F0400
  42 #define CONFIG_SPL_MAX_SIZE             (SRAM_SCRATCH_SPACE_ADDR - \
  43                                          CONFIG_SPL_TEXT_BASE)
  44
  45 /*
  46  * Since SPL did pll and ddr initialization for us,
  47  * we don't need to do it twice.
  48  */
  49 #if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_NOR_BOOT)
  50 #define CONFIG_SKIP_LOWLEVEL_INIT
  51 #endif /* !CONFIG_SPL_BUILD, ... */
  52 /*
  53  * Our DDR memory always starts at 0x80000000 and U-Boot shall have
  54  * relocated itself to higher in memory by the time this value is used.
  55  */
  56 #define CONFIG_SYS_LOAD_ADDR            0x80000000
  57 /*
  58  * ----------------------------------------------------------------------------
  59  * DDR information.  We say (for simplicity) that we have 1 bank,
  60  * always, even when we have more.  We always start at 0x80000000,
  61  * and we place the initial stack pointer in our SRAM.
  62  */
  63 #define CONFIG_NR_DRAM_BANKS            1
  64 #define CONFIG_SYS_SDRAM_BASE           0x80000000
  65 #define CONFIG_SYS_INIT_SP_ADDR         (NON_SECURE_SRAM_END - \
  66                                         GENERATED_GBL_DATA_SIZE)
  67
  68 /* I2C */
  69 #define CONFIG_SYS_I2C
  70
  71 /*
  72  * Our platforms make use of SPL to initalize the hardware (primarily
  73  * memory) enough for full U-Boot to be loaded.  We also support Falcon
  74  * Mode so that the Linux kernel can be booted directly from SPL
  75  * instead, if desired.  We make use of the general SPL framework found
  76  * under common/spl/.  Given our generally common memory map, we set a
  77  * number of related defaults and sizes here.
  78  */
  79 /*
  80  * Place the image at the start of the ROM defined image space.
  81  * We limit our size to the ROM-defined downloaded image area, and use the
  82  * rest of the space for stack.  We load U-Boot itself into memory at
  83  * 0x80800000 for legacy reasons (to not conflict with older SPLs).  We
  84  * have our BSS be placed 1MiB after this, to allow for the default
  85  * Linux kernel address of 0x80008000 to work, in the Falcon Mode case.
  86  * We have the SPL malloc pool at the end of the BSS area.
  87  *
  88  * ----------------------------------------------------------------------------
  89  */
  90 #define CONFIG_SPL_BSS_START_ADDR       0x80A00000
  91 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000         /* 512 KB */
  92 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
  93                                         CONFIG_SPL_BSS_MAX_SIZE)
  94 #define CONFIG_SYS_SPL_MALLOC_SIZE      CONFIG_SYS_MALLOC_LEN
  95
  96 /* General parts of the framework, required. */
  97
  98 #endif  /* ! __BUR_AM335X_COMMON_H__ */