include/configs/canmb.h

   1 /*
   2  * (C) Copyright 2005
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #ifndef __CONFIG_H
  25 #define __CONFIG_H
  26
  27 /*
  28  * High Level Configuration Options
  29  * (easy to change)
  30  */
  31
  32 #define CONFIG_MPC5xxx          1       /* This is an MPC5xxx CPU */
  33 #define CONFIG_MPC5200          1       /* More exactly a MPC5200 */
  34 #define CONFIG_CANMB            1       /* ... on canmb board - we need this for FEC.C */
  35
  36 /*
  37  * allowed and functional CONFIG_SYS_TEXT_BASE values:
  38  * 0xfe000000   low boot at 0x00000100 (default board setting)
  39  * 0x00100000   RAM load and test
  40  */
  41 #define CONFIG_SYS_TEXT_BASE    0xFE000000
  42
  43 #define CONFIG_SYS_MPC5XXX_CLKIN        33000000 /* ... running at 33.000000MHz */
  44
  45 #define CONFIG_BOARD_EARLY_INIT_R
  46
  47 #define CONFIG_HIGH_BATS        1       /* High BATs supported */
  48
  49 /*
  50  * Serial console configuration
  51  */
  52 #define CONFIG_PSC_CONSOLE      1       /* console is on PSC1 */
  53 #define CONFIG_BAUDRATE         115200  /* ... at 115200 bps */
  54 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200, 230400 }
  55
  56
  57 /*
  58  * BOOTP options
  59  */
  60 #define CONFIG_BOOTP_BOOTFILESIZE
  61 #define CONFIG_BOOTP_BOOTPATH
  62 #define CONFIG_BOOTP_GATEWAY
  63 #define CONFIG_BOOTP_HOSTNAME
  64
  65
  66 /*
  67  * Command line configuration.
  68  */
  69 #include <config_cmd_default.h>
  70
  71 #define CONFIG_CMD_ASKENV
  72 #define CONFIG_CMD_DATE
  73 #define CONFIG_CMD_DHCP
  74 #define CONFIG_CMD_IMMAP
  75 #define CONFIG_CMD_MII
  76 #define CONFIG_CMD_NFS
  77 #define CONFIG_CMD_REGINFO
  78 #define CONFIG_CMD_SNTP
  79
  80
  81 /*
  82  * MUST be low boot - HIGHBOOT is not supported anymore
  83  */
  84 #if (CONFIG_SYS_TEXT_BASE == 0xFE000000)                /* Boot low with 32 MB Flash */
  85 #   define CONFIG_SYS_LOWBOOT           1
  86 #   define CONFIG_SYS_LOWBOOT16 1
  87 #else
  88 #   error "CONFIG_SYS_TEXT_BASE must be 0xFE000000"
  89 #endif
  90
  91 /*
  92  * Autobooting
  93  */
  94 #define CONFIG_BOOTDELAY        5       /* autoboot after 5 seconds */
  95
  96 #define CONFIG_PREBOOT  "echo;" \
  97         "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
  98         "echo"
  99
 100 #undef  CONFIG_BOOTARGS
 101
 102 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 103         "netdev=eth0\0"                                                 \
 104         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 105                 "nfsroot=${serverip}:${rootpath}\0"                     \
 106         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
 107         "addip=setenv bootargs ${bootargs} "                            \
 108                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
 109                 ":${hostname}:${netdev}:off panic=1\0"                  \
 110         "flash_nfs=run nfsargs addip;"                                  \
 111                 "bootm ${kernel_addr}\0"                                \
 112         "flash_self=run ramargs addip;"                                 \
 113                 "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
 114         "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0"     \
 115         "rootpath=/opt/eldk/ppc_6xx\0"                                  \
 116         "bootfile=/tftpboot/canmb/uImage\0"                             \
 117         ""
 118
 119 #define CONFIG_BOOTCOMMAND      "run flash_self"
 120
 121 /*
 122  * IPB Bus clocking configuration.
 123  */
 124 #undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK          /* define for 133MHz speed */
 125
 126 /*
 127  * Flash configuration, expect one 16 Megabyte Bank at most
 128  */
 129 #define CONFIG_SYS_FLASH_BASE           0xFE000000
 130 #define CONFIG_SYS_FLASH_SIZE           0x02000000
 131 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max num of memory banks      */
 132 #define CONFIG_SYS_MAX_FLASH_SECT       256     /* max num of sects on one chip */
 133
 134 #define CONFIG_SYS_FLASH_ERASE_TOUT     240000  /* Flash Erase Timeout (in ms)  */
 135 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Flash Write Timeout (in ms)  */
 136
 137 #define CONFIG_FLASH_CFI_DRIVER
 138 #define CONFIG_SYS_FLASH_CFI
 139 #define CONFIG_SYS_FLASH_EMPTY_INFO
 140
 141 /*
 142  * Environment settings
 143  */
 144 #define CONFIG_ENV_IS_IN_FLASH  1
 145 #define CONFIG_ENV_OFFSET               (2*128*1024)
 146 #define CONFIG_ENV_SIZE         0x2000
 147 #define CONFIG_ENV_SECT_SIZE       (128*1024)
 148
 149 /*
 150  * Memory map
 151  *
 152  * Warning!!! with the current BestComm Task, MBAR MUST BE set to 0xf0000000
 153  */
 154 #define CONFIG_SYS_MBAR                 0xf0000000      /* DO NOT CHANGE this */
 155 #define CONFIG_SYS_SDRAM_BASE           0x00000000
 156 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
 157
 158 /* Use SRAM until RAM will be available */
 159 #define CONFIG_SYS_INIT_RAM_ADDR        MPC5XXX_SRAM
 160 #define CONFIG_SYS_INIT_RAM_SIZE        MPC5XXX_SRAM_SIZE       /* Size of used area in DPRAM */
 161
 162
 163 #define CONFIG_SYS_GBL_DATA_SIZE        128     /* size in bytes reserved for initial data */
 164 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE)
 165 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 166
 167 #define CONFIG_SYS_MONITOR_BASE    CONFIG_SYS_TEXT_BASE
 168 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
 169 #   define CONFIG_SYS_RAMBOOT           1
 170 #endif
 171
 172 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 256 kB for Monitor   */
 173 #define CONFIG_SYS_MALLOC_LEN           (128 << 10)     /* Reserve 128 kB for malloc()  */
 174 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)       /* Initial Memory map for Linux */
 175
 176 /*
 177  * Ethernet configuration
 178  */
 179 #define CONFIG_MPC5xxx_FEC      1
 180 #define CONFIG_MPC5xxx_FEC_MII100
 181 #define CONFIG_PHY_ADDR         0x0
 182 /*
 183  * GPIO configuration:
 184  * PSC1,2,3 predefined as UART
 185  * PCI disabled
 186  * Ethernet 100 with MD
 187  */
 188 #define CONFIG_SYS_GPS_PORT_CONFIG      0x00058444
 189
 190 /*
 191  * Miscellaneous configurable options
 192  */
 193 #define CONFIG_SYS_LONGHELP                     /* undef to save memory     */
 194 #define CONFIG_SYS_PROMPT               "=> "   /* Monitor Command Prompt   */
 195 #if defined(CONFIG_CMD_KGDB)
 196 #  define CONFIG_SYS_CBSIZE             1024    /* Console I/O Buffer Size  */
 197 #else
 198 #  define CONFIG_SYS_CBSIZE             256     /* Console I/O Buffer Size  */
 199 #endif
 200 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)      /* Print Buffer Size */
 201 #define CONFIG_SYS_MAXARGS              16              /* max number of command args   */
 202 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size    */
 203
 204 #define CONFIG_SYS_MEMTEST_START        0x00100000      /* memtest works on */
 205 #define CONFIG_SYS_MEMTEST_END          0x01f00000      /* 1 ... 31 MB in DRAM  */
 206
 207 #define CONFIG_SYS_LOAD_ADDR            0x200000        /* default load address */
 208
 209 #define CONFIG_SYS_HZ                   1000    /* decrementer freq: 1 ms ticks */
 210
 211 #define CONFIG_RTC_MPC5200      1       /* use internal MPC5200 RTC */
 212
 213 #define CONFIG_SYS_CACHELINE_SIZE       32      /* For MPC5xxx CPUs */
 214 #if defined(CONFIG_CMD_KGDB)
 215 #  define CONFIG_SYS_CACHELINE_SHIFT    5       /* log base 2 of the above value */
 216 #endif
 217
 218 /*
 219  * Various low-level settings
 220  */
 221 #define CONFIG_SYS_HID0_INIT            HID0_ICE | HID0_ICFI
 222 #define CONFIG_SYS_HID0_FINAL           HID0_ICE
 223
 224 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
 225 #define CONFIG_SYS_BOOTCS_SIZE          CONFIG_SYS_FLASH_SIZE
 226 #define CONFIG_SYS_BOOTCS_CFG           0x00047D01
 227 #define CONFIG_SYS_CS0_START            CONFIG_SYS_FLASH_BASE
 228 #define CONFIG_SYS_CS0_SIZE             CONFIG_SYS_FLASH_SIZE
 229
 230 #define CONFIG_SYS_CS_BURST             0x00000000
 231 #define CONFIG_SYS_CS_DEADCYCLE 0x33333333
 232
 233 #define CONFIG_SYS_RESET_ADDRESS        0x7f000000
 234
 235 #endif /* __CONFIG_H */