include/configs/canmb.h

   1 /*
   2  * (C) Copyright 2005
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #ifndef __CONFIG_H
   9 #define __CONFIG_H
  10
  11 /*
  12  * High Level Configuration Options
  13  * (easy to change)
  14  */
  15
  16 #define CONFIG_MPC5200          1       /* This is a MPC5200 CPU */
  17 #define CONFIG_CANMB            1       /* ... on canmb board - we need this for FEC.C */
  18
  19 /*
  20  * allowed and functional CONFIG_SYS_TEXT_BASE values:
  21  * 0xfe000000   low boot at 0x00000100 (default board setting)
  22  * 0x00100000   RAM load and test
  23  */
  24 #define CONFIG_SYS_TEXT_BASE    0xFE000000
  25
  26 #define CONFIG_SYS_MPC5XXX_CLKIN        33000000 /* ... running at 33.000000MHz */
  27
  28 #define CONFIG_BOARD_EARLY_INIT_R
  29
  30 #define CONFIG_HIGH_BATS        1       /* High BATs supported */
  31
  32 /*
  33  * Serial console configuration
  34  */
  35 #define CONFIG_PSC_CONSOLE      1       /* console is on PSC1 */
  36 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200, 230400 }
  37
  38 /*
  39  * BOOTP options
  40  */
  41 #define CONFIG_BOOTP_BOOTFILESIZE
  42 #define CONFIG_BOOTP_BOOTPATH
  43 #define CONFIG_BOOTP_GATEWAY
  44 #define CONFIG_BOOTP_HOSTNAME
  45
  46 /*
  47  * Command line configuration.
  48  */
  49 #define CONFIG_CMD_REGINFO
  50
  51 /*
  52  * MUST be low boot - HIGHBOOT is not supported anymore
  53  */
  54 #if (CONFIG_SYS_TEXT_BASE == 0xFE000000)                /* Boot low with 32 MB Flash */
  55 #   define CONFIG_SYS_LOWBOOT           1
  56 #   define CONFIG_SYS_LOWBOOT16 1
  57 #else
  58 #   error "CONFIG_SYS_TEXT_BASE must be 0xFE000000"
  59 #endif
  60
  61 /*
  62  * Autobooting
  63  */
  64
  65 #define CONFIG_PREBOOT  "echo;" \
  66         "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
  67         "echo"
  68
  69 #undef  CONFIG_BOOTARGS
  70
  71 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
  72         "netdev=eth0\0"                                                 \
  73         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
  74                 "nfsroot=${serverip}:${rootpath}\0"                     \
  75         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
  76         "addip=setenv bootargs ${bootargs} "                            \
  77                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
  78                 ":${hostname}:${netdev}:off panic=1\0"                  \
  79         "flash_nfs=run nfsargs addip;"                                  \
  80                 "bootm ${kernel_addr}\0"                                \
  81         "flash_self=run ramargs addip;"                                 \
  82                 "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
  83         "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0"     \
  84         "rootpath=/opt/eldk/ppc_6xx\0"                                  \
  85         "bootfile=/tftpboot/canmb/uImage\0"                             \
  86         ""
  87
  88 #define CONFIG_BOOTCOMMAND      "run flash_self"
  89
  90 /*
  91  * IPB Bus clocking configuration.
  92  */
  93 #undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK          /* define for 133MHz speed */
  94
  95 /*
  96  * Flash configuration, expect one 16 Megabyte Bank at most
  97  */
  98 #define CONFIG_SYS_FLASH_BASE           0xFE000000
  99 #define CONFIG_SYS_FLASH_SIZE           0x02000000
 100 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max num of memory banks      */
 101 #define CONFIG_SYS_MAX_FLASH_SECT       256     /* max num of sects on one chip */
 102
 103 #define CONFIG_SYS_FLASH_ERASE_TOUT     240000  /* Flash Erase Timeout (in ms)  */
 104 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Flash Write Timeout (in ms)  */
 105
 106 #define CONFIG_FLASH_CFI_DRIVER
 107 #define CONFIG_SYS_FLASH_CFI
 108 #define CONFIG_SYS_FLASH_EMPTY_INFO
 109
 110 /*
 111  * Environment settings
 112  */
 113 #define CONFIG_ENV_IS_IN_FLASH  1
 114 #define CONFIG_ENV_OFFSET               (2*128*1024)
 115 #define CONFIG_ENV_SIZE         0x2000
 116 #define CONFIG_ENV_SECT_SIZE       (128*1024)
 117
 118 /*
 119  * Memory map
 120  *
 121  * Warning!!! with the current BestComm Task, MBAR MUST BE set to 0xf0000000
 122  */
 123 #define CONFIG_SYS_MBAR                 0xf0000000      /* DO NOT CHANGE this */
 124 #define CONFIG_SYS_SDRAM_BASE           0x00000000
 125 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
 126
 127 /* Use SRAM until RAM will be available */
 128 #define CONFIG_SYS_INIT_RAM_ADDR        MPC5XXX_SRAM
 129 #define CONFIG_SYS_INIT_RAM_SIZE        MPC5XXX_SRAM_SIZE       /* Size of used area in DPRAM */
 130
 131 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 132 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 133
 134 #define CONFIG_SYS_MONITOR_BASE    CONFIG_SYS_TEXT_BASE
 135 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
 136 #   define CONFIG_SYS_RAMBOOT           1
 137 #endif
 138
 139 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 256 kB for Monitor   */
 140 #define CONFIG_SYS_MALLOC_LEN           (128 << 10)     /* Reserve 128 kB for malloc()  */
 141 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)       /* Initial Memory map for Linux */
 142
 143 /*
 144  * Ethernet configuration
 145  */
 146 #define CONFIG_MPC5xxx_FEC      1
 147 #define CONFIG_MPC5xxx_FEC_MII100
 148 #define CONFIG_PHY_ADDR         0x0
 149 /*
 150  * GPIO configuration:
 151  * PSC1,2,3 predefined as UART
 152  * PCI disabled
 153  * Ethernet 100 with MD
 154  */
 155 #define CONFIG_SYS_GPS_PORT_CONFIG      0x00058444
 156
 157 /*
 158  * Miscellaneous configurable options
 159  */
 160 #define CONFIG_SYS_LONGHELP                     /* undef to save memory     */
 161 #if defined(CONFIG_CMD_KGDB)
 162 #  define CONFIG_SYS_CBSIZE             1024    /* Console I/O Buffer Size  */
 163 #else
 164 #  define CONFIG_SYS_CBSIZE             256     /* Console I/O Buffer Size  */
 165 #endif
 166 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)      /* Print Buffer Size */
 167 #define CONFIG_SYS_MAXARGS              16              /* max number of command args   */
 168 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size    */
 169
 170 #define CONFIG_SYS_MEMTEST_START        0x00100000      /* memtest works on */
 171 #define CONFIG_SYS_MEMTEST_END          0x01f00000      /* 1 ... 31 MB in DRAM  */
 172
 173 #define CONFIG_SYS_LOAD_ADDR            0x200000        /* default load address */
 174
 175 #define CONFIG_RTC_MPC5200      1       /* use internal MPC5200 RTC */
 176
 177 #define CONFIG_SYS_CACHELINE_SIZE       32      /* For MPC5xxx CPUs */
 178 #if defined(CONFIG_CMD_KGDB)
 179 #  define CONFIG_SYS_CACHELINE_SHIFT    5       /* log base 2 of the above value */
 180 #endif
 181
 182 /*
 183  * Various low-level settings
 184  */
 185 #define CONFIG_SYS_HID0_INIT            HID0_ICE | HID0_ICFI
 186 #define CONFIG_SYS_HID0_FINAL           HID0_ICE
 187
 188 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
 189 #define CONFIG_SYS_BOOTCS_SIZE          CONFIG_SYS_FLASH_SIZE
 190 #define CONFIG_SYS_BOOTCS_CFG           0x00047D01
 191 #define CONFIG_SYS_CS0_START            CONFIG_SYS_FLASH_BASE
 192 #define CONFIG_SYS_CS0_SIZE             CONFIG_SYS_FLASH_SIZE
 193
 194 #define CONFIG_SYS_CS_BURST             0x00000000
 195 #define CONFIG_SYS_CS_DEADCYCLE 0x33333333
 196
 197 #define CONFIG_SYS_RESET_ADDRESS        0x7f000000
 198
 199 #endif /* __CONFIG_H */