include/configs/canmb.h

   1 /*
   2  * (C) Copyright 2005
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #ifndef __CONFIG_H
   9 #define __CONFIG_H
  10
  11 /*
  12  * High Level Configuration Options
  13  * (easy to change)
  14  */
  15
  16 #define CONFIG_MPC5200          1       /* This is a MPC5200 CPU */
  17 #define CONFIG_CANMB            1       /* ... on canmb board - we need this for FEC.C */
  18 #define CONFIG_DISPLAY_BOARDINFO
  19
  20 /*
  21  * allowed and functional CONFIG_SYS_TEXT_BASE values:
  22  * 0xfe000000   low boot at 0x00000100 (default board setting)
  23  * 0x00100000   RAM load and test
  24  */
  25 #define CONFIG_SYS_TEXT_BASE    0xFE000000
  26
  27 #define CONFIG_SYS_MPC5XXX_CLKIN        33000000 /* ... running at 33.000000MHz */
  28
  29 #define CONFIG_BOARD_EARLY_INIT_R
  30
  31 #define CONFIG_HIGH_BATS        1       /* High BATs supported */
  32
  33 /*
  34  * Serial console configuration
  35  */
  36 #define CONFIG_PSC_CONSOLE      1       /* console is on PSC1 */
  37 #define CONFIG_BAUDRATE         115200  /* ... at 115200 bps */
  38 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200, 230400 }
  39
  40 /*
  41  * BOOTP options
  42  */
  43 #define CONFIG_BOOTP_BOOTFILESIZE
  44 #define CONFIG_BOOTP_BOOTPATH
  45 #define CONFIG_BOOTP_GATEWAY
  46 #define CONFIG_BOOTP_HOSTNAME
  47
  48 /*
  49  * Command line configuration.
  50  */
  51 #define CONFIG_CMD_DATE
  52 #define CONFIG_CMD_IMMAP
  53 #define CONFIG_CMD_REGINFO
  54
  55 /*
  56  * MUST be low boot - HIGHBOOT is not supported anymore
  57  */
  58 #if (CONFIG_SYS_TEXT_BASE == 0xFE000000)                /* Boot low with 32 MB Flash */
  59 #   define CONFIG_SYS_LOWBOOT           1
  60 #   define CONFIG_SYS_LOWBOOT16 1
  61 #else
  62 #   error "CONFIG_SYS_TEXT_BASE must be 0xFE000000"
  63 #endif
  64
  65 /*
  66  * Autobooting
  67  */
  68
  69 #define CONFIG_PREBOOT  "echo;" \
  70         "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
  71         "echo"
  72
  73 #undef  CONFIG_BOOTARGS
  74
  75 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
  76         "netdev=eth0\0"                                                 \
  77         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
  78                 "nfsroot=${serverip}:${rootpath}\0"                     \
  79         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
  80         "addip=setenv bootargs ${bootargs} "                            \
  81                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
  82                 ":${hostname}:${netdev}:off panic=1\0"                  \
  83         "flash_nfs=run nfsargs addip;"                                  \
  84                 "bootm ${kernel_addr}\0"                                \
  85         "flash_self=run ramargs addip;"                                 \
  86                 "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
  87         "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0"     \
  88         "rootpath=/opt/eldk/ppc_6xx\0"                                  \
  89         "bootfile=/tftpboot/canmb/uImage\0"                             \
  90         ""
  91
  92 #define CONFIG_BOOTCOMMAND      "run flash_self"
  93
  94 /*
  95  * IPB Bus clocking configuration.
  96  */
  97 #undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK          /* define for 133MHz speed */
  98
  99 /*
 100  * Flash configuration, expect one 16 Megabyte Bank at most
 101  */
 102 #define CONFIG_SYS_FLASH_BASE           0xFE000000
 103 #define CONFIG_SYS_FLASH_SIZE           0x02000000
 104 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max num of memory banks      */
 105 #define CONFIG_SYS_MAX_FLASH_SECT       256     /* max num of sects on one chip */
 106
 107 #define CONFIG_SYS_FLASH_ERASE_TOUT     240000  /* Flash Erase Timeout (in ms)  */
 108 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Flash Write Timeout (in ms)  */
 109
 110 #define CONFIG_FLASH_CFI_DRIVER
 111 #define CONFIG_SYS_FLASH_CFI
 112 #define CONFIG_SYS_FLASH_EMPTY_INFO
 113
 114 /*
 115  * Environment settings
 116  */
 117 #define CONFIG_ENV_IS_IN_FLASH  1
 118 #define CONFIG_ENV_OFFSET               (2*128*1024)
 119 #define CONFIG_ENV_SIZE         0x2000
 120 #define CONFIG_ENV_SECT_SIZE       (128*1024)
 121
 122 /*
 123  * Memory map
 124  *
 125  * Warning!!! with the current BestComm Task, MBAR MUST BE set to 0xf0000000
 126  */
 127 #define CONFIG_SYS_MBAR                 0xf0000000      /* DO NOT CHANGE this */
 128 #define CONFIG_SYS_SDRAM_BASE           0x00000000
 129 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
 130
 131 /* Use SRAM until RAM will be available */
 132 #define CONFIG_SYS_INIT_RAM_ADDR        MPC5XXX_SRAM
 133 #define CONFIG_SYS_INIT_RAM_SIZE        MPC5XXX_SRAM_SIZE       /* Size of used area in DPRAM */
 134
 135 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 136 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 137
 138 #define CONFIG_SYS_MONITOR_BASE    CONFIG_SYS_TEXT_BASE
 139 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
 140 #   define CONFIG_SYS_RAMBOOT           1
 141 #endif
 142
 143 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 256 kB for Monitor   */
 144 #define CONFIG_SYS_MALLOC_LEN           (128 << 10)     /* Reserve 128 kB for malloc()  */
 145 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)       /* Initial Memory map for Linux */
 146
 147 /*
 148  * Ethernet configuration
 149  */
 150 #define CONFIG_MPC5xxx_FEC      1
 151 #define CONFIG_MPC5xxx_FEC_MII100
 152 #define CONFIG_PHY_ADDR         0x0
 153 /*
 154  * GPIO configuration:
 155  * PSC1,2,3 predefined as UART
 156  * PCI disabled
 157  * Ethernet 100 with MD
 158  */
 159 #define CONFIG_SYS_GPS_PORT_CONFIG      0x00058444
 160
 161 /*
 162  * Miscellaneous configurable options
 163  */
 164 #define CONFIG_SYS_LONGHELP                     /* undef to save memory     */
 165 #if defined(CONFIG_CMD_KGDB)
 166 #  define CONFIG_SYS_CBSIZE             1024    /* Console I/O Buffer Size  */
 167 #else
 168 #  define CONFIG_SYS_CBSIZE             256     /* Console I/O Buffer Size  */
 169 #endif
 170 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)      /* Print Buffer Size */
 171 #define CONFIG_SYS_MAXARGS              16              /* max number of command args   */
 172 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size    */
 173
 174 #define CONFIG_SYS_MEMTEST_START        0x00100000      /* memtest works on */
 175 #define CONFIG_SYS_MEMTEST_END          0x01f00000      /* 1 ... 31 MB in DRAM  */
 176
 177 #define CONFIG_SYS_LOAD_ADDR            0x200000        /* default load address */
 178
 179 #define CONFIG_RTC_MPC5200      1       /* use internal MPC5200 RTC */
 180
 181 #define CONFIG_SYS_CACHELINE_SIZE       32      /* For MPC5xxx CPUs */
 182 #if defined(CONFIG_CMD_KGDB)
 183 #  define CONFIG_SYS_CACHELINE_SHIFT    5       /* log base 2 of the above value */
 184 #endif
 185
 186 /*
 187  * Various low-level settings
 188  */
 189 #define CONFIG_SYS_HID0_INIT            HID0_ICE | HID0_ICFI
 190 #define CONFIG_SYS_HID0_FINAL           HID0_ICE
 191
 192 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
 193 #define CONFIG_SYS_BOOTCS_SIZE          CONFIG_SYS_FLASH_SIZE
 194 #define CONFIG_SYS_BOOTCS_CFG           0x00047D01
 195 #define CONFIG_SYS_CS0_START            CONFIG_SYS_FLASH_BASE
 196 #define CONFIG_SYS_CS0_SIZE             CONFIG_SYS_FLASH_SIZE
 197
 198 #define CONFIG_SYS_CS_BURST             0x00000000
 199 #define CONFIG_SYS_CS_DEADCYCLE 0x33333333
 200
 201 #define CONFIG_SYS_RESET_ADDRESS        0x7f000000
 202
 203 #endif /* __CONFIG_H */