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git.ipfire.org Git - people/ms/u-boot.git/blob - include/configs/cm_t3517.h
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2 * (C) Copyright 2013 CompuLab, Ltd.
3 * Author: Igor Grinberg <grinberg@compulab.co.il>
5 * Configuration settings for the CompuLab CM-T3517 board
7 * SPDX-License-Identifier: GPL-2.0+
14 * High Level Configuration Options
16 #define CONFIG_CM_T3517 /* working with CM-T3517 */
18 #define CONFIG_SYS_TEXT_BASE 0x80008000
21 * This is needed for the DMA stuff.
22 * Although the default iss 64, we still define it
23 * to be on the safe side once the default is changed.
26 #define CONFIG_EMIF4 /* The chip has EMIF4 controller */
28 #include <asm/arch/cpu.h> /* get chip and board defs */
29 #include <asm/arch/omap.h>
31 #define CONFIG_MACH_TYPE MACH_TYPE_CM_T3517
34 #define V_OSCK 26000000 /* Clock output from T2 */
35 #define V_SCLK (V_OSCK >> 1)
37 #define CONFIG_MISC_INIT_R
40 * The early kernel mapping on ARM currently only maps from the base of DRAM
41 * to the end of the kernel image. The kernel is loaded at DRAM base + 0x8000.
42 * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000,
43 * so that leaves DRAM base to DRAM base + 0x4000 available.
45 #define CONFIG_SYS_BOOTMAPSZ 0x4000
47 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
48 #define CONFIG_SETUP_MEMORY_TAGS
49 #define CONFIG_INITRD_TAG
50 #define CONFIG_REVISION_TAG
51 #define CONFIG_SERIAL_TAG
54 * Size of malloc() pool
56 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
57 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
64 * NS16550 Configuration
66 #define CONFIG_SYS_NS16550_SERIAL
67 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
68 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
71 * select serial console configuration
73 #define CONFIG_CONS_INDEX 3
74 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
75 #define CONFIG_SERIAL3 3 /* UART3 */
77 /* allow to overwrite serial and ethaddr */
78 #define CONFIG_ENV_OVERWRITE
79 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
83 #define CONFIG_USB_MUSB_AM35X
85 #ifndef CONFIG_USB_MUSB_AM35X
86 #define CONFIG_USB_OMAP3
87 #define CONFIG_USB_EHCI
88 #define CONFIG_USB_EHCI_OMAP
89 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 146
90 #define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 147
91 #else /* !CONFIG_USB_MUSB_AM35X */
92 #define CONFIG_USB_MUSB_PIO_ONLY
93 #endif /* CONFIG_USB_MUSB_AM35X */
95 /* commands to include */
96 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
97 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
98 #define CONFIG_MTD_PARTITIONS
99 #define MTDIDS_DEFAULT "nand0=nand"
100 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\
101 "1920k(u-boot),256k(u-boot-env),"\
104 #define CONFIG_CMD_NAND /* NAND support */
106 #define CONFIG_SYS_I2C
107 #define CONFIG_SYS_OMAP24_I2C_SPEED 400000
108 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
109 #define CONFIG_SYS_I2C_OMAP34XX
110 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
111 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
112 #define CONFIG_SYS_I2C_EEPROM_BUS 0
113 #define CONFIG_I2C_MULTI_BUS
118 #define CONFIG_NAND_OMAP_GPMC
119 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
121 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
122 /* to access nand at */
124 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
127 /* Environment information */
128 #define CONFIG_EXTRA_ENV_SETTINGS \
129 "loadaddr=0x82000000\0" \
130 "baudrate=115200\0" \
131 "console=ttyO2,115200n8\0" \
135 "dvimode=1024x768MR-16@60\0" \
136 "defaultdisplay=dvi\0" \
138 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
139 "mmcrootfstype=ext4\0" \
140 "nandroot=/dev/mtdblock4 rw\0" \
141 "nandrootfstype=ubifs\0" \
142 "mmcargs=setenv bootargs console=${console} " \
143 "mpurate=${mpurate} " \
145 "omapfb.mode=dvi:${dvimode} " \
146 "omapdss.def_disp=${defaultdisplay} " \
148 "rootfstype=${mmcrootfstype}\0" \
149 "nandargs=setenv bootargs console=${console} " \
150 "mpurate=${mpurate} " \
152 "omapfb.mode=dvi:${dvimode} " \
153 "omapdss.def_disp=${defaultdisplay} " \
154 "root=${nandroot} " \
155 "rootfstype=${nandrootfstype}\0" \
156 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
157 "bootscript=echo Running bootscript from mmc ...; " \
158 "source ${loadaddr}\0" \
159 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
160 "mmcboot=echo Booting from mmc ...; " \
162 "bootm ${loadaddr}\0" \
163 "nandboot=echo Booting from nand ...; " \
165 "nand read ${loadaddr} 2a0000 400000; " \
166 "bootm ${loadaddr}\0" \
168 #define CONFIG_BOOTCOMMAND \
169 "mmc dev ${mmcdev}; if mmc rescan; then " \
170 "if run loadbootscript; then " \
173 "if run loaduimage; then " \
175 "else run nandboot; " \
178 "else run nandboot; fi"
181 * Miscellaneous configurable options
183 #define CONFIG_AUTO_COMPLETE
184 #define CONFIG_CMDLINE_EDITING
185 #define CONFIG_TIMESTAMP
186 #define CONFIG_SYS_AUTOLOAD "no"
187 #define CONFIG_SYS_LONGHELP /* undef to save memory */
188 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
189 /* Print Buffer Size */
190 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
191 sizeof(CONFIG_SYS_PROMPT) + 16)
192 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
193 /* Boot Argument Buffer Size */
194 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
196 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000)
199 * AM3517 has 12 GP timers, they can be driven by the system clock
200 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
201 * This rate is divided by a local divisor.
203 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
204 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
205 #define CONFIG_SYS_HZ 1000
207 /*-----------------------------------------------------------------------
208 * Physical Memory Map
210 #define CONFIG_NR_DRAM_BANKS 1 /* CM-T3517 DRAM is only on CS0 */
211 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
212 #define CONFIG_SYS_CS0_SIZE (256 << 20)
214 /*-----------------------------------------------------------------------
215 * FLASH and environment organization
218 /* **** PISMO SUPPORT *** */
219 /* Monitor at start of flash */
220 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
221 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
223 #define CONFIG_ENV_IS_IN_NAND
224 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
225 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
226 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
228 #if defined(CONFIG_CMD_NET)
229 #define CONFIG_DRIVER_TI_EMAC
230 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
232 #define CONFIG_SMC911X
233 #define CONFIG_SMC911X_32_BIT
234 #define CONFIG_SMC911X_BASE (0x2C000000 + (16 << 20))
235 #define CONFIG_ARP_TIMEOUT 200UL
236 #define CONFIG_NET_RETRY_COUNT 5
237 #endif /* CONFIG_CMD_NET */
239 /* additions for new relocation code, must be added to all boards */
240 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
241 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
242 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
243 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
244 CONFIG_SYS_INIT_RAM_SIZE - \
245 GENERATED_GBL_DATA_SIZE)
248 #define GREEN_LED_GPIO 186 /* CM-T3517 Green LED is GPIO186 */
250 /* Display Configuration */
251 #define CONFIG_VIDEO_OMAP3
252 #define LCD_BPP LCD_COLOR16
254 #define CONFIG_SPLASH_SCREEN
255 #define CONFIG_SPLASHIMAGE_GUARD
256 #define CONFIG_BMP_16BPP
257 #define CONFIG_SCF0403_LCD
259 #define CONFIG_OMAP3_SPI
262 #define CONFIG_CMD_EEPROM
263 #define CONFIG_ENV_EEPROM_IS_ON_I2C
264 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
265 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
266 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
267 #define CONFIG_SYS_EEPROM_SIZE 256
269 #define CONFIG_CMD_EEPROM_LAYOUT
270 #define CONFIG_EEPROM_LAYOUT_HELP_STRING "v1, v2, v3"
272 #endif /* __CONFIG_H */