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env: Finish migration of common ENV options
[thirdparty/u-boot.git] / include / configs / controlcenterdc.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
4 * Copyright (C) 2016 Mario Six <mario.six@gdsys.cc>
5 */
6
7 #ifndef _CONFIG_CONTROLCENTERDC_H
8 #define _CONFIG_CONTROLCENTERDC_H
9
10 /*
11 * High Level Configuration Options (easy to change)
12 */
13 #define CONFIG_CUSTOMER_BOARD_SUPPORT
14
15 #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
16 #define CONFIG_BOARD_LATE_INIT
17
18 /*
19 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
20 * for DDR ECC byte filling in the SPL before loading the main
21 * U-Boot into it.
22 */
23
24 #define CONFIG_SYS_TCLK 250000000 /* 250MHz */
25
26 #define CONFIG_LOADADDR 1000000
27
28 /*
29 * SDIO/MMC Card Configuration
30 */
31 #define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE
32
33 /*
34 * SATA/SCSI/AHCI configuration
35 */
36 #define CONFIG_SCSI_AHCI_PLAT
37 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
38 #define CONFIG_SYS_SCSI_MAX_LUN 1
39 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
40 CONFIG_SYS_SCSI_MAX_LUN)
41
42 /* USB/EHCI configuration */
43 #define CONFIG_EHCI_IS_TDI
44
45 /* Environment in SPI NOR flash */
46
47 #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
48
49 /* PCIe support */
50 #ifndef CONFIG_SPL_BUILD
51 #define CONFIG_PCI_SCAN_SHOW
52 #endif
53
54 /*
55 * Software (bit-bang) MII driver configuration
56 */
57 #define CONFIG_BITBANGMII /* bit-bang MII PHY management */
58 #define CONFIG_BITBANGMII_MULTI
59
60 /* SPL */
61 /*
62 * Select the boot device here
63 *
64 * Currently supported are:
65 * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash
66 * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1)
67 */
68 #define SPL_BOOT_SPI_NOR_FLASH 1
69 #define SPL_BOOT_SDIO_MMC_CARD 2
70 #define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH
71
72 /* Defines for SPL */
73 #define CONFIG_SPL_SIZE (160 << 10)
74
75 #if defined(CONFIG_SECURED_MODE_IMAGE)
76 #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x2614)
77 #else
78 #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x30)
79 #endif
80
81 #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
82 #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
83
84 #ifdef CONFIG_SPL_BUILD
85 #define CONFIG_SYS_MALLOC_SIMPLE
86 #endif
87
88 #define CONFIG_SPL_STACK (0x40000000 + ((212 - 16) << 10))
89 #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
90
91 #define CONFIG_SPL_LIBCOMMON_SUPPORT
92 #define CONFIG_SPL_LIBGENERIC_SUPPORT
93 #define CONFIG_SPL_I2C_SUPPORT
94
95 #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
96 /* SPL related SPI defines */
97 #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
98 #endif
99
100 #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
101 /* SPL related MMC defines */
102 #define CONFIG_SPL_MMC_SUPPORT
103 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1
104 #define CONFIG_SYS_MMC_U_BOOT_OFFS (168 << 10)
105 #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
106 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR (CONFIG_SYS_U_BOOT_OFFS / 512)
107 #ifdef CONFIG_SPL_BUILD
108 #define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
109 #endif
110 #endif
111
112 /*
113 * Environment Configuration
114 */
115 #define CONFIG_ENV_OVERWRITE
116
117 #define CONFIG_BAUDRATE 115200
118
119 #define CONFIG_HOSTNAME "ccdc"
120 #define CONFIG_ROOTPATH "/opt/nfsroot"
121 #define CONFIG_BOOTFILE "ccdc.img"
122
123 #define CONFIG_EXTRA_ENV_SETTINGS \
124 "netdev=eth1\0" \
125 "consoledev=ttyS1\0" \
126 "u-boot=u-boot.bin\0" \
127 "bootfile_addr=1000000\0" \
128 "keyprogram_addr=3000000\0" \
129 "keyprogram_file=keyprogram.img\0" \
130 "fdtfile=controlcenterdc.dtb\0" \
131 "load=tftpboot ${loadaddr} ${u-boot}\0" \
132 "mmcdev=0:2\0" \
133 "update=sf probe 1:0;" \
134 " sf erase 0 +${filesize};" \
135 " sf write ${fileaddr} 0 ${filesize}\0" \
136 "upd=run load update\0" \
137 "fdt_high=0x10000000\0" \
138 "initrd_high=0x10000000\0" \
139 "loadkeyprogram=tpm flush_keys;" \
140 " mmc rescan;" \
141 " ext4load mmc ${mmcdev} ${keyprogram_addr} ${keyprogram_file};"\
142 " source ${keyprogram_addr}:script@1\0" \
143 "gpio1=gpio@22_25\0" \
144 "gpio2=A29\0" \
145 "blinkseq='0 0 0 0 2 0 2 2 3 1 3 1 0 0 2 2 3 1 3 3 2 0 2 2 3 1 1 1 " \
146 "2 0 2 2 3 1 3 1 0 0 2 0 3 3 3 1 2 0 0 0 3 1 1 1 0 0 0 0'\0" \
147 "bootfail=for i in ${blinkseq}; do" \
148 " if test $i -eq 0; then" \
149 " gpio clear ${gpio1}; gpio set ${gpio2};" \
150 " elif test $i -eq 1; then" \
151 " gpio clear ${gpio1}; gpio clear ${gpio2};" \
152 " elif test $i -eq 2; then" \
153 " gpio set ${gpio1}; gpio set ${gpio2};" \
154 " else;" \
155 " gpio clear ${gpio1}; gpio set ${gpio2};" \
156 " fi; sleep 0.12; done\0"
157
158 #define CONFIG_NFSBOOTCOMMAND \
159 "setenv bootargs root=/dev/nfs rw " \
160 "nfsroot=${serverip}:${rootpath} " \
161 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off " \
162 "console=${consoledev},${baudrate} ${othbootargs}; " \
163 "tftpboot ${bootfile_addr} ${bootfile}; " \
164 "bootm ${bootfile_addr}"
165
166 #define CONFIG_MMCBOOTCOMMAND \
167 "setenv bootargs root=/dev/mmcblk0p3 rw rootwait " \
168 "console=${consoledev},${baudrate} ${othbootargs}; " \
169 "ext2load mmc 0:2 ${bootfile_addr} ${bootfile}; " \
170 "bootm ${bootfile_addr}"
171
172 #define CONFIG_BOOTCOMMAND \
173 "if env exists keyprogram; then;" \
174 " setenv keyprogram; run nfsboot;" \
175 " fi;" \
176 " run dobootfail"
177
178 /*
179 * mv-common.h should be defined after CMD configs since it used them
180 * to enable certain macros
181 */
182 #include "mv-common.h"
183
184 #endif /* _CONFIG_CONTROLCENTERDC_H */