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[people/ms/u-boot.git] / include / configs / corvus.h
1 /*
2 * Common board functions for siemens AT91SAM9G45 based boards
3 * (C) Copyright 2013 Siemens AG
4 *
5 * Based on:
6 * U-Boot file: include/configs/at91sam9m10g45ek.h
7 * (C) Copyright 2007-2008
8 * Stelian Pop <stelian@popies.net>
9 * Lead Tech Design <www.leadtechdesign.com>
10 *
11 * SPDX-License-Identifier: GPL-2.0+
12 */
13
14 #ifndef __CONFIG_H
15 #define __CONFIG_H
16
17 #include <asm/hardware.h>
18 #include <linux/sizes.h>
19
20 /*
21 * Warning: changing CONFIG_SYS_TEXT_BASE requires
22 * adapting the initial boot program.
23 * Since the linker has to swallow that define, we must use a pure
24 * hex number here!
25 */
26
27 #define CONFIG_SYS_TEXT_BASE 0x72000000
28
29 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
30
31 /* ARM asynchronous clock */
32 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768
33 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
34
35 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
36 #define CONFIG_SETUP_MEMORY_TAGS
37 #define CONFIG_INITRD_TAG
38 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
39 #define CONFIG_BOARD_EARLY_INIT_F
40
41 /* general purpose I/O */
42 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
43 #define CONFIG_AT91_GPIO
44 #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
45
46 /* serial console */
47 #define CONFIG_ATMEL_USART
48 #define CONFIG_USART_BASE ATMEL_BASE_DBGU
49 #define CONFIG_USART_ID ATMEL_ID_SYS
50
51 /* LED */
52 #define CONFIG_AT91_LED
53 #define CONFIG_RED_LED AT91_PIN_PD31 /* this is the user1 led */
54 #define CONFIG_GREEN_LED AT91_PIN_PD0 /* this is the user2 led */
55
56
57 /*
58 * BOOTP options
59 */
60 #define CONFIG_BOOTP_BOOTFILESIZE
61 #define CONFIG_BOOTP_BOOTPATH
62 #define CONFIG_BOOTP_GATEWAY
63 #define CONFIG_BOOTP_HOSTNAME
64
65 /*
66 * Command line configuration.
67 */
68 #define CONFIG_CMD_NAND
69
70 /* SDRAM */
71 #define CONFIG_NR_DRAM_BANKS 1
72 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6
73 #define CONFIG_SYS_SDRAM_SIZE 0x08000000
74
75 #define CONFIG_SYS_INIT_SP_ADDR \
76 (CONFIG_SYS_SDRAM_BASE + SZ_4K - GENERATED_GBL_DATA_SIZE)
77
78 /* No NOR flash */
79 #define CONFIG_SYS_NO_FLASH
80
81 /* NAND flash */
82 #ifdef CONFIG_CMD_NAND
83 #define CONFIG_NAND_ATMEL
84 #define CONFIG_SYS_MAX_NAND_DEVICE 1
85 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
86 #define CONFIG_SYS_NAND_DBW_8
87 /* our ALE is AD21 */
88 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
89 /* our CLE is AD22 */
90 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
91 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
92 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8
93 #endif
94
95 /* Ethernet */
96 #define CONFIG_MACB
97 #define CONFIG_PHYLIB
98 #define CONFIG_RMII
99 #define CONFIG_NET_RETRY_COUNT 20
100 #define CONFIG_AT91_WANTS_COMMON_PHY
101
102 /* USB */
103 #define CONFIG_USB_EHCI
104 #define CONFIG_USB_EHCI_ATMEL
105 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
106 #define CONFIG_DOS_PARTITION
107
108 /* USB DFU support */
109 #define CONFIG_CMD_MTDPARTS
110 #define CONFIG_MTD_DEVICE
111 #define CONFIG_MTD_PARTITIONS
112
113 /* DFU class support */
114 #define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M)
115 #define DFU_MANIFEST_POLL_TIMEOUT 25000
116
117 #define CONFIG_SYS_LOAD_ADDR ATMEL_BASE_CS6
118
119 /* bootstrap + u-boot + env in nandflash */
120 #define CONFIG_ENV_IS_IN_NAND
121 #define CONFIG_ENV_OFFSET 0x100000
122 #define CONFIG_ENV_OFFSET_REDUND 0x180000
123 #define CONFIG_ENV_SIZE SZ_128K
124
125 #define CONFIG_BOOTCOMMAND \
126 "nand read 0x70000000 0x200000 0x300000;" \
127 "bootm 0x70000000"
128 #define CONFIG_BOOTARGS \
129 "console=ttyS0,115200 earlyprintk " \
130 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
131 "256k(env),256k(env_redundant),256k(spare)," \
132 "512k(dtb),6M(kernel)ro,-(rootfs) " \
133 "root=/dev/mtdblock7 rw rootfstype=jffs2"
134
135 #define CONFIG_BAUDRATE 115200
136
137 #define CONFIG_SYS_CBSIZE 256
138 #define CONFIG_SYS_MAXARGS 16
139 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
140 sizeof(CONFIG_SYS_PROMPT) + 16)
141 #define CONFIG_SYS_LONGHELP
142 #define CONFIG_CMDLINE_EDITING
143 #define CONFIG_AUTO_COMPLETE
144
145 /*
146 * Size of malloc() pool
147 */
148 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \
149 SZ_4M, 0x1000)
150
151 /* Defines for SPL */
152 #define CONFIG_SPL_FRAMEWORK
153 #define CONFIG_SPL_TEXT_BASE 0x300000
154 #define CONFIG_SPL_MAX_SIZE (12 * SZ_1K)
155 #define CONFIG_SPL_STACK (SZ_16K)
156
157 #define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE
158 #define CONFIG_SPL_BSS_MAX_SIZE (SZ_2K)
159
160 #define CONFIG_SPL_BOARD_INIT
161 #define CONFIG_SPL_NAND_DRIVERS
162 #define CONFIG_SPL_NAND_BASE
163 #define CONFIG_SPL_NAND_ECC
164 #define CONFIG_SPL_NAND_RAW_ONLY
165 #define CONFIG_SPL_NAND_SOFTECC
166 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
167 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
168 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
169 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
170 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
171
172 #define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K
173 #define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K)
174 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
175 CONFIG_SYS_NAND_PAGE_SIZE)
176 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
177 #define CONFIG_SYS_NAND_ECCSIZE 256
178 #define CONFIG_SYS_NAND_ECCBYTES 3
179 #define CONFIG_SYS_NAND_OOBSIZE 64
180 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
181 48, 49, 50, 51, 52, 53, 54, 55, \
182 56, 57, 58, 59, 60, 61, 62, 63, }
183
184 #define CONFIG_SPL_ATMEL_SIZE
185 #define CONFIG_SYS_MASTER_CLOCK 132096000
186 #define AT91_PLL_LOCK_TIMEOUT 1000000
187 #define CONFIG_SYS_AT91_PLLA 0x20c73f03
188 #define CONFIG_SYS_MCKR 0x1301
189 #define CONFIG_SYS_MCKR_CSS 0x1302
190
191 #endif