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1 /*
2 * Copyright (C) 2009 David Brownell
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
17 * MA 02111-1307 USA
18 */
19
20 #ifndef __CONFIG_H
21 #define __CONFIG_H
22
23 /* Spectrum Digital TMS320DM355 EVM board */
24 #define DAVINCI_DM355EVM
25
26 #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 3rd stage loader */
27 #define CONFIG_SYS_NO_FLASH /* that is, no *NOR* flash */
28 #define CONFIG_SYS_CONSOLE_INFO_QUIET
29
30 /* SoC Configuration */
31 #define CONFIG_ARM926EJS /* arm926ejs CPU */
32 #define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
33 #define CONFIG_SYS_HZ_CLOCK 24000000 /* timer0 freq */
34 #define CONFIG_SYS_HZ 1000
35 #define CONFIG_SOC_DM355
36
37 /* Memory Info */
38 #define CONFIG_NR_DRAM_BANKS 1
39 #define PHYS_SDRAM_1 0x80000000
40 #define PHYS_SDRAM_1_SIZE (128 << 20) /* 128 MiB */
41
42 /* Serial Driver info: UART0 for console */
43 #define CONFIG_SYS_NS16550
44 #define CONFIG_SYS_NS16550_SERIAL
45 #define CONFIG_SYS_NS16550_REG_SIZE -4
46 #define CONFIG_SYS_NS16550_COM1 0x01c20000
47 #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK
48 #define CONFIG_CONS_INDEX 1
49 #define CONFIG_BAUDRATE 115200
50
51 /* Ethernet: external DM9000 */
52 #define CONFIG_DRIVER_DM9000 1
53 #define CONFIG_DM9000_BASE 0x04014000
54 #define DM9000_IO CONFIG_DM9000_BASE
55 #define DM9000_DATA (CONFIG_DM9000_BASE + 2)
56
57 /* I2C */
58 #define CONFIG_HARD_I2C
59 #define CONFIG_DRIVER_DAVINCI_I2C
60 #define CONFIG_SYS_I2C_SPEED 400000
61 #define CONFIG_SYS_I2C_SLAVE 0x10 /* SMBus host address */
62
63 /* NAND: socketed, two chipselects, normally 2 GBytes */
64 #define CONFIG_NAND_DAVINCI
65 #define CONFIG_SYS_NAND_CS 2
66 #define CONFIG_SYS_NAND_USE_FLASH_BBT
67 #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
68 #define CONFIG_SYS_NAND_PAGE_2K
69
70 #define CONFIG_SYS_NAND_LARGEPAGE
71 #define CONFIG_SYS_NAND_BASE_LIST { 0x02000000, }
72 /* socket has two chipselects, nCE0 gated by address BIT(14) */
73 #define CONFIG_SYS_MAX_NAND_DEVICE 1
74 #define CONFIG_SYS_NAND_MAX_CHIPS 2
75
76 /* SD/MMC */
77 #define CONFIG_MMC
78 #define CONFIG_GENERIC_MMC
79 #define CONFIG_DAVINCI_MMC
80 #define CONFIG_DAVINCI_MMC_SD1
81 #define CONFIG_MMC_MBLOCK
82
83 /* USB: OTG connector */
84 /* NYET -- #define CONFIG_USB_DAVINCI */
85
86 /* U-Boot command configuration */
87 #include <config_cmd_default.h>
88
89 #undef CONFIG_CMD_BDI
90 #undef CONFIG_CMD_FLASH
91 #undef CONFIG_CMD_FPGA
92 #undef CONFIG_CMD_SETGETDCR
93
94 #define CONFIG_CMD_ASKENV
95 #define CONFIG_CMD_DHCP
96 #define CONFIG_CMD_I2C
97 #define CONFIG_CMD_PING
98 #define CONFIG_CMD_SAVES
99
100 #ifdef CONFIG_CMD_BDI
101 #define CONFIG_CLOCKS
102 #endif
103
104 #ifdef CONFIG_MMC
105 #define CONFIG_DOS_PARTITION
106 #define CONFIG_CMD_EXT2
107 #define CONFIG_CMD_FAT
108 #define CONFIG_CMD_MMC
109 #endif
110
111 #ifdef CONFIG_NAND_DAVINCI
112 #define CONFIG_CMD_MTDPARTS
113 #define CONFIG_MTD_PARTITIONS
114 #define CONFIG_MTD_DEVICE
115 #define CONFIG_CMD_NAND
116 #define CONFIG_CMD_UBI
117 #define CONFIG_RBTREE
118 #endif
119
120 #ifdef CONFIG_USB_DAVINCI
121 #define CONFIG_MUSB_HCD
122 #define CONFIG_CMD_USB
123 #define CONFIG_USB_STORAGE
124 #else
125 #undef CONFIG_MUSB_HCD
126 #undef CONFIG_CMD_USB
127 #undef CONFIG_USB_STORAGE
128 #endif
129
130 #define CONFIG_CRC32_VERIFY
131 #define CONFIG_MX_CYCLIC
132
133 /* U-Boot general configuration */
134 #undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */
135 #define CONFIG_BOOTFILE "uImage" /* Boot file name */
136 #define CONFIG_SYS_PROMPT "DM355 EVM # " /* Monitor Command Prompt */
137 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
138 #define CONFIG_SYS_PBSIZE /* Print buffer size */ \
139 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
140 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
141 #define CONFIG_SYS_HUSH_PARSER
142 #define CONFIG_SYS_LONGHELP
143
144 #ifdef CONFIG_NAND_DAVINCI
145 #define CONFIG_ENV_SIZE (256 << 10) /* 256 KiB */
146 #define CONFIG_ENV_IS_IN_NAND
147 #define CONFIG_ENV_OFFSET 0x3C0000
148 #undef CONFIG_ENV_IS_IN_FLASH
149 #endif
150
151 #if defined(CONFIG_MMC) && !defined(CONFIG_ENV_IS_IN_NAND)
152 #define CONFIG_CMD_ENV
153 #define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */
154 #define CONFIG_ENV_OFFSET (51 << 9) /* Sector 51 */
155 #define CONFIG_ENV_IS_IN_MMC
156 #undef CONFIG_ENV_IS_IN_FLASH
157 #endif
158
159 #define CONFIG_BOOTDELAY 5
160 #define CONFIG_BOOTCOMMAND \
161 "dhcp;bootm"
162 #define CONFIG_BOOTARGS \
163 "console=ttyS0,115200n8 " \
164 "root=/dev/mmcblk0p1 rootwait rootfstype=ext3 ro"
165
166 #define CONFIG_CMDLINE_EDITING
167 #define CONFIG_VERSION_VARIABLE
168 #define CONFIG_TIMESTAMP
169
170 #define CONFIG_NET_RETRY_COUNT 10
171
172 /* U-Boot memory configuration */
173 #define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */
174 #define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */
175 #define CONFIG_SYS_MEMTEST_START 0x87000000 /* physical address */
176 #define CONFIG_SYS_MEMTEST_END 0x88000000 /* test 16MB RAM */
177
178 /* Linux interfacing */
179 #define CONFIG_CMDLINE_TAG
180 #define CONFIG_SETUP_MEMORY_TAGS
181 #define CONFIG_SYS_BARGSIZE 1024 /* bootarg Size */
182 #define CONFIG_SYS_LOAD_ADDR 0x80700000 /* kernel address */
183
184
185 /* NAND configuration ... socketed with two chipselects. It normally comes
186 * with a 2GByte SLC part with 2KB pages (and 128KB erase blocks); other
187 * 2GByte parts may have 4KB pages, 256KB erase blocks, and use MLC. (MLC
188 * pretty much demands the 4-bit ECC support.) You can of course swap in
189 * other parts, including small page ones.
190 *
191 * This presents a single read-only partition for all bootloader stuff.
192 * UBL (1+ block), U-Boot (256KB+), U-Boot environment (one block), and
193 * some extra space to help cope with bad blocks in that data. Linux
194 * shouldn't care about its detailed layout, and will probably want to use
195 * UBI/UBFS for the rest (except maybe on smallpage chips). It's easy to
196 * override this default partitioning using MTDPARTS and cmdlinepart.
197 */
198 #define MTDIDS_DEFAULT "nand0=davinci_nand.0"
199
200 #ifdef CONFIG_SYS_NAND_LARGEPAGE
201 /* Use same layout for 128K/256K blocks; allow some bad blocks */
202 #define PART_BOOT "2m(bootloader)ro,"
203 #else
204 /* Assume 16K erase blocks; allow a few bad ones. */
205 #define PART_BOOT "512k(bootloader)ro,"
206 #endif
207
208 #define PART_KERNEL "4m(kernel)," /* kernel + initramfs */
209 #define PART_REST "-(filesystem)"
210
211 #define MTDPARTS_DEFAULT \
212 "mtdparts=davinci_nand.0:" PART_BOOT PART_KERNEL PART_REST
213
214 #define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */
215
216 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
217 #define CONFIG_SYS_INIT_SP_ADDR \
218 (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
219
220 #endif /* __CONFIG_H */