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configs: Remove unused CONFIG_BOOTP_DEFAULT
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1 /*
2 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7 #ifndef __CONFIG_H
8 #define __CONFIG_H
9
10 /*
11 * Define this to make U-Boot skip low level initialization when loaded
12 * by initial bootloader. Not required by NAND U-Boot version but IS
13 * required for a NOR version used to burn the real NOR U-Boot into
14 * NOR Flash. NAND and NOR support for DaVinci chips is mutually exclusive
15 * so it is NOT possible to build a U-Boot with both NAND and NOR routines.
16 * NOR U-Boot is loaded directly from Flash so it must perform all the
17 * low level initialization itself. NAND version is loaded by an initial
18 * bootloader (UBL in TI-ese) that performs such an initialization so it's
19 * skipped in NAND version. The third DaVinci boot mode loads a bootloader
20 * via UART0 and that bootloader in turn loads and runs U-Boot (or whatever)
21 * performing low level init prior to loading. All that means we can NOT use
22 * NAND version to put U-Boot into NOR because it doesn't have NOR support and
23 * we can NOT use NOR version because it performs low level initialization
24 * effectively destroying itself in DDR memory. That's why a separate NOR
25 * version with this define is needed. It is loaded via UART, then one uses
26 * it to somehow download a proper NOR version built WITHOUT this define to
27 * RAM (tftp?) and burn it to NOR Flash. I would be probably able to squeeze
28 * NOR support into the initial bootloader so it won't be needed but DaVinci
29 * static RAM might be too small for this (I have something like 2Kbytes left
30 * as of now, without NOR support) so this might've not happened...
31 *
32 #define CONFIG_NOR_UART_BOOT
33 */
34
35 /*=======*/
36 /* Board */
37 /*=======*/
38 #define DV_EVM
39 #define CONFIG_SYS_NAND_SMALLPAGE
40 #define CONFIG_SYS_USE_NAND
41 /*===================*/
42 /* SoC Configuration */
43 /*===================*/
44 #define CONFIG_ARM926EJS /* arm926ejs CPU core */
45 #define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
46 #define CONFIG_SYS_HZ_CLOCK 27000000 /* Timer Input clock freq */
47 #define CONFIG_SYS_HZ 1000
48 #define CONFIG_SOC_DM644X
49 /*====================================================*/
50 /* EEPROM definitions for Atmel 24C256BN SEEPROM chip */
51 /* on Sonata/DV_EVM board. No EEPROM on schmoogie. */
52 /*====================================================*/
53 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
54 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
55 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
56 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
57 /*=============*/
58 /* Memory Info */
59 /*=============*/
60 #define CONFIG_SYS_MALLOC_LEN (0x10000 + 128*1024) /* malloc() len */
61 #define CONFIG_SYS_MEMTEST_START 0x80000000 /* memtest start address */
62 #define CONFIG_SYS_MEMTEST_END 0x81000000 /* 16MB RAM test */
63 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
64 #define PHYS_SDRAM_1 0x80000000 /* DDR Start */
65 #define PHYS_SDRAM_1_SIZE 0x10000000 /* DDR size 256MB */
66
67 #define DDR_8BANKS /* 8-bank DDR2 (256MB) */
68 /*====================*/
69 /* Serial Driver info */
70 /*====================*/
71 #define CONFIG_SYS_NS16550
72 #define CONFIG_SYS_NS16550_SERIAL
73 #define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size, byteorder */
74 #define CONFIG_SYS_NS16550_COM1 0x01c20000 /* Base address of UART0 */
75 #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK /* Input clock to NS16550 */
76 #define CONFIG_CONS_INDEX 1 /* use UART0 for console */
77 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
78 /*===================*/
79 /* I2C Configuration */
80 /*===================*/
81 #define CONFIG_HARD_I2C
82 #define CONFIG_DRIVER_DAVINCI_I2C
83 #define CONFIG_SYS_I2C_SPEED 80000 /* 100Kbps won't work, silicon bug */
84 #define CONFIG_SYS_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */
85 /*==================================*/
86 /* Network & Ethernet Configuration */
87 /*==================================*/
88 #define CONFIG_DRIVER_TI_EMAC
89 #define CONFIG_MII
90 #define CONFIG_BOOTP_DNS
91 #define CONFIG_BOOTP_DNS2
92 #define CONFIG_BOOTP_SEND_HOSTNAME
93 #define CONFIG_NET_RETRY_COUNT 10
94 /*=====================*/
95 /* Flash & Environment */
96 /*=====================*/
97 #ifdef CONFIG_SYS_USE_NAND
98 #define CONFIG_NAND_DAVINCI
99 #define CONFIG_SYS_NAND_CS 2
100 #undef CONFIG_ENV_IS_IN_FLASH
101 #define CONFIG_SYS_NO_FLASH
102 #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
103 #ifdef CONFIG_SYS_NAND_SMALLPAGE
104 #define CONFIG_ENV_SECT_SIZE 512 /* Env sector Size */
105 #define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */
106 #define CONFIG_MTD_PARTITIONS
107 #define CONFIG_MTD_DEVICE
108 #define CONFIG_CMD_MTDPARTS
109 #define MTDIDS_DEFAULT \
110 "nand0=davinci_nand.0"
111 #define MTDPARTS_DEFAULT \
112 "mtdparts=davinci_nand.0:384k(bootloader)ro,4m(kernel),-(filesystem)"
113 #else
114 #define CONFIG_ENV_SECT_SIZE 2048 /* Env sector Size */
115 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
116 #endif
117 #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
118 #define CONFIG_SYS_NAND_BASE 0x02000000
119 #define CONFIG_SYS_NAND_USE_FLASH_BBT
120 #define CONFIG_SYS_NAND_HW_ECC
121 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
122 #define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */
123 #elif defined(CONFIG_SYS_USE_NOR)
124 #ifdef CONFIG_NOR_UART_BOOT
125 #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
126 #else
127 #undef CONFIG_SKIP_LOWLEVEL_INIT
128 #endif
129 #define CONFIG_ENV_IS_IN_FLASH
130 #undef CONFIG_SYS_NO_FLASH
131 #define CONFIG_FLASH_CFI_DRIVER
132 #define CONFIG_SYS_FLASH_CFI
133 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */
134 #define CONFIG_SYS_FLASH_SECT_SZ 0x10000 /* 64KB sect size AMD Flash */
135 #define CONFIG_ENV_OFFSET (CONFIG_SYS_FLASH_SECT_SZ*3)
136 #define PHYS_FLASH_1 0x02000000 /* CS2 Base address */
137 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 /* Flash Base for U-Boot */
138 #define PHYS_FLASH_SIZE 0x2000000 /* Flash size 32MB */
139 #define CONFIG_SYS_MAX_FLASH_SECT (PHYS_FLASH_SIZE/CONFIG_SYS_FLASH_SECT_SZ)
140 #define CONFIG_ENV_SECT_SIZE CONFIG_SYS_FLASH_SECT_SZ /* Env sector Size */
141 #endif
142 /*==============================*/
143 /* U-Boot general configuration */
144 /*==============================*/
145 #define CONFIG_MISC_INIT_R
146 #undef CONFIG_BOOTDELAY
147 #define CONFIG_BOOTFILE "uImage" /* Boot file name */
148 #define CONFIG_SYS_PROMPT "U-Boot > " /* Monitor Command Prompt */
149 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
150 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print buffer sz */
151 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
152 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
153 #define CONFIG_SYS_LOAD_ADDR 0x80700000 /* default Linux kernel load address */
154 #define CONFIG_VERSION_VARIABLE
155 #define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, may be later */
156 #define CONFIG_SYS_HUSH_PARSER
157 #define CONFIG_CMDLINE_EDITING
158 #define CONFIG_SYS_LONGHELP
159 #define CONFIG_CRC32_VERIFY
160 #define CONFIG_MX_CYCLIC
161 #define CONFIG_MUSB_HCD
162 #define CONFIG_USB_DAVINCI
163 /*===================*/
164 /* Linux Information */
165 /*===================*/
166 #define LINUX_BOOT_PARAM_ADDR 0x80000100
167 #define CONFIG_CMDLINE_TAG
168 #define CONFIG_SETUP_MEMORY_TAGS
169 #define CONFIG_BOOTARGS "mem=120M console=ttyS0,115200n8 root=/dev/hda1 rw noinitrd ip=dhcp"
170 #define CONFIG_BOOTCOMMAND "setenv setboot setenv bootargs \\$(bootargs) video=dm64xxfb:output=\\$(videostd);run setboot; bootm 0x2050000"
171 /*=================*/
172 /* U-Boot commands */
173 /*=================*/
174 #include <config_cmd_default.h>
175 #define CONFIG_CMD_ASKENV
176 #define CONFIG_CMD_DHCP
177 #define CONFIG_CMD_DIAG
178 #define CONFIG_CMD_I2C
179 #define CONFIG_CMD_MII
180 #define CONFIG_CMD_PING
181 #define CONFIG_CMD_SAVES
182 #define CONFIG_CMD_EEPROM
183 #undef CONFIG_CMD_BDI
184
185 #ifdef CONFIG_CMD_BDI
186 #define CONFIG_CLOCKS
187 #endif
188
189 #undef CONFIG_CMD_FPGA
190 #undef CONFIG_CMD_SETGETDCR
191 #ifdef CONFIG_SYS_USE_NAND
192 #undef CONFIG_CMD_FLASH
193 #undef CONFIG_CMD_IMLS
194 #define CONFIG_CMD_NAND
195 #elif defined(CONFIG_SYS_USE_NOR)
196 #define CONFIG_CMD_JFFS2
197 #else
198 #error "Either CONFIG_SYS_USE_NAND or CONFIG_SYS_USE_NOR _MUST_ be defined !!!"
199 #endif
200 /*==========================*/
201 /* USB MSC support (if any) */
202 /*==========================*/
203 #ifdef CONFIG_USB_DAVINCI
204 #define CONFIG_CMD_USB
205 #ifdef CONFIG_MUSB_HCD
206 #define CONFIG_USB_STORAGE
207 #define CONFIG_CMD_STORAGE
208 #define CONFIG_CMD_FAT
209 #define CONFIG_DOS_PARTITION
210 #endif
211 #ifdef CONFIG_USB_KEYBOARD
212 #define CONFIG_SYS_USB_EVENT_POLL
213 #define CONFIG_PREBOOT "usb start"
214 #endif
215 #endif
216
217 #define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */
218
219 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
220 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000
221 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \
222 CONFIG_SYS_INIT_RAM_SIZE - \
223 GENERATED_GBL_DATA_SIZE)
224
225 #endif /* __CONFIG_H */