include/configs/db-mv784mp-gp.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright (C) 2014-2015 Stefan Roese <sr@denx.de>
   4  */
   5
   6 #ifndef _CONFIG_DB_MV7846MP_GP_H
   7 #define _CONFIG_DB_MV7846MP_GP_H
   8
   9 /*
  10  * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
  11  * for DDR ECC byte filling in the SPL before loading the main
  12  * U-Boot into it.
  13  */
  14
  15 /* I2C */
  16 #define CONFIG_I2C_MVTWSI_BASE0         MVEBU_TWSI_BASE
  17
  18 /* USB/EHCI configuration */
  19 #define CONFIG_USB_MAX_CONTROLLER_COUNT 3
  20
  21 /* Environment in SPI NOR flash */
  22
  23 #define PHY_ANEG_TIMEOUT        8000    /* PHY needs a longer aneg time */
  24
  25 /* SATA support */
  26 #define CONFIG_LBA48
  27
  28 /* PCIe support */
  29 #ifndef CONFIG_SPL_BUILD
  30 #define CONFIG_PCI_SCAN_SHOW
  31 #endif
  32
  33 /* NAND */
  34
  35 /*
  36  * mv-common.h should be defined after CMD configs since it used them
  37  * to enable certain macros
  38  */
  39 #include "mv-common.h"
  40
  41 /*
  42  * Memory layout while starting into the bin_hdr via the
  43  * BootROM:
  44  *
  45  * 0x4000.4000 - 0x4003.4000    headers space (192KiB)
  46  * 0x4000.4030                  bin_hdr start address
  47  * 0x4003.4000 - 0x4004.7c00    BootROM memory allocations (15KiB)
  48  * 0x4007.fffc                  BootROM stack top
  49  *
  50  * The address space between 0x4007.fffc and 0x400f.fff is not locked in
  51  * L2 cache thus cannot be used.
  52  */
  53
  54 /* SPL */
  55 /* Defines for SPL */
  56
  57 #define CONFIG_SPL_BSS_START_ADDR       (0x40000000 + (128 << 10))
  58 #define CONFIG_SPL_BSS_MAX_SIZE         (16 << 10)
  59
  60 #ifdef CONFIG_SPL_BUILD
  61 #define CONFIG_SYS_MALLOC_SIMPLE
  62 #endif
  63
  64 #define CONFIG_SPL_STACK                (0x40000000 + ((192 - 16) << 10))
  65 #define CONFIG_SPL_BOOTROM_SAVE         (CONFIG_SPL_STACK + 4)
  66
  67 /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
  68 #define CONFIG_SPD_EEPROM               0x4e
  69
  70 #endif /* _CONFIG_DB_MV7846MP_GP_H */