include/configs/dbau1x00.h

   1 /*
   2  * (C) Copyright 2003
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 /*
  25  * This file contains the configuration parameters for the dbau1x00 board.
  26  */
  27
  28 #ifndef __CONFIG_H
  29 #define __CONFIG_H
  30
  31 #define CONFIG_MIPS32           1  /* MIPS32 CPU core   */
  32 #define CONFIG_DBAU1X00         1
  33 #define CONFIG_AU1X00           1  /* alchemy series cpu */
  34
  35 #ifdef CONFIG_DBAU1000
  36 /* Also known as Merlot */
  37 #define CONFIG_AU1000           1
  38 #else
  39 #ifdef CONFIG_DBAU1100
  40 #define CONFIG_AU1100           1
  41 #else
  42 #ifdef CONFIG_DBAU1500
  43 #define CONFIG_AU1500           1
  44 #else
  45 #error "No valid board set"
  46 #endif
  47 #endif
  48 #endif
  49
  50 #define CONFIG_ETHADDR          DE:AD:BE:EF:01:01    /* Ethernet address */
  51
  52 #define CONFIG_BOOTDELAY        2       /* autoboot after 2 seconds     */
  53
  54 #define CONFIG_BAUDRATE         115200
  55
  56 /* valid baudrates */
  57 #define CFG_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200 }
  58
  59 #define CONFIG_TIMESTAMP                /* Print image info with timestamp */
  60 #undef  CONFIG_BOOTARGS
  61
  62 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
  63         "addmisc=setenv bootargs $(bootargs) "                          \
  64                 "console=ttyS0,$(baudrate) "                            \
  65                 "panic=1\0"                                             \
  66         "bootfile=/tftpboot/vmlinux.srec\0"                             \
  67         "load=tftp 80500000 $(u-boot)\0"                                \
  68         ""
  69 /* Boot from Compact flash partition 2 as default */
  70 #define CONFIG_BOOTCOMMAND      "ide reset;disk 0x81000000 0:2;bootm"
  71
  72 #define CONFIG_COMMANDS         ((CONFIG_CMD_DFL | \
  73  CFG_CMD_IDE | \
  74  CFG_CMD_DHCP   | \
  75                                  CFG_CMD_ELF    ) & \
  76  ~(CFG_CMD_ENV | CFG_CMD_FAT | CFG_CMD_FLASH | CFG_CMD_FPGA | \
  77    CFG_CMD_MII | CFG_CMD_LOADS | CFG_CMD_RUN | CFG_CMD_LOADB | CFG_CMD_ELF | \
  78    CFG_CMD_BDI | CFG_CMD_BEDBUG))
  79 #include <cmd_confdefs.h>
  80
  81 /*
  82  * Miscellaneous configurable options
  83  */
  84 #define CFG_LONGHELP                            /* undef to save memory      */
  85 #define CFG_PROMPT              "DbAu1x00 # "   /* Monitor Command Prompt    */
  86 #define CFG_CBSIZE              256             /* Console I/O Buffer Size   */
  87 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)  /* Print Buffer Size */
  88 #define CFG_MAXARGS             16              /* max number of command args*/
  89
  90 #define CFG_MALLOC_LEN          128*1024
  91
  92 #define CFG_BOOTPARAMS_LEN      128*1024
  93
  94 #define CFG_HZ                  396000000      /* FIXME causes overflow in net.c */
  95
  96 #define CFG_SDRAM_BASE          0x80000000     /* Cached addr */
  97
  98 #define CFG_LOAD_ADDR           0x81000000     /* default load address  */
  99
 100 #define CFG_MEMTEST_START       0x80100000
 101 #define CFG_MEMTEST_END         0x80800000
 102
 103 /*-----------------------------------------------------------------------
 104  * FLASH and environment organization
 105  */
 106 #define CFG_MAX_FLASH_BANKS     2       /* max number of memory banks */
 107 #define CFG_MAX_FLASH_SECT      (128)   /* max number of sectors on one chip */
 108
 109 #define PHYS_FLASH_1            0xbec00000 /* Flash Bank #1 */
 110 #define PHYS_FLASH_2            0xbfc00000 /* Flash Bank #2 */
 111
 112 /* The following #defines are needed to get flash environment right */
 113 #define CFG_MONITOR_BASE        TEXT_BASE
 114 #define CFG_MONITOR_LEN         (192 << 10)
 115
 116 #define CFG_INIT_SP_OFFSET      0x400000
 117
 118 /* We boot from this flash, selected with dip switch */
 119 #define CFG_FLASH_BASE          PHYS_FLASH_2
 120
 121 /* timeout values are in ticks */
 122 #define CFG_FLASH_ERASE_TOUT    (2 * CFG_HZ) /* Timeout for Flash Erase */
 123 #define CFG_FLASH_WRITE_TOUT    (2 * CFG_HZ) /* Timeout for Flash Write */
 124
 125 #define CFG_ENV_IS_NOWHERE      1
 126
 127 /* Address and size of Primary Environment Sector       */
 128 #define CFG_ENV_ADDR            0xB0030000
 129 #define CFG_ENV_SIZE            0x10000
 130
 131 #define CONFIG_FLASH_16BIT
 132
 133 #define CONFIG_NR_DRAM_BANKS    2
 134
 135 #define CONFIG_NET_MULTI
 136
 137 #define CONFIG_MEMSIZE_IN_BYTES
 138
 139 /*---ATA PCMCIA ------------------------------------*/
 140 #define CFG_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */
 141 #define CFG_PCMCIA_MEM_ADDR 0x20000000
 142 #define CONFIG_PCMCIA_SLOT_A
 143
 144 #define CONFIG_ATAPI 1
 145 #define CONFIG_MAC_PARTITION 1
 146
 147 /* We run CF in "true ide" mode or a harddrive via pcmcia */
 148 #define CONFIG_IDE_PCMCIA 1
 149
 150 /* We only support one slot for now */
 151 #define CFG_IDE_MAXBUS          1       /* max. 1 IDE bus               */
 152 #define CFG_IDE_MAXDEVICE       1       /* max. 1 drive per IDE bus     */
 153
 154 #undef  CONFIG_IDE_LED                  /* LED   for ide not supported  */
 155 #undef  CONFIG_IDE_RESET                /* reset for ide not supported  */
 156
 157 #define CFG_ATA_IDE0_OFFSET     0x0000
 158
 159 #define CFG_ATA_BASE_ADDR       CFG_PCMCIA_MEM_ADDR
 160
 161 /* Offset for data I/O                  */
 162 #define CFG_ATA_DATA_OFFSET     8
 163
 164 /* Offset for normal register accesses  */
 165 #define CFG_ATA_REG_OFFSET      0
 166
 167 /* Offset for alternate registers       */
 168 #define CFG_ATA_ALT_OFFSET      0x0100
 169
 170 /*-----------------------------------------------------------------------
 171  * Cache Configuration
 172  */
 173 #define CFG_DCACHE_SIZE         16384
 174 #define CFG_ICACHE_SIZE         16384
 175 #define CFG_CACHELINE_SIZE      32
 176
 177 #define DB1000_BCSR_ADDR 0xAE000000
 178
 179 #endif  /* __CONFIG_H */