include/configs/delta.h

   1 /*
   2  * Configuation settings for the Delta board.
   3  *
   4  * See file CREDITS for list of people who contributed to this
   5  * project.
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 of
  10  * the License, or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20  * MA 02111-1307 USA
  21  */
  22
  23 #ifndef __CONFIG_H
  24 #define __CONFIG_H
  25
  26 /*
  27  * High Level Configuration Options
  28  * (easy to change)
  29  */
  30 #define CONFIG_CPU_MONAHANS     1       /* Intel Monahan CPU    */
  31 #define CONFIG_DELTA            1       /* Delta board       */
  32
  33 /* #define CONFIG_LCD           1 */
  34 #ifdef CONFIG_LCD
  35 #define CONFIG_SHARP_LM8V31
  36 #endif
  37 #define BOARD_LATE_INIT         1
  38
  39 #undef CONFIG_SKIP_RELOCATE_UBOOT
  40 #undef CONFIG_USE_IRQ                   /* we don't need IRQ/FIQ stuff */
  41
  42 /*
  43  * Size of malloc() pool
  44  */
  45 #define CONFIG_SYS_MALLOC_LEN       (CONFIG_ENV_SIZE + 256*1024)
  46 #define CONFIG_SYS_GBL_DATA_SIZE        128     /* size in bytes reserved for initial data */
  47
  48 /*
  49  * Hardware drivers
  50  */
  51 #undef TURN_ON_ETHERNET
  52 #ifdef TURN_ON_ETHERNET
  53 # define CONFIG_DRIVER_SMC91111 1
  54 # define CONFIG_SMC91111_BASE   0x14000300
  55 # define CONFIG_SMC91111_EXT_PHY
  56 # define CONFIG_SMC_USE_32_BIT
  57 # undef CONFIG_SMC_USE_IOFUNCS          /* just for use with the kernel */
  58 #endif
  59
  60 #define CONFIG_HARD_I2C         1       /* required for DA9030 access */
  61 #define CONFIG_SYS_I2C_SPEED            400000  /* I2C speed */
  62 #define CONFIG_SYS_I2C_SLAVE            1       /* I2C controllers address */
  63 #define DA9030_I2C_ADDR         0x49    /* I2C address of DA9030 */
  64 #define CONFIG_SYS_DA9030_EXTON_DELAY   100000  /* wait x us after DA9030 reset via EXTON */
  65 #define CONFIG_SYS_I2C_INIT_BOARD       1
  66 /* #define CONFIG_HW_WATCHDOG   1       /\* Required for hitting the DA9030 WD *\/ */
  67
  68 #define DELTA_CHECK_KEYBD       1       /* check for keys pressed during boot */
  69 #define CONFIG_PREBOOT          "\0"
  70
  71 #ifdef DELTA_CHECK_KEYBD
  72 # define KEYBD_DATALEN          4       /* we have four keys */
  73 # define KEYBD_KP_DKIN0         0x1     /* vol+ */
  74 # define KEYBD_KP_DKIN1         0x2     /* vol- */
  75 # define KEYBD_KP_DKIN2         0x3     /* multi */
  76 # define KEYBD_KP_DKIN5         0x4     /* SWKEY_GN */
  77 #endif /* DELTA_CHECK_KEYBD */
  78
  79 /*
  80  * select serial console configuration
  81  */
  82 #define CONFIG_FFUART           1
  83
  84 /* allow to overwrite serial and ethaddr */
  85 #define CONFIG_ENV_OVERWRITE
  86
  87 #define CONFIG_BAUDRATE         115200
  88
  89
  90 /*
  91  * BOOTP options
  92  */
  93 #define CONFIG_BOOTP_BOOTFILESIZE
  94 #define CONFIG_BOOTP_BOOTPATH
  95 #define CONFIG_BOOTP_GATEWAY
  96 #define CONFIG_BOOTP_HOSTNAME
  97
  98
  99 /*
 100  * Command line configuration.
 101  */
 102 #include <config_cmd_default.h>
 103
 104 #ifdef TURN_ON_ETHERNET
 105
 106 #define CONFIG_CMD_PING
 107
 108 #else
 109
 110 #define CONFIG_CMD_SAVEENV
 111 #define CONFIG_CMD_NAND
 112 #define CONFIG_CMD_I2C
 113
 114 #undef CONFIG_CMD_NET
 115 #undef CONFIG_CMD_FLASH
 116 #undef CONFIG_CMD_IMLS
 117
 118 #endif
 119
 120 /* USB */
 121 #define CONFIG_USB_OHCI_NEW     1
 122 #define CONFIG_USB_STORAGE      1
 123 #define CONFIG_DOS_PARTITION    1
 124
 125 #include <asm/arch/pxa-regs.h> /* for OHCI_REGS_BASE */
 126
 127 #undef CONFIG_SYS_USB_OHCI_BOARD_INIT
 128 #define CONFIG_SYS_USB_OHCI_CPU_INIT    1
 129 #define CONFIG_SYS_USB_OHCI_REGS_BASE   OHCI_REGS_BASE
 130 #define CONFIG_SYS_USB_OHCI_SLOT_NAME   "delta"
 131 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      3
 132
 133 #define CONFIG_BOOTDELAY        -1
 134 #define CONFIG_ETHADDR          08:00:3e:26:0a:5b
 135 #define CONFIG_NETMASK          255.255.0.0
 136 #define CONFIG_IPADDR           192.168.0.21
 137 #define CONFIG_SERVERIP         192.168.0.250
 138 #define CONFIG_BOOTCOMMAND      "bootm 80000"
 139 #define CONFIG_BOOTARGS         "root=/dev/mtdblock2 rootfstype=cramfs console=ttyS0,115200"
 140 #define CONFIG_CMDLINE_TAG
 141 #define CONFIG_TIMESTAMP
 142
 143 #if defined(CONFIG_CMD_KGDB)
 144 #define CONFIG_KGDB_BAUDRATE    230400          /* speed to run kgdb serial port */
 145 #define CONFIG_KGDB_SER_INDEX   2               /* which serial port to use */
 146 #endif
 147
 148 /*
 149  * Miscellaneous configurable options
 150  */
 151 #define CONFIG_SYS_HUSH_PARSER          1
 152 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 153
 154 #define CONFIG_SYS_LONGHELP                             /* undef to save memory         */
 155 #ifdef CONFIG_SYS_HUSH_PARSER
 156 #define CONFIG_SYS_PROMPT               "$ "            /* Monitor Command Prompt */
 157 #else
 158 #define CONFIG_SYS_PROMPT               "=> "           /* Monitor Command Prompt */
 159 #endif
 160 #define CONFIG_SYS_CBSIZE               256             /* Console I/O Buffer Size      */
 161 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
 162 #define CONFIG_SYS_MAXARGS              16              /* max number of command args   */
 163 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size    */
 164 #define CONFIG_SYS_DEVICE_NULLDEV       1
 165
 166 #define CONFIG_SYS_MEMTEST_START        0x80400000      /* memtest works on     */
 167 #define CONFIG_SYS_MEMTEST_END          0x80800000      /* 4 ... 8 MB in DRAM   */
 168
 169 #define CONFIG_SYS_LOAD_ADDR    (CONFIG_SYS_DRAM_BASE + 0x8000) /* default load address */
 170
 171 #define CONFIG_SYS_HZ                   1000
 172
 173 /* Monahans Core Frequency */
 174 #define CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO          16 /* valid values: 8, 16, 24, 31 */
 175 #define CONFIG_SYS_MONAHANS_TURBO_RUN_MODE_RATIO        1  /* valid values: 1, 2 */
 176
 177
 178                                                 /* valid baudrates */
 179 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
 180
 181 #ifdef CONFIG_MMC
 182 #define CONFIG_PXA_MMC
 183 #define CONFIG_CMD_MMC
 184 #define CONFIG_SYS_MMC_BASE             0xF0000000
 185 #endif
 186
 187 /*
 188  * Stack sizes
 189  *
 190  * The stack sizes are set up in start.S using the settings below
 191  */
 192 #define CONFIG_STACKSIZE        (128*1024)      /* regular stack */
 193 #ifdef CONFIG_USE_IRQ
 194 #define CONFIG_STACKSIZE_IRQ    (4*1024)        /* IRQ stack */
 195 #define CONFIG_STACKSIZE_FIQ    (4*1024)        /* FIQ stack */
 196 #endif
 197
 198 /*
 199  * Physical Memory Map
 200  */
 201 #define CONFIG_NR_DRAM_BANKS    4          /* we have 2 banks of DRAM */
 202 #define PHYS_SDRAM_1            0x80000000 /* SDRAM Bank #1 */
 203 #define PHYS_SDRAM_1_SIZE       0x1000000  /* 64 MB */
 204 #define PHYS_SDRAM_2            0x81000000 /* SDRAM Bank #2 */
 205 #define PHYS_SDRAM_2_SIZE       0x1000000  /* 64 MB */
 206 #define PHYS_SDRAM_3            0x82000000 /* SDRAM Bank #3 */
 207 #define PHYS_SDRAM_3_SIZE       0x1000000  /* 64 MB */
 208 #define PHYS_SDRAM_4            0x83000000 /* SDRAM Bank #4 */
 209 #define PHYS_SDRAM_4_SIZE       0x1000000  /* 64 MB */
 210
 211 #define CONFIG_SYS_DRAM_BASE            0x80000000 /* at CS0 */
 212 #define CONFIG_SYS_DRAM_SIZE            0x04000000 /* 64 MB Ram */
 213
 214 #undef CONFIG_SYS_SKIP_DRAM_SCRUB
 215
 216 /*
 217  * NAND Flash
 218  */
 219 #undef CONFIG_NAND_LEGACY
 220
 221 #define CONFIG_SYS_NAND0_BASE           0x0 /* 0x43100040 */ /* 0x10000000 */
 222 #undef CONFIG_SYS_NAND1_BASE
 223
 224 #define CONFIG_SYS_NAND_BASE_LIST       { CONFIG_SYS_NAND0_BASE }
 225 #define CONFIG_SYS_MAX_NAND_DEVICE      1       /* Max number of NAND devices */
 226
 227 /* nand timeout values */
 228 #define CONFIG_SYS_NAND_PROG_ERASE_TO   3000
 229 #define CONFIG_SYS_NAND_OTHER_TO        100
 230 #define CONFIG_SYS_NAND_SENDCMD_RETRY   3
 231 #undef NAND_ALLOW_ERASE_ALL     /* Allow erasing bad blocks - don't use */
 232
 233 /* NAND Timing Parameters (in ns) */
 234 #define NAND_TIMING_tCH         10
 235 #define NAND_TIMING_tCS         0
 236 #define NAND_TIMING_tWH         20
 237 #define NAND_TIMING_tWP         40
 238
 239 #define NAND_TIMING_tRH         20
 240 #define NAND_TIMING_tRP         40
 241
 242 #define NAND_TIMING_tR          11123
 243 #define NAND_TIMING_tWHR        100
 244 #define NAND_TIMING_tAR         10
 245
 246 /* NAND debugging */
 247 #define CONFIG_SYS_DFC_DEBUG1 /* usefull */
 248 #undef CONFIG_SYS_DFC_DEBUG2  /* noisy */
 249 #undef CONFIG_SYS_DFC_DEBUG3  /* extremly noisy  */
 250
 251 #define CONFIG_MTD_DEBUG
 252 #define CONFIG_MTD_DEBUG_VERBOSE 1
 253
 254 #define ADDR_COLUMN             1
 255 #define ADDR_PAGE               2
 256 #define ADDR_COLUMN_PAGE        3
 257
 258 #define NAND_ChipID_UNKNOWN     0x00
 259 #define NAND_MAX_FLOORS         1
 260
 261 #define CONFIG_SYS_NO_FLASH             1
 262
 263 #define CONFIG_ENV_IS_IN_NAND   1
 264 #define CONFIG_ENV_OFFSET               0x40000
 265 #define CONFIG_ENV_OFFSET_REDUND        0x44000
 266 #define CONFIG_ENV_SIZE         0x4000
 267
 268 #endif  /* __CONFIG_H */