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1 /*
2 * (C) Copyright 2006-2008
3 * Texas Instruments.
4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Syed Mohammed Khasim <x0khasim@ti.com>
6 *
7 * (C) Copyright 2009
8 * Frederik Kriewitz <frederik@kriewitz.eu>
9 *
10 * Configuration settings for the DevKit8000 board.
11 *
12 * SPDX-License-Identifier: GPL-2.0+
13 */
14
15 #ifndef __CONFIG_H
16 #define __CONFIG_H
17
18 /* High Level Configuration Options */
19 #define CONFIG_MACH_TYPE MACH_TYPE_DEVKIT8000
20
21 /*
22 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
23 * 64 bytes before this address should be set aside for u-boot.img's
24 * header. That is 0x800FFFC0--0x80100000 should not be used for any
25 * other needs.
26 */
27 #define CONFIG_SYS_TEXT_BASE 0x80100000
28
29 #define CONFIG_SPL_BSS_START_ADDR 0x80000500 /* leave space for bootargs*/
30 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
31
32 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
33 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
34
35 /* Physical Memory Map */
36 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
37
38 #include <configs/ti_omap3_common.h>
39
40 #define CONFIG_MISC_INIT_R
41
42 #define CONFIG_REVISION_TAG 1
43
44 /* Size of malloc() pool */
45 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
46 /* Sector */
47 #undef CONFIG_SYS_MALLOC_LEN
48 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
49
50 /* Hardware drivers */
51 /* DM9000 */
52 #define CONFIG_NET_RETRY_COUNT 20
53 #define CONFIG_DRIVER_DM9000 1
54 #define CONFIG_DM9000_BASE 0x2c000000
55 #define DM9000_IO CONFIG_DM9000_BASE
56 #define DM9000_DATA (CONFIG_DM9000_BASE + 0x400)
57 #define CONFIG_DM9000_USE_16BIT 1
58 #define CONFIG_DM9000_NO_SROM 1
59 #undef CONFIG_DM9000_DEBUG
60
61 /* SPI */
62 #undef CONFIG_SPI
63
64 /* I2C */
65
66 /* TWL4030 */
67 #define CONFIG_TWL4030_LED 1
68
69 /* Board NAND Info */
70 #define MTDIDS_DEFAULT "nand0=nand"
71 #define MTDPARTS_DEFAULT "mtdparts=nand:" \
72 "512k(x-loader)," \
73 "1920k(u-boot)," \
74 "128k(u-boot-env)," \
75 "4m(kernel)," \
76 "-(fs)"
77
78 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
79 /* to access nand */
80 #define CONFIG_JFFS2_NAND
81 /* nand device jffs2 lives on */
82 #define CONFIG_JFFS2_DEV "nand0"
83 /* start of jffs2 partition */
84 #define CONFIG_JFFS2_PART_OFFSET 0x680000
85 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
86 /* partition */
87
88 #undef CONFIG_SUPPORT_RAW_INITRD
89
90 /* BOOTP/DHCP options */
91 #define CONFIG_BOOTP_SUBNETMASK
92 #define CONFIG_BOOTP_GATEWAY
93 #define CONFIG_BOOTP_HOSTNAME
94 #define CONFIG_BOOTP_NISDOMAIN
95 #define CONFIG_BOOTP_BOOTPATH
96 #define CONFIG_BOOTP_BOOTFILESIZE
97 #define CONFIG_BOOTP_DNS
98 #define CONFIG_BOOTP_DNS2
99 #define CONFIG_BOOTP_SEND_HOSTNAME
100 #define CONFIG_BOOTP_NTPSERVER
101 #define CONFIG_BOOTP_TIMEOFFSET
102 #undef CONFIG_BOOTP_VENDOREX
103
104 /* Environment information */
105 #define CONFIG_EXTRA_ENV_SETTINGS \
106 "loadaddr=0x82000000\0" \
107 "console=ttyO2,115200n8\0" \
108 "mmcdev=0\0" \
109 "vram=12M\0" \
110 "dvimode=1024x768MR-16@60\0" \
111 "defaultdisplay=dvi\0" \
112 "nfsopts=hard,tcp,rsize=65536,wsize=65536\0" \
113 "kernelopts=rw\0" \
114 "commonargs=" \
115 "setenv bootargs console=${console} " \
116 "vram=${vram} " \
117 "omapfb.mode=dvi:${dvimode} " \
118 "omapdss.def_disp=${defaultdisplay}\0" \
119 "mmcargs=" \
120 "run commonargs; " \
121 "setenv bootargs ${bootargs} " \
122 "root=/dev/mmcblk0p2 " \
123 "rootwait " \
124 "${kernelopts}\0" \
125 "nandargs=" \
126 "run commonargs; " \
127 "setenv bootargs ${bootargs} " \
128 "omapfb.mode=dvi:${dvimode} " \
129 "omapdss.def_disp=${defaultdisplay} " \
130 "root=/dev/mtdblock4 " \
131 "rootfstype=jffs2 " \
132 "${kernelopts}\0" \
133 "netargs=" \
134 "run commonargs; " \
135 "setenv bootargs ${bootargs} " \
136 "root=/dev/nfs " \
137 "nfsroot=${serverip}:${rootpath},${nfsopts} " \
138 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off " \
139 "${kernelopts} " \
140 "dnsip1=${dnsip} " \
141 "dnsip2=${dnsip2}\0" \
142 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
143 "bootscript=echo Running bootscript from mmc ...; " \
144 "source ${loadaddr}\0" \
145 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
146 "eraseenv=nand unlock 0x260000 0x20000; nand erase 0x260000 0x20000\0" \
147 "mmcboot=echo Booting from mmc ...; " \
148 "run mmcargs; " \
149 "bootm ${loadaddr}\0" \
150 "nandboot=echo Booting from nand ...; " \
151 "run nandargs; " \
152 "nand read ${loadaddr} 280000 400000; " \
153 "bootm ${loadaddr}\0" \
154 "netboot=echo Booting from network ...; " \
155 "dhcp ${loadaddr}; " \
156 "run netargs; " \
157 "bootm ${loadaddr}\0" \
158 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
159 "if run loadbootscript; then " \
160 "run bootscript; " \
161 "else " \
162 "if run loaduimage; then " \
163 "run mmcboot; " \
164 "else run nandboot; " \
165 "fi; " \
166 "fi; " \
167 "else run nandboot; fi\0"
168
169 #define CONFIG_BOOTCOMMAND "run autoboot"
170
171 /* Boot Argument Buffer Size */
172 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0 + 0x07000000)
173 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
174 0x01000000) /* 16MB */
175
176 /* NAND and environment organization */
177 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
178
179 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
180
181 /* SRAM config */
182 #define CONFIG_SYS_SRAM_START 0x40200000
183 #define CONFIG_SYS_SRAM_SIZE 0x10000
184
185 /* Defines for SPL */
186
187 #undef CONFIG_SPL_TEXT_BASE
188 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
189
190 /* NAND boot config */
191 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
192 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
193 #define CONFIG_SYS_NAND_PAGE_COUNT 64
194 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
195 #define CONFIG_SYS_NAND_OOBSIZE 64
196 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
197 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
198 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
199 10, 11, 12, 13}
200
201 #define CONFIG_SYS_NAND_ECCSIZE 512
202 #define CONFIG_SYS_NAND_ECCBYTES 3
203 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
204
205 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
206 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000
207
208 /* SPL OS boot options */
209 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
210
211 #undef CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR
212 #undef CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR
213 #undef CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS
214 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x500 /* address 0xa0000 */
215 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x8 /* address 0x1000 */
216 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 8 /* 4KB */
217
218 #undef CONFIG_SYS_SPL_ARGS_ADDR
219 #define CONFIG_SYS_SPL_ARGS_ADDR (PHYS_SDRAM_1 + 0x100)
220
221 #endif /* __CONFIG_H */