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1 /*
2 * (C) Copyright 2011 Comelit Group SpA
3 * Luca Ceresoli <luca.ceresoli@comelit.it>
4 *
5 * Based on omap3_beagle.h:
6 * (C) Copyright 2006-2008
7 * Texas Instruments.
8 * Richard Woodruff <r-woodruff2@ti.com>
9 * Syed Mohammed Khasim <x0khasim@ti.com>
10 *
11 * Configuration settings for the Comelit DIG297 board.
12 *
13 * See file CREDITS for list of people who contributed to this
14 * project.
15 *
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as
18 * published by the Free Software Foundation; either version 2 of
19 * the License, or (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 * MA 02111-1307 USA
30 */
31
32 #ifndef __CONFIG_H
33 #define __CONFIG_H
34
35 #include <asm/mach-types.h>
36 #ifdef MACH_TYPE_OMAP3_CPS
37 #error "MACH_TYPE_OMAP3_CPS has been defined properly, please remove this."
38 #else
39 #define MACH_TYPE_OMAP3_CPS 2751
40 #endif
41 #define CONFIG_MACH_TYPE MACH_TYPE_OMAP3_CPS
42
43 /*
44 * High Level Configuration Options
45 */
46 #define CONFIG_OMAP /* in a TI OMAP core */
47 #define CONFIG_OMAP34XX /* which is a 34XX */
48 #define CONFIG_OMAP_GPIO
49
50 #define CONFIG_SYS_TEXT_BASE 0x80008000
51
52 #define CONFIG_SDRC /* The chip has SDRC controller */
53
54 #include <asm/arch/cpu.h> /* get chip and board defs */
55 #include <asm/arch/omap3.h>
56
57 /*
58 * Display CPU and Board information
59 */
60 #define CONFIG_DISPLAY_CPUINFO
61 #define CONFIG_DISPLAY_BOARDINFO
62
63 /* Clock Defines */
64 #define V_OSCK 26000000 /* Clock output from T2 */
65 #define V_SCLK (V_OSCK >> 1)
66
67 #undef CONFIG_USE_IRQ /* no support for IRQs */
68 #define CONFIG_MISC_INIT_R
69
70 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
71 #define CONFIG_SETUP_MEMORY_TAGS
72 #define CONFIG_INITRD_TAG
73 #define CONFIG_REVISION_TAG
74
75 /*
76 * Size of malloc() pool
77 */
78 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
79 /* Sector */
80 #define CONFIG_SYS_MALLOC_LEN (1024 << 10) /* UBI needs >= 512 kB */
81
82 /*
83 * Hardware drivers
84 */
85
86 /*
87 * NS16550 Configuration
88 */
89 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
90
91 #define CONFIG_SYS_NS16550
92 #define CONFIG_SYS_NS16550_SERIAL
93 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
94 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
95
96 /*
97 * select serial console configuration: UART3 (ttyO2)
98 */
99 #define CONFIG_CONS_INDEX 3
100 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
101 #define CONFIG_SERIAL3 3
102
103 /* allow to overwrite serial and ethaddr */
104 #define CONFIG_ENV_OVERWRITE
105 #define CONFIG_BAUDRATE 115200
106 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
107 115200}
108 #define CONFIG_GENERIC_MMC 1
109 #define CONFIG_MMC 1
110 #define CONFIG_OMAP_HSMMC 1
111 #define CONFIG_DOS_PARTITION
112
113 /* library portions to compile in */
114 #define CONFIG_RBTREE
115 #define CONFIG_MTD_PARTITIONS
116 #define CONFIG_LZO
117
118 /* commands to include */
119 #include <config_cmd_default.h>
120
121 #define CONFIG_CMD_FAT /* FAT support */
122 #define CONFIG_CMD_UBI /* UBI Support */
123 #define CONFIG_CMD_UBIFS /* UBIFS Support */
124 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
125 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
126 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
127 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:896k(uboot),"\
128 "128k(uboot-env),3m(kernel),252m(ubi)"
129
130 #define CONFIG_CMD_I2C /* I2C serial bus support */
131 #define CONFIG_CMD_MMC /* MMC support */
132 #define CONFIG_CMD_NAND /* NAND support */
133
134 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
135 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
136 #undef CONFIG_CMD_IMI /* iminfo */
137 #undef CONFIG_CMD_IMLS /* List all found images */
138 #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
139 #undef CONFIG_CMD_NFS /* NFS support */
140
141 #define CONFIG_SYS_NO_FLASH
142 #define CONFIG_HARD_I2C
143 #define CONFIG_SYS_I2C_SPEED 100000
144 #define CONFIG_SYS_I2C_SLAVE 1
145 #define CONFIG_SYS_I2C_BUS 0
146 #define CONFIG_SYS_I2C_BUS_SELECT 1
147 #define CONFIG_DRIVER_OMAP34XX_I2C 1
148
149 /*
150 * TWL4030
151 */
152 #define CONFIG_TWL4030_POWER
153 #define CONFIG_TWL4030_LED
154
155 /*
156 * Board NAND Info.
157 */
158 #define CONFIG_NAND_OMAP_GPMC
159 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
160 /* to access nand */
161 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
162 /* to access nand at */
163 /* CS0 */
164 #define GPMC_NAND_ECC_LP_x16_LAYOUT
165
166 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
167
168 #if defined(CONFIG_CMD_NET)
169 /*
170 * SMSC9220 Ethernet
171 */
172
173 #define CONFIG_SMC911X
174 #define CONFIG_SMC911X_32_BIT
175 #define CONFIG_SMC911X_BASE 0x2C000000
176
177 #endif /* (CONFIG_CMD_NET) */
178
179 /* Environment information */
180 #define CONFIG_BOOTDELAY 1
181
182 #define CONFIG_EXTRA_ENV_SETTINGS \
183 "loadaddr=0x82000000\0" \
184 "console=ttyO2,115200n8\0" \
185 "mtdids=" MTDIDS_DEFAULT "\0" \
186 "mtdparts=" MTDPARTS_DEFAULT "\0" \
187 "partition=nand0,3\0"\
188 "mmcroot=/dev/mmcblk0p2 rw\0" \
189 "mmcrootfstype=ext3 rootwait\0" \
190 "nandroot=ubi0:rootfs ro\0" \
191 "nandrootfstype=ubifs\0" \
192 "nfspath=/srv/nfs\0" \
193 "tftpfilename=uImage\0" \
194 "gatewayip=0.0.0.0\0" \
195 "mmcargs=setenv bootargs console=${console} " \
196 "${mtdparts} " \
197 "root=${mmcroot} " \
198 "rootfstype=${mmcrootfstype} " \
199 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
200 "${netmask}:${hostname}::off\0" \
201 "nandargs=setenv bootargs console=${console} " \
202 "${mtdparts} " \
203 "ubi.mtd=3 " \
204 "root=${nandroot} " \
205 "rootfstype=${nandrootfstype} " \
206 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
207 "${netmask}:${hostname}::off\0" \
208 "netargs=setenv bootargs console=${console} " \
209 "${mtdparts} " \
210 "root=/dev/nfs rw " \
211 "nfsroot=${serverip}:${nfspath} " \
212 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
213 "${netmask}:${hostname}::off\0" \
214 "mmcboot=echo Booting from mmc ...; " \
215 "run mmcargs; " \
216 "bootm ${loadaddr}\0" \
217 "nandboot=echo Booting from nand ...; " \
218 "run nandargs; " \
219 "nand read ${loadaddr} 100000 300000; " \
220 "bootm ${loadaddr}\0" \
221 "netboot=echo Booting from network ...; " \
222 "run netargs; " \
223 "tftp ${loadaddr} ${serverip}:${tftpfilename}; " \
224 "bootm ${loadaddr}\0" \
225 "resetenv=nand erase e0000 20000\0"\
226
227 #define CONFIG_BOOTCOMMAND \
228 "run nandboot"
229
230 #define CONFIG_AUTO_COMPLETE
231 /*
232 * Miscellaneous configurable options
233 */
234 #define CONFIG_SYS_LONGHELP /* undef to save memory */
235 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
236 #define CONFIG_SYS_PROMPT "DIG297# "
237 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
238 /* Print Buffer Size */
239 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
240 sizeof(CONFIG_SYS_PROMPT) + 16)
241 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
242 /* Boot Argument Buffer Size */
243 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
244
245 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */
246 /* works on */
247 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
248 0x01F00000) /* 31MB */
249
250 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */
251 /* load address */
252
253 /*
254 * OMAP3 has 12 GP timers, they can be driven by the system clock
255 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
256 * This rate is divided by a local divisor.
257 */
258 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
259 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
260 #define CONFIG_SYS_HZ 1000
261
262 /*-----------------------------------------------------------------------
263 * Stack sizes
264 *
265 * The stack sizes are set up in start.S using the settings below
266 */
267 #define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
268 #ifdef CONFIG_USE_IRQ
269 #define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack 4 KiB */
270 #define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack 4 KiB */
271 #endif
272
273 /*-----------------------------------------------------------------------
274 * Physical Memory Map
275 */
276 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
277 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
278 #define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
279 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
280
281 /*-----------------------------------------------------------------------
282 * FLASH and environment organization
283 */
284
285 /* **** PISMO SUPPORT *** */
286
287 /* Configure the PISMO */
288 #define PISMO1_NAND_SIZE GPMC_SIZE_128M
289
290 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
291
292 #define CONFIG_SYS_FLASH_BASE boot_flash_base
293
294 /* Monitor at start of flash */
295 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
296
297 #define CONFIG_ENV_IS_IN_NAND
298 #define SMNAND_ENV_OFFSET 0x0E0000 /* environment starts here */
299
300 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
301 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
302 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
303
304 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
305 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
306 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
307 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
308 CONFIG_SYS_INIT_RAM_SIZE - \
309 GENERATED_GBL_DATA_SIZE)
310
311 #endif /* __CONFIG_H */