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git.ipfire.org Git - people/ms/u-boot.git/blob - include/configs/dig297.h
2 * (C) Copyright 2011 Comelit Group SpA
3 * Luca Ceresoli <luca.ceresoli@comelit.it>
5 * Based on omap3_beagle.h:
6 * (C) Copyright 2006-2008
8 * Richard Woodruff <r-woodruff2@ti.com>
9 * Syed Mohammed Khasim <x0khasim@ti.com>
11 * Configuration settings for the Comelit DIG297 board.
13 * SPDX-License-Identifier: GPL-2.0+
19 #include <asm/mach-types.h>
20 #ifdef MACH_TYPE_OMAP3_CPS
21 #error "MACH_TYPE_OMAP3_CPS has been defined properly, please remove this."
23 #define MACH_TYPE_OMAP3_CPS 2751
25 #define CONFIG_MACH_TYPE MACH_TYPE_OMAP3_CPS
26 /* Common ARM Erratas */
27 #define CONFIG_ARM_ERRATA_454179
28 #define CONFIG_ARM_ERRATA_430973
29 #define CONFIG_ARM_ERRATA_621766
32 * High Level Configuration Options
34 #define CONFIG_OMAP /* in a TI OMAP core */
35 #define CONFIG_OMAP_GPIO
36 #define CONFIG_OMAP_COMMON
38 #define CONFIG_SYS_TEXT_BASE 0x80008000
40 #define CONFIG_SDRC /* The chip has SDRC controller */
42 #include <asm/arch/cpu.h> /* get chip and board defs */
43 #include <asm/arch/omap.h>
46 * Display CPU and Board information
48 #define CONFIG_DISPLAY_CPUINFO
49 #define CONFIG_DISPLAY_BOARDINFO
52 #define V_OSCK 26000000 /* Clock output from T2 */
53 #define V_SCLK (V_OSCK >> 1)
55 #define CONFIG_MISC_INIT_R
57 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
58 #define CONFIG_SETUP_MEMORY_TAGS
59 #define CONFIG_INITRD_TAG
60 #define CONFIG_REVISION_TAG
63 * Size of malloc() pool
65 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
67 #define CONFIG_SYS_MALLOC_LEN (1024 << 10) /* UBI needs >= 512 kB */
74 * NS16550 Configuration
76 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
78 #define CONFIG_SYS_NS16550
79 #define CONFIG_SYS_NS16550_SERIAL
80 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
81 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
84 * select serial console configuration: UART3 (ttyO2)
86 #define CONFIG_CONS_INDEX 3
87 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
88 #define CONFIG_SERIAL3 3
90 /* allow to overwrite serial and ethaddr */
91 #define CONFIG_ENV_OVERWRITE
92 #define CONFIG_BAUDRATE 115200
93 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
95 #define CONFIG_GENERIC_MMC 1
97 #define CONFIG_OMAP_HSMMC 1
98 #define CONFIG_DOS_PARTITION
100 /* library portions to compile in */
101 #define CONFIG_RBTREE
102 #define CONFIG_MTD_PARTITIONS
105 /* commands to include */
106 #define CONFIG_CMD_FAT /* FAT support */
107 #define CONFIG_CMD_UBI /* UBI Support */
108 #define CONFIG_CMD_UBIFS /* UBIFS Support */
109 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
110 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
111 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
112 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:896k(uboot),"\
113 "128k(uboot-env),3m(kernel),252m(ubi)"
115 #define CONFIG_CMD_I2C /* I2C serial bus support */
116 #define CONFIG_CMD_MMC /* MMC support */
117 #define CONFIG_CMD_NAND /* NAND support */
119 #define CONFIG_SYS_NO_FLASH
120 #define CONFIG_SYS_I2C
121 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000
122 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
123 #define CONFIG_SYS_I2C_OMAP34XX
128 #define CONFIG_TWL4030_POWER
129 #define CONFIG_TWL4030_LED
134 #define CONFIG_NAND_OMAP_GPMC
135 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
136 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
138 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
139 /* to access nand at */
141 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
143 #if defined(CONFIG_CMD_NET)
148 #define CONFIG_SMC911X
149 #define CONFIG_SMC911X_32_BIT
150 #define CONFIG_SMC911X_BASE 0x2C000000
152 #endif /* (CONFIG_CMD_NET) */
154 /* Environment information */
155 #define CONFIG_BOOTDELAY 1
157 #define CONFIG_EXTRA_ENV_SETTINGS \
158 "loadaddr=0x82000000\0" \
159 "console=ttyO2,115200n8\0" \
160 "mtdids=" MTDIDS_DEFAULT "\0" \
161 "mtdparts=" MTDPARTS_DEFAULT "\0" \
162 "partition=nand0,3\0"\
163 "mmcroot=/dev/mmcblk0p2 rw\0" \
164 "mmcrootfstype=ext3 rootwait\0" \
165 "nandroot=ubi0:rootfs ro\0" \
166 "nandrootfstype=ubifs\0" \
167 "nfspath=/srv/nfs\0" \
168 "tftpfilename=uImage\0" \
169 "gatewayip=0.0.0.0\0" \
170 "mmcargs=setenv bootargs console=${console} " \
173 "rootfstype=${mmcrootfstype} " \
174 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
175 "${netmask}:${hostname}::off\0" \
176 "nandargs=setenv bootargs console=${console} " \
179 "root=${nandroot} " \
180 "rootfstype=${nandrootfstype} " \
181 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
182 "${netmask}:${hostname}::off\0" \
183 "netargs=setenv bootargs console=${console} " \
185 "root=/dev/nfs rw " \
186 "nfsroot=${serverip}:${nfspath} " \
187 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
188 "${netmask}:${hostname}::off\0" \
189 "mmcboot=echo Booting from mmc ...; " \
191 "bootm ${loadaddr}\0" \
192 "nandboot=echo Booting from nand ...; " \
194 "nand read ${loadaddr} 100000 300000; " \
195 "bootm ${loadaddr}\0" \
196 "netboot=echo Booting from network ...; " \
198 "tftp ${loadaddr} ${serverip}:${tftpfilename}; " \
199 "bootm ${loadaddr}\0" \
200 "resetenv=nand erase e0000 20000\0"\
202 #define CONFIG_BOOTCOMMAND \
205 #define CONFIG_AUTO_COMPLETE
207 * Miscellaneous configurable options
209 #define CONFIG_SYS_LONGHELP /* undef to save memory */
210 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
211 #define CONFIG_SYS_PROMPT "DIG297# "
212 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
213 /* Print Buffer Size */
214 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
215 sizeof(CONFIG_SYS_PROMPT) + 16)
216 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
217 /* Boot Argument Buffer Size */
218 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
220 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */
222 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
223 0x01F00000) /* 31MB */
225 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */
229 * OMAP3 has 12 GP timers, they can be driven by the system clock
230 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
231 * This rate is divided by a local divisor.
233 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
234 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
236 /*-----------------------------------------------------------------------
237 * Physical Memory Map
239 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
240 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
241 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
243 /*-----------------------------------------------------------------------
244 * FLASH and environment organization
247 /* **** PISMO SUPPORT *** */
248 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
250 #define CONFIG_SYS_FLASH_BASE boot_flash_base
252 /* Monitor at start of flash */
253 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
255 #define CONFIG_ENV_IS_IN_NAND
256 #define SMNAND_ENV_OFFSET 0x0E0000 /* environment starts here */
258 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
259 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
260 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
262 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
263 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
264 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
265 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
266 CONFIG_SYS_INIT_RAM_SIZE - \
267 GENERATED_GBL_DATA_SIZE)
269 #endif /* __CONFIG_H */