include/configs/ea20.h

   1 /*
   2  * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
   3  *
   4  * Based on davinci_dvevm.h. Original Copyrights follow:
   5  *
   6  * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  */
  22
  23 #ifndef __CONFIG_H
  24 #define __CONFIG_H
  25
  26 /*
  27  * Board
  28  */
  29 #define CONFIG_DRIVER_TI_EMAC
  30 #define CONFIG_USE_SPIFLASH
  31 #define CONFIG_SYS_USE_NAND
  32 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
  33
  34 /*
  35  * SoC Configuration
  36  */
  37 #define CONFIG_MACH_DAVINCI_DA850_EVM
  38 #define CONFIG_ARM926EJS                /* arm926ejs CPU core */
  39 #define CONFIG_SOC_DA8XX                /* TI DA8xx SoC */
  40 #define CONFIG_SYS_CLK_FREQ             clk_get(DAVINCI_ARM_CLKID)
  41 #define CONFIG_SYS_OSCIN_FREQ           24000000
  42 #define CONFIG_SYS_TIMERBASE            DAVINCI_TIMER0_BASE
  43 #define CONFIG_SYS_HZ_CLOCK             clk_get(DAVINCI_AUXCLK_CLKID)
  44 #define CONFIG_SYS_HZ                   1000
  45 #define CONFIG_SKIP_LOWLEVEL_INIT
  46 #define CONFIG_SYS_TEXT_BASE            0xc1080000
  47
  48 /*
  49  * Memory Info
  50  */
  51 #define CONFIG_SYS_MALLOC_LEN   (0x10000 + 1*1024*1024) /* malloc() len */
  52 #define PHYS_SDRAM_1            DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */
  53 #define PHYS_SDRAM_1_SIZE       (64 << 20) /* SDRAM size 64MB */
  54 #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/
  55
  56 /* memtest start addr */
  57 #define CONFIG_SYS_MEMTEST_START        (PHYS_SDRAM_1 + 0x2000000)
  58
  59 /* memtest will be run on 16MB */
  60 #define CONFIG_SYS_MEMTEST_END  (PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024)
  61
  62 #define CONFIG_NR_DRAM_BANKS    1 /* we have 1 bank of DRAM */
  63 #define CONFIG_STACKSIZE        (256*1024) /* regular stack */
  64
  65 /*
  66  * Serial Driver info
  67  */
  68 #define CONFIG_SYS_NS16550
  69 #define CONFIG_SYS_NS16550_SERIAL
  70 #define CONFIG_SYS_NS16550_REG_SIZE     -4      /* NS16550 register size */
  71 #define CONFIG_SYS_NS16550_COM1 DAVINCI_UART0_BASE /* Base address of UART0 */
  72 #define CONFIG_SYS_NS16550_CLK  clk_get(DAVINCI_UART2_CLKID)
  73 #define CONFIG_CONS_INDEX       1               /* use UART0 for console */
  74 #define CONFIG_BAUDRATE         115200          /* Default baud rate */
  75 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
  76
  77 #define CONFIG_SPI
  78 #define CONFIG_SPI_FLASH
  79 #define CONFIG_SPI_FLASH_STMICRO
  80 #define CONFIG_DAVINCI_SPI
  81 #define CONFIG_SYS_SPI_BASE             DAVINCI_SPI1_BASE
  82 #define CONFIG_SYS_SPI_CLK              clk_get(DAVINCI_SPI1_CLKID)
  83 #define CONFIG_SF_DEFAULT_SPEED         30000000
  84 #define CONFIG_ENV_SPI_MAX_HZ   CONFIG_SF_DEFAULT_SPEED
  85
  86 /*
  87  * Network & Ethernet Configuration
  88  */
  89 #ifdef CONFIG_DRIVER_TI_EMAC
  90 #define CONFIG_MII
  91 #define CONFIG_BOOTP_DEFAULT
  92 #define CONFIG_BOOTP_DNS
  93 #define CONFIG_BOOTP_DNS2
  94 #define CONFIG_BOOTP_SEND_HOSTNAME
  95 #define CONFIG_NET_RETRY_COUNT  10
  96 #endif
  97
  98 #ifdef CONFIG_USE_SPIFLASH
  99 #undef CONFIG_ENV_IS_IN_FLASH
 100 #undef CONFIG_ENV_IS_IN_NAND
 101 #define CONFIG_ENV_IS_IN_SPI_FLASH
 102 #define CONFIG_ENV_SIZE                 (8 << 10)
 103 #define CONFIG_ENV_OFFSET               0x80000
 104 #define CONFIG_ENV_SECT_SIZE            (64 << 10)
 105 #define CONFIG_SYS_NO_FLASH
 106 #endif
 107
 108 /*
 109  * U-Boot general configuration
 110  */
 111 #define CONFIG_BOOTFILE         "uImage" /* Boot file name */
 112 #define CONFIG_SYS_PROMPT       "ea20 > " /* Command Prompt */
 113 #define CONFIG_SYS_CBSIZE       1024 /* Console I/O Buffer Size */
 114 #define CONFIG_SYS_PBSIZE       (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
 115 #define CONFIG_SYS_MAXARGS      16 /* max number of command args */
 116 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
 117 #define CONFIG_SYS_LOAD_ADDR    (PHYS_SDRAM_1 + 0x700000)
 118 #define CONFIG_VERSION_VARIABLE
 119 #define CONFIG_AUTO_COMPLETE
 120 #define CONFIG_SYS_HUSH_PARSER
 121 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 122 #define CONFIG_CMDLINE_EDITING
 123 #define CONFIG_SYS_LONGHELP
 124 #define CONFIG_CRC32_VERIFY
 125 #define CONFIG_MX_CYCLIC
 126
 127 /*
 128  * Linux Information
 129  */
 130 #define LINUX_BOOT_PARAM_ADDR   (PHYS_SDRAM_1 + 0x100)
 131 #define CONFIG_CMDLINE_TAG
 132 #define CONFIG_SETUP_MEMORY_TAGS
 133 #define CONFIG_BOOTDELAY        3
 134
 135 /*
 136  * U-Boot commands
 137  */
 138 #include <config_cmd_default.h>
 139 #define CONFIG_CMD_ENV
 140 #define CONFIG_CMD_ASKENV
 141 #define CONFIG_CMD_DHCP
 142 #define CONFIG_CMD_DIAG
 143 #define CONFIG_CMD_MII
 144 #define CONFIG_CMD_PING
 145 #define CONFIG_CMD_SAVES
 146 #define CONFIG_CMD_MEMORY
 147
 148 #ifndef CONFIG_DRIVER_TI_EMAC
 149 #undef CONFIG_CMD_NET
 150 #undef CONFIG_CMD_DHCP
 151 #undef CONFIG_CMD_MII
 152 #undef CONFIG_CMD_PING
 153 #endif
 154
 155 /* NAND Setup */
 156 #ifdef CONFIG_SYS_USE_NAND
 157 #undef CONFIG_CMD_FLASH
 158 #undef CONFIG_CMD_IMLS
 159 #define CONFIG_CMD_NAND
 160
 161 #define CONFIG_CMD_MTDPARTS
 162 #define CONFIG_MTD_DEVICE
 163 #define CONFIG_MTD_PARTITIONS
 164 #define CONFIG_LZO
 165 #define CONFIG_RBTREE
 166 #define CONFIG_CMD_UBI
 167 #define CONFIG_CMD_UBIFS
 168
 169 #define CONFIG_NAND_DAVINCI
 170 #define CONFIG_SYS_NAND_PAGE_2K
 171 #define CONFIG_SYS_NAND_CS              2
 172 #define CONFIG_SYS_NAND_BASE            DAVINCI_ASYNC_EMIF_DATA_CE2_BASE
 173 #undef CONFIG_SYS_NAND_HW_ECC
 174 #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
 175 #define CONFIG_SYS_NAND_USE_FLASH_BBT
 176 #define CONFIG_SYS_MAX_NAND_DEVICE      1 /* Max number of NAND devices */
 177 #define NAND_MAX_CHIPS                  1
 178 #define CONFIG_SYS_64BIT_VSPRINTF       /* needed for nand_util.c */
 179 #endif
 180
 181 /* SPI Flash */
 182 #ifdef CONFIG_USE_SPIFLASH
 183 #undef CONFIG_CMD_IMLS
 184 #undef CONFIG_CMD_FLASH
 185 #define CONFIG_CMD_SPI
 186 #define CONFIG_CMD_SF
 187 #define CONFIG_CMD_SAVEENV
 188 #endif
 189
 190 #if !defined(CONFIG_SYS_USE_NAND) && \
 191         !defined(CONFIG_USE_NOR) && \
 192         !defined(CONFIG_USE_SPIFLASH)
 193 #define CONFIG_ENV_IS_NOWHERE
 194 #define CONFIG_SYS_NO_FLASH
 195 #define CONFIG_ENV_SIZE         (16 << 10)
 196 #undef CONFIG_CMD_IMLS
 197 #undef CONFIG_CMD_ENV
 198 #endif
 199
 200 /* additions for new relocation code, must added to all boards */
 201 #define CONFIG_SYS_SDRAM_BASE           0xc0000000
 202 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
 203                                         GENERATED_GBL_DATA_SIZE)
 204 #endif /* __CONFIG_H */