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stm32f7: use stm32f7 gpio driver supporting driver model
[people/ms/u-boot.git] / include / configs / ecovec.h
1 /*
2 * Configuation settings for the Renesas Solutions ECOVEC board
3 *
4 * Copyright (C) 2009 - 2011 Renesas Solutions Corp.
5 * Copyright (C) 2009 Kuninori Morimoto <morimoto.kuninori@renesas.com>
6 * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
7 *
8 * SPDX-License-Identifier: GPL-2.0+
9 */
10
11 #ifndef __ECOVEC_H
12 #define __ECOVEC_H
13
14 /*
15 * Address Interface BusWidth
16 *-----------------------------------------
17 * 0x0000_0000 U-Boot 16bit
18 * 0x0004_0000 Linux romImage 16bit
19 * 0x0014_0000 MTD for Linux 16bit
20 * 0x0400_0000 Internal I/O 16/32bit
21 * 0x0800_0000 DRAM 32bit
22 * 0x1800_0000 MFI 16bit
23 */
24
25 #define CONFIG_CPU_SH7724 1
26 #define CONFIG_ECOVEC 1
27
28 #define CONFIG_ECOVEC_ROMIMAGE_ADDR 0xA0040000
29 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000
30
31 #define CONFIG_CMD_SDRAM
32 #define CONFIG_CMD_ENV
33
34 #define CONFIG_BOOTARGS "console=ttySC0,115200"
35
36 #define CONFIG_DISPLAY_BOARDINFO
37 #undef CONFIG_SHOW_BOOT_PROGRESS
38
39 /* I2C */
40 #define CONFIG_SYS_I2C
41 #define CONFIG_SYS_I2C_SH
42 #define CONFIG_SYS_I2C_SLAVE 0x7F
43 #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 2
44 #define CONFIG_SYS_I2C_SH_BASE0 0xA4470000
45 #define CONFIG_SYS_I2C_SH_SPEED0 100000
46 #define CONFIG_SYS_I2C_SH_BASE1 0xA4750000
47 #define CONFIG_SYS_I2C_SH_SPEED1 100000
48 #define CONFIG_SH_I2C_DATA_HIGH 4
49 #define CONFIG_SH_I2C_DATA_LOW 5
50 #define CONFIG_SH_I2C_CLOCK 41666666
51
52 /* Ether */
53 #define CONFIG_SH_ETHER 1
54 #define CONFIG_SH_ETHER_USE_PORT (0)
55 #define CONFIG_SH_ETHER_PHY_ADDR (0x1f)
56 #define CONFIG_PHY_SMSC 1
57 #define CONFIG_PHYLIB
58 #define CONFIG_BITBANGMII
59 #define CONFIG_BITBANGMII_MULTI
60 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
61
62 /* USB / R8A66597 */
63 #define CONFIG_USB_R8A66597_HCD
64 #define CONFIG_R8A66597_BASE_ADDR 0xA4D80000
65 #define CONFIG_R8A66597_XTAL 0x0000 /* 12MHz */
66 #define CONFIG_R8A66597_LDRV 0x8000 /* 3.3V */
67 #define CONFIG_R8A66597_ENDIAN 0x0000 /* little */
68 #define CONFIG_SUPERH_ON_CHIP_R8A66597
69
70 /* undef to save memory */
71 #define CONFIG_SYS_LONGHELP
72 /* Monitor Command Prompt */
73 /* Buffer size for input from the Console */
74 #define CONFIG_SYS_CBSIZE 256
75 /* Buffer size for Console output */
76 #define CONFIG_SYS_PBSIZE 256
77 /* max args accepted for monitor commands */
78 #define CONFIG_SYS_MAXARGS 16
79 /* Buffer size for Boot Arguments passed to kernel */
80 #define CONFIG_SYS_BARGSIZE 512
81 /* List of legal baudrate settings for this board */
82 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
83
84 /* SCIF */
85 #define CONFIG_SCIF_CONSOLE 1
86 #define CONFIG_SCIF 1
87 #define CONFIG_CONS_SCIF0 1
88
89 /* Suppress display of console information at boot */
90
91 /* SDRAM */
92 #define CONFIG_SYS_SDRAM_BASE (0x88000000)
93 #define CONFIG_SYS_SDRAM_SIZE (256 * 1024 * 1024)
94 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
95
96 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
97 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 200 * 1024 * 1024)
98 /* Enable alternate, more extensive, memory test */
99 #undef CONFIG_SYS_ALT_MEMTEST
100 /* Scratch address used by the alternate memory test */
101 #undef CONFIG_SYS_MEMTEST_SCRATCH
102
103 /* Enable temporary baudrate change while serial download */
104 #undef CONFIG_SYS_LOADS_BAUD_CHANGE
105
106 /* FLASH */
107 #define CONFIG_FLASH_CFI_DRIVER 1
108 #define CONFIG_SYS_FLASH_CFI
109 #undef CONFIG_SYS_FLASH_QUIET_TEST
110 #define CONFIG_SYS_FLASH_EMPTY_INFO
111 #define CONFIG_SYS_FLASH_BASE (0xA0000000)
112 #define CONFIG_SYS_MAX_FLASH_SECT 512
113
114 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */
115 #define CONFIG_SYS_MAX_FLASH_BANKS 1
116 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
117
118 /* Timeout for Flash erase operations (in ms) */
119 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
120 /* Timeout for Flash write operations (in ms) */
121 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
122 /* Timeout for Flash set sector lock bit operations (in ms) */
123 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
124 /* Timeout for Flash clear lock bit operations (in ms) */
125 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
126
127 /*
128 * Use hardware flash sectors protection instead
129 * of U-Boot software protection
130 */
131 #undef CONFIG_SYS_FLASH_PROTECTION
132 #undef CONFIG_SYS_DIRECT_FLASH_TFTP
133
134 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
135 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
136 /* Monitor size */
137 #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
138 /* Size of DRAM reserved for malloc() use */
139 #define CONFIG_SYS_MALLOC_LEN (256 * 1024)
140 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
141
142 /* ENV setting */
143 #define CONFIG_ENV_IS_IN_FLASH
144 #define CONFIG_ENV_OVERWRITE 1
145 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
146 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
147 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
148 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
149 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
150 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
151
152 /* Board Clock */
153 #define CONFIG_SYS_CLK_FREQ 41666666
154 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
155 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
156 #define CONFIG_SYS_TMU_CLK_DIV 4
157
158 #endif /* __ECOVEC_H */