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git.ipfire.org Git - people/ms/u-boot.git/blob - include/configs/ge_bx50v3.h
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2 * Copyright (C) 2015 Timesys Corporation
3 * Copyright (C) 2015 General Electric Company
4 * Copyright (C) 2014 Advantech
5 * Copyright (C) 2012 Freescale Semiconductor, Inc.
7 * Configuration settings for the GE MX6Q Bx50v3 boards.
9 * SPDX-License-Identifier: GPL-2.0+
12 #ifndef __GE_BX50V3_CONFIG_H
13 #define __GE_BX50V3_CONFIG_H
15 #include <asm/arch/imx-regs.h>
16 #include <asm/mach-imx/gpio.h>
18 #define BX50V3_BOOTARGS_EXTRA
19 #if defined(CONFIG_TARGET_GE_B450V3)
20 #define CONFIG_BOARD_NAME "General Electric B450v3"
21 #elif defined(CONFIG_TARGET_GE_B650V3)
22 #define CONFIG_BOARD_NAME "General Electric B650v3"
23 #elif defined(CONFIG_TARGET_GE_B850V3)
24 #define CONFIG_BOARD_NAME "General Electric B850v3"
25 #undef BX50V3_BOOTARGS_EXTRA
26 #define BX50V3_BOOTARGS_EXTRA "video=DP-1:1024x768@60 " \
27 "video=HDMI-A-1:1024x768@60 "
29 #define CONFIG_BOARD_NAME "General Electric BA16 Generic"
32 #define CONFIG_MXC_UART_BASE UART3_BASE
33 #define CONSOLE_DEV "ttymxc2"
35 #define CONFIG_SUPPORT_EMMC_BOOT
38 #include "mx6_common.h"
39 #include <linux/sizes.h>
41 #define CONFIG_CMDLINE_TAG
42 #define CONFIG_SETUP_MEMORY_TAGS
43 #define CONFIG_INITRD_TAG
44 #define CONFIG_REVISION_TAG
45 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
47 #define CONFIG_HW_WATCHDOG
48 #define CONFIG_IMX_WATCHDOG
49 #define CONFIG_WATCHDOG_TIMEOUT_MSECS 6000
51 #define CONFIG_LAST_STAGE_INIT
53 #define CONFIG_MXC_GPIO
54 #define CONFIG_MXC_UART
56 #define CONFIG_MXC_OCOTP
59 #ifdef CONFIG_CMD_SATA
60 #define CONFIG_SYS_SATA_MAX_DEVICE 1
61 #define CONFIG_DWC_AHSATA_PORT_ID 0
62 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
67 #define CONFIG_FSL_ESDHC
68 #define CONFIG_FSL_USDHC
69 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
70 #define CONFIG_BOUNCE_BUFFER
74 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
75 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
76 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
77 #define CONFIG_MXC_USB_FLAGS 0
79 #define CONFIG_USBD_HS
80 #define CONFIG_USB_GADGET_MASS_STORAGE
83 /* Networking Configs */
85 #define CONFIG_FEC_MXC
87 #define IMX_FEC_BASE ENET_BASE_ADDR
88 #define CONFIG_FEC_XCV_TYPE RGMII
89 #define CONFIG_ETHPRIME "FEC"
90 #define CONFIG_FEC_MXC_PHYADDR 4
91 #define CONFIG_PHY_ATHEROS
96 #define CONFIG_MXC_SPI
97 #define CONFIG_SF_DEFAULT_BUS 0
98 #define CONFIG_SF_DEFAULT_CS 0
99 #define CONFIG_SF_DEFAULT_SPEED 20000000
100 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
103 /* allow to overwrite serial and ethaddr */
104 #define CONFIG_ENV_OVERWRITE
105 #define CONFIG_CONS_INDEX 1
107 #define CONFIG_LOADADDR 0x12000000
108 #define CONFIG_SYS_TEXT_BASE 0x17800000
110 #define CONFIG_EXTRA_ENV_SETTINGS \
111 "script=boot.scr\0" \
112 "image=/boot/uImage\0" \
113 "uboot=u-boot.imx\0" \
114 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
115 "fdt_addr=0x18000000\0" \
118 "console=" CONSOLE_DEV "\0" \
119 "fdt_high=0xffffffff\0" \
120 "initrd_high=0xffffffff\0" \
124 "update_sd_firmware=" \
125 "if test ${ip_dyn} = yes; then " \
126 "setenv get_cmd dhcp; " \
128 "setenv get_cmd tftp; " \
130 "if mmc dev ${mmcdev}; then " \
131 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
132 "setexpr fw_sz ${filesize} / 0x200; " \
133 "setexpr fw_sz ${fw_sz} + 1; " \
134 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
138 "if tftp $loadaddr $uboot; then " \
140 "sf erase 0 0xC0000; " \
141 "sf write $loadaddr 0x400 $filesize; " \
142 "echo 'U-Boot upgraded. Please reset'; " \
144 "setargs=setenv bootargs console=${console},${baudrate} " \
145 "root=/dev/${rootdev} rw rootwait cma=128M " \
146 BX50V3_BOOTARGS_EXTRA "\0" \
148 "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${script};\0" \
149 "bootscript=echo Running bootscript from ${dev}:${devnum}:${partnum};" \
152 "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
153 "loadfdt=ext2load ${dev} ${devnum}:${partnum} ${fdt_addr} ${fdt_file}\0" \
155 "if run loadbootscript; then " \
158 "if run loadimage; then " \
162 "doboot=echo Booting from ${dev}:${devnum}:${partnum} ...; " \
164 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
165 "if run loadfdt; then " \
166 "bootm ${loadaddr} - ${fdt_addr}; " \
168 "if test ${boot_fdt} = try; then " \
171 "echo WARN: Cannot load the DT; " \
177 "netargs=setenv bootargs console=${console},${baudrate} " \
179 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
180 "netboot=echo Booting from net ...; " \
182 "if test ${ip_dyn} = yes; then " \
183 "setenv get_cmd dhcp; " \
185 "setenv get_cmd tftp; " \
187 "${get_cmd} ${image}; " \
188 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
189 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
190 "bootm ${loadaddr} - ${fdt_addr}; " \
192 "if test ${boot_fdt} = try; then " \
195 "echo WARN: Cannot load the DT; " \
202 #define CONFIG_MMCBOOTCOMMAND \
204 "setenv rootdev mmcblk0p${partnum}; " \
206 "setenv devnum ${sddev}; " \
207 "if mmc dev ${devnum}; then " \
209 "setenv rootdev mmcblk1p${partnum}; " \
212 "setenv devnum ${emmcdev}; " \
213 "if mmc dev ${devnum}; then " \
217 #define CONFIG_USBBOOTCOMMAND \
220 "setenv devnum 0; " \
221 "setenv rootdev sda${partnum}; " \
224 CONFIG_MMCBOOTCOMMAND \
227 #ifdef CONFIG_CMD_USB
228 #define CONFIG_BOOTCOMMAND CONFIG_USBBOOTCOMMAND
230 #define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND
233 #define CONFIG_ARP_TIMEOUT 200UL
235 /* Miscellaneous configurable options */
236 #define CONFIG_SYS_LONGHELP
237 #define CONFIG_AUTO_COMPLETE
239 #define CONFIG_SYS_MEMTEST_START 0x10000000
240 #define CONFIG_SYS_MEMTEST_END 0x10010000
241 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
243 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
245 #define CONFIG_CMDLINE_EDITING
247 /* Physical Memory Map */
248 #define CONFIG_NR_DRAM_BANKS 1
249 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
251 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
252 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
253 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
255 #define CONFIG_SYS_INIT_SP_OFFSET \
256 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
257 #define CONFIG_SYS_INIT_SP_ADDR \
258 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
260 /* environment organization */
261 #define CONFIG_ENV_SIZE (8 * 1024)
262 #define CONFIG_ENV_OFFSET (768 * 1024)
263 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
264 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
265 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
266 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
267 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
269 #ifndef CONFIG_SYS_DCACHE_OFF
272 #define CONFIG_SYS_FSL_USDHC_NUM 3
276 #define CONFIG_VIDEO_IPUV3
277 #define CONFIG_VIDEO_BMP_RLE8
278 #define CONFIG_SPLASH_SCREEN
279 #define CONFIG_SPLASH_SCREEN_ALIGN
280 #define CONFIG_BMP_16BPP
281 #define CONFIG_VIDEO_LOGO
282 #define CONFIG_VIDEO_BMP_LOGO
283 #define CONFIG_IMX_HDMI
284 #define CONFIG_IMX_VIDEO_SKIP
287 #define CONFIG_PWM_IMX
288 #define CONFIG_IMX6_PWM_PER_CLK 66000000
291 #define CONFIG_PCI_PNP
292 #define CONFIG_PCI_SCAN_SHOW
293 #define CONFIG_PCIE_IMX
294 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
295 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(1, 5)
298 #define CONFIG_SYS_I2C
299 #define CONFIG_SYS_I2C_MXC
300 #define CONFIG_SYS_I2C_SPEED 100000
301 #define CONFIG_SYS_I2C_MXC_I2C1
302 #define CONFIG_SYS_I2C_MXC_I2C2
303 #define CONFIG_SYS_I2C_MXC_I2C3
305 #define CONFIG_SYS_NUM_I2C_BUSES 11
306 #define CONFIG_SYS_I2C_MAX_HOPS 1
307 #define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \
308 {1, {I2C_NULL_HOP} }, \
309 {2, {I2C_NULL_HOP} }, \
310 {0, {{I2C_MUX_PCA9547, 0x70, 0} } }, \
311 {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
312 {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
313 {0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \
314 {0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \
315 {0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \
316 {0, {{I2C_MUX_PCA9547, 0x70, 6} } }, \
317 {0, {{I2C_MUX_PCA9547, 0x70, 7} } }, \
322 #endif /* __GE_BX50V3_CONFIG_H */