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1 /*
2 * Copyright (C) 2015 Timesys Corporation
3 * Copyright (C) 2015 General Electric Company
4 * Copyright (C) 2014 Advantech
5 * Copyright (C) 2012 Freescale Semiconductor, Inc.
6 *
7 * Configuration settings for the GE MX6Q Bx50v3 boards.
8 *
9 * SPDX-License-Identifier: GPL-2.0+
10 */
11
12 #ifndef __GE_BX50V3_CONFIG_H
13 #define __GE_BX50V3_CONFIG_H
14
15 #include <asm/arch/imx-regs.h>
16 #include <asm/imx-common/gpio.h>
17
18 #define BX50V3_BOOTARGS_EXTRA
19 #if defined(CONFIG_TARGET_GE_B450V3)
20 #define CONFIG_BOARD_NAME "General Electric B450v3"
21 #define CONFIG_DEFAULT_FDT_FILE "/boot/imx6q-b450v3.dtb"
22 #elif defined(CONFIG_TARGET_GE_B650V3)
23 #define CONFIG_BOARD_NAME "General Electric B650v3"
24 #define CONFIG_DEFAULT_FDT_FILE "/boot/imx6q-b650v3.dtb"
25 #elif defined(CONFIG_TARGET_GE_B850V3)
26 #define CONFIG_BOARD_NAME "General Electric B850v3"
27 #define CONFIG_DEFAULT_FDT_FILE "/boot/imx6q-b850v3.dtb"
28 #undef BX50V3_BOOTARGS_EXTRA
29 #define BX50V3_BOOTARGS_EXTRA "video=DP-1:1024x768@60 " \
30 "video=HDMI-A-1:1024x768@60 "
31 #else
32 #define CONFIG_BOARD_NAME "General Electric BA16 Generic"
33 #define CONFIG_DEFAULT_FDT_FILE "/boot/imx6q-ba16.dtb"
34 #endif
35
36 #define CONFIG_MXC_UART_BASE UART3_BASE
37 #define CONFIG_CONSOLE_DEV "ttymxc2"
38
39 #define CONFIG_SUPPORT_EMMC_BOOT
40
41
42 #include "mx6_common.h"
43 #include <linux/sizes.h>
44
45 #define CONFIG_CMDLINE_TAG
46 #define CONFIG_SETUP_MEMORY_TAGS
47 #define CONFIG_INITRD_TAG
48 #define CONFIG_REVISION_TAG
49 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
50
51 #define CONFIG_BOARD_EARLY_INIT_F
52 #define CONFIG_BOARD_LATE_INIT
53
54 #define CONFIG_MXC_GPIO
55 #define CONFIG_MXC_UART
56
57 #define CONFIG_CMD_FUSE
58 #define CONFIG_MXC_OCOTP
59
60 /* SATA Configs */
61 #ifdef CONFIG_CMD_SATA
62 #define CONFIG_DWC_AHSATA
63 #define CONFIG_SYS_SATA_MAX_DEVICE 1
64 #define CONFIG_DWC_AHSATA_PORT_ID 0
65 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
66 #define CONFIG_LBA48
67 #define CONFIG_LIBATA
68 #endif
69
70 /* MMC Configs */
71 #define CONFIG_FSL_ESDHC
72 #define CONFIG_FSL_USDHC
73 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
74 #define CONFIG_MMC
75 #define CONFIG_GENERIC_MMC
76 #define CONFIG_BOUNCE_BUFFER
77 #define CONFIG_DOS_PARTITION
78
79 /* USB Configs */
80 #ifdef CONFIG_USB
81 #define CONFIG_USB_EHCI
82 #define CONFIG_USB_EHCI_MX6
83 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
84 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
85 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
86 #define CONFIG_MXC_USB_FLAGS 0
87 #define CONFIG_USB_KEYBOARD
88 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
89
90 #define CONFIG_CI_UDC
91 #define CONFIG_USBD_HS
92 #define CONFIG_USB_GADGET_DUALSPEED
93 #define CONFIG_USB_GADGET
94 #define CONFIG_USB_GADGET_DOWNLOAD
95 #define CONFIG_USB_GADGET_MASS_STORAGE
96 #define CONFIG_USB_FUNCTION_MASS_STORAGE
97 #define CONFIG_USB_GADGET_VBUS_DRAW 2
98 #define CONFIG_G_DNL_VENDOR_NUM 0x0525
99 #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5
100 #define CONFIG_G_DNL_MANUFACTURER "Advantech"
101 #endif
102
103 /* Networking Configs */
104 #ifdef CONFIG_NET
105 #define CONFIG_FEC_MXC
106 #define CONFIG_MII
107 #define IMX_FEC_BASE ENET_BASE_ADDR
108 #define CONFIG_FEC_XCV_TYPE RGMII
109 #define CONFIG_ETHPRIME "FEC"
110 #define CONFIG_FEC_MXC_PHYADDR 4
111 #define CONFIG_PHYLIB
112 #define CONFIG_PHY_ATHEROS
113 #endif
114
115 /* Serial Flash */
116 #ifdef CONFIG_CMD_SF
117 #define CONFIG_MXC_SPI
118 #define CONFIG_SF_DEFAULT_BUS 0
119 #define CONFIG_SF_DEFAULT_CS 0
120 #define CONFIG_SF_DEFAULT_SPEED 20000000
121 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
122 #endif
123
124 /* allow to overwrite serial and ethaddr */
125 #define CONFIG_ENV_OVERWRITE
126 #define CONFIG_CONS_INDEX 1
127 #define CONFIG_BAUDRATE 115200
128
129 /* Command definition */
130 #define CONFIG_CMD_BMODE
131
132 #define CONFIG_LOADADDR 0x12000000
133 #define CONFIG_SYS_TEXT_BASE 0x17800000
134
135 #define CONFIG_EXTRA_ENV_SETTINGS \
136 "script=boot.scr\0" \
137 "image=/boot/uImage\0" \
138 "uboot=u-boot.imx\0" \
139 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
140 "fdt_addr=0x18000000\0" \
141 "boot_fdt=yes\0" \
142 "ip_dyn=yes\0" \
143 "console=" CONFIG_CONSOLE_DEV "\0" \
144 "fdt_high=0xffffffff\0" \
145 "initrd_high=0xffffffff\0" \
146 "sddev=0\0" \
147 "emmcdev=1\0" \
148 "partnum=1\0" \
149 "update_sd_firmware=" \
150 "if test ${ip_dyn} = yes; then " \
151 "setenv get_cmd dhcp; " \
152 "else " \
153 "setenv get_cmd tftp; " \
154 "fi; " \
155 "if mmc dev ${mmcdev}; then " \
156 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
157 "setexpr fw_sz ${filesize} / 0x200; " \
158 "setexpr fw_sz ${fw_sz} + 1; " \
159 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
160 "fi; " \
161 "fi\0" \
162 "update_sf_uboot=" \
163 "if tftp $loadaddr $uboot; then " \
164 "sf probe; " \
165 "sf erase 0 0xC0000; " \
166 "sf write $loadaddr 0x400 $filesize; " \
167 "echo 'U-Boot upgraded. Please reset'; " \
168 "fi\0" \
169 "setargs=setenv bootargs console=${console},${baudrate} " \
170 "root=/dev/${rootdev} rw rootwait cma=128M " \
171 BX50V3_BOOTARGS_EXTRA "\0" \
172 "loadbootscript=" \
173 "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${script};\0" \
174 "bootscript=echo Running bootscript from ${dev}:${devnum}:${partnum};" \
175 " source\0" \
176 "loadimage=" \
177 "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
178 "loadfdt=ext2load ${dev} ${devnum}:${partnum} ${fdt_addr} ${fdt_file}\0" \
179 "tryboot=" \
180 "if run loadbootscript; then " \
181 "run bootscript; " \
182 "else " \
183 "if run loadimage; then " \
184 "run doboot; " \
185 "fi; " \
186 "fi;\0" \
187 "doboot=echo Booting from ${dev}:${devnum}:${partnum} ...; " \
188 "run setargs; " \
189 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
190 "if run loadfdt; then " \
191 "bootm ${loadaddr} - ${fdt_addr}; " \
192 "else " \
193 "if test ${boot_fdt} = try; then " \
194 "bootm; " \
195 "else " \
196 "echo WARN: Cannot load the DT; " \
197 "fi; " \
198 "fi; " \
199 "else " \
200 "bootm; " \
201 "fi;\0" \
202 "netargs=setenv bootargs console=${console},${baudrate} " \
203 "root=/dev/nfs " \
204 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
205 "netboot=echo Booting from net ...; " \
206 "run netargs; " \
207 "if test ${ip_dyn} = yes; then " \
208 "setenv get_cmd dhcp; " \
209 "else " \
210 "setenv get_cmd tftp; " \
211 "fi; " \
212 "${get_cmd} ${image}; " \
213 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
214 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
215 "bootm ${loadaddr} - ${fdt_addr}; " \
216 "else " \
217 "if test ${boot_fdt} = try; then " \
218 "bootm; " \
219 "else " \
220 "echo WARN: Cannot load the DT; " \
221 "fi; " \
222 "fi; " \
223 "else " \
224 "bootm; " \
225 "fi;\0" \
226
227 #define CONFIG_MMCBOOTCOMMAND \
228 "setenv dev mmc; " \
229 "setenv rootdev mmcblk0p${partnum}; " \
230 \
231 "setenv devnum ${sddev}; " \
232 "if mmc dev ${devnum}; then " \
233 "run tryboot; " \
234 "setenv rootdev mmcblk1p${partnum}; " \
235 "fi; " \
236 \
237 "setenv devnum ${emmcdev}; " \
238 "if mmc dev ${devnum}; then " \
239 "run tryboot; " \
240 "fi; " \
241
242 #define CONFIG_USBBOOTCOMMAND \
243 "usb start; " \
244 "setenv dev usb; " \
245 "setenv devnum 0; " \
246 "setenv rootdev sda${partnum}; " \
247 "run tryboot; " \
248 \
249 CONFIG_MMCBOOTCOMMAND \
250 "bmode usb; " \
251
252 #ifdef CONFIG_CMD_USB
253 #define CONFIG_BOOTCOMMAND CONFIG_USBBOOTCOMMAND
254 #else
255 #define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND
256 #endif
257
258 #define CONFIG_ARP_TIMEOUT 200UL
259
260 /* Miscellaneous configurable options */
261 #define CONFIG_SYS_LONGHELP
262 #define CONFIG_AUTO_COMPLETE
263
264 /* Print Buffer Size */
265 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
266 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
267
268 #define CONFIG_SYS_MEMTEST_START 0x10000000
269 #define CONFIG_SYS_MEMTEST_END 0x10010000
270 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
271
272 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
273
274 #define CONFIG_CMDLINE_EDITING
275 #define CONFIG_STACKSIZE (128 * 1024)
276
277 /* Physical Memory Map */
278 #define CONFIG_NR_DRAM_BANKS 1
279 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
280
281 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
282 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
283 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
284
285 #define CONFIG_SYS_INIT_SP_OFFSET \
286 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
287 #define CONFIG_SYS_INIT_SP_ADDR \
288 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
289
290 /* FLASH and environment organization */
291 #define CONFIG_SYS_NO_FLASH
292
293 #define CONFIG_ENV_IS_IN_SPI_FLASH
294 #define CONFIG_ENV_SIZE (8 * 1024)
295 #define CONFIG_ENV_OFFSET (768 * 1024)
296 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
297 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
298 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
299 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
300 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
301
302 #ifndef CONFIG_SYS_DCACHE_OFF
303 #endif
304
305 #define CONFIG_SYS_FSL_USDHC_NUM 3
306
307 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
308 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
309
310 /* Framebuffer */
311 #ifdef CONFIG_VIDEO
312 #define CONFIG_VIDEO_IPUV3
313 #define CONFIG_CFB_CONSOLE
314 #define CONFIG_VGA_AS_SINGLE_DEVICE
315 #define CONFIG_VIDEO_BMP_RLE8
316 #define CONFIG_SPLASH_SCREEN
317 #define CONFIG_SPLASH_SCREEN_ALIGN
318 #define CONFIG_BMP_16BPP
319 #define CONFIG_VIDEO_LOGO
320 #define CONFIG_VIDEO_BMP_LOGO
321 #define CONFIG_IPUV3_CLK 260000000
322 #define CONFIG_IMX_HDMI
323 #define CONFIG_IMX_VIDEO_SKIP
324 #endif
325
326 #define CONFIG_PWM_IMX
327 #define CONFIG_IMX6_PWM_PER_CLK 66000000
328
329 #undef CONFIG_CMD_PCI
330 #ifdef CONFIG_CMD_PCI
331 #define CONFIG_PCI
332 #define CONFIG_PCI_PNP
333 #define CONFIG_PCI_SCAN_SHOW
334 #define CONFIG_PCIE_IMX
335 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
336 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(1, 5)
337 #endif
338
339 /* I2C Configs */
340 #define CONFIG_SYS_I2C
341 #define CONFIG_SYS_I2C_MXC
342 #define CONFIG_SYS_I2C_SPEED 100000
343 #define CONFIG_SYS_I2C_MXC_I2C1
344 #define CONFIG_SYS_I2C_MXC_I2C2
345 #define CONFIG_SYS_I2C_MXC_I2C3
346
347 #endif /* __GE_BX50V3_CONFIG_H */