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1 /* Configuration header file for Gaisler GR-XC3S-1500
2 * spartan board.
3 *
4 * (C) Copyright 2003-2005
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * (C) Copyright 2007
8 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13 #ifndef __CONFIG_H__
14 #define __CONFIG_H__
15
16 /*
17 * High Level Configuration Options
18 * (easy to change)
19 */
20
21 #define CONFIG_GRXC3S1500 1 /* ... on GR-XC3S-1500 board */
22
23 /* CPU / AMBA BUS configuration */
24 #define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */
25
26 /*
27 * Serial console configuration
28 */
29 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
30
31 /* Partitions */
32
33 /*
34 * Supported commands
35 */
36 #define CONFIG_CMD_REGINFO
37 #define CONFIG_CMD_DIAG
38 #define CONFIG_CMD_IRQ
39
40 /*
41 * Autobooting
42 */
43
44 #define CONFIG_PREBOOT "echo;" \
45 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
46 "echo"
47
48 #undef CONFIG_BOOTARGS
49
50 #define CONFIG_EXTRA_ENV_SETTINGS \
51 "netdev=eth0\0" \
52 "nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw " \
53 "nfsroot=${serverip}:${rootpath}\0" \
54 "ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0" \
55 "addip=setenv bootargs ${bootargs} " \
56 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
57 ":${hostname}:${netdev}:off panic=1\0" \
58 "flash_nfs=run nfsargs addip;" \
59 "bootm ${kernel_addr}\0" \
60 "flash_self=run ramargs addip;" \
61 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
62 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
63 "scratch=40200000\0" \
64 "getkernel=tftpboot $(scratch) $(bootfile)\0" \
65 "bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.206:192.168.0.20:192.168.0.1:255.255.255.0:grxc3s1500_daniel:eth0\0" \
66 ""
67
68 #define CONFIG_NETMASK 255.255.255.0
69 #define CONFIG_GATEWAYIP 192.168.0.1
70 #define CONFIG_SERVERIP 192.168.0.20
71 #define CONFIG_IPADDR 192.168.0.206
72 #define CONFIG_ROOTPATH "/export/rootfs"
73 #define CONFIG_HOSTNAME grxc3s1500
74 #define CONFIG_BOOTFILE "/uImage"
75
76 #define CONFIG_BOOTCOMMAND "run flash_self"
77
78 /* Memory MAP
79 *
80 * Flash:
81 * |--------------------------------|
82 * | 0x00000000 Text & Data & BSS | *
83 * | for Monitor | *
84 * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
85 * | UNUSED / Growth | * 256kb
86 * |--------------------------------|
87 * | 0x00050000 Base custom area | *
88 * | kernel / FS | *
89 * | | * Rest of Flash
90 * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
91 * | END-0x00008000 Environment | * 32kb
92 * |--------------------------------|
93 *
94 *
95 *
96 * Main Memory:
97 * |--------------------------------|
98 * | UNUSED / scratch area |
99 * | |
100 * | |
101 * | |
102 * | |
103 * |--------------------------------|
104 * | Monitor .Text / .DATA / .BSS | * 256kb
105 * | Relocated! | *
106 * |--------------------------------|
107 * | Monitor Malloc | * 128kb (contains relocated environment)
108 * |--------------------------------|
109 * | Monitor/kernel STACK | * 64kb
110 * |--------------------------------|
111 * | Page Table for MMU systems | * 2k
112 * |--------------------------------|
113 * | PROM Code accessed from Linux | * 6kb-128b
114 * |--------------------------------|
115 * | Global data (avail from kernel)| * 128b
116 * |--------------------------------|
117 *
118 */
119
120 /*
121 * Flash configuration (8,16 or 32 MB)
122 * TEXT base always at 0xFFF00000
123 * ENV_ADDR always at 0xFFF40000
124 * FLASH_BASE at 0xFC000000 for 64 MB
125 * 0xFE000000 for 32 MB
126 * 0xFF000000 for 16 MB
127 * 0xFF800000 for 8 MB
128 */
129 #define CONFIG_SYS_FLASH_BASE 0x00000000
130 #define CONFIG_SYS_FLASH_SIZE 0x00800000
131
132 #define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */
133 #define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */
134 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
135
136 #define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
137 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
138 #define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
139 #define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
140 #define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
141
142 /*** CFI CONFIG ***/
143 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
144 #define CONFIG_FLASH_CFI_DRIVER
145 #define CONFIG_SYS_FLASH_CFI
146 /* Bypass cache when reading regs from flash memory */
147 #define CONFIG_SYS_FLASH_CFI_BYPASS_READ
148 /* Buffered writes (32byte/go) instead of single accesses */
149 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
150
151 /*
152 * Environment settings
153 */
154 /*#define CONFIG_ENV_IS_NOWHERE 1*/
155 #define CONFIG_ENV_IS_IN_FLASH 1
156 /* CONFIG_ENV_ADDR need to be at sector boundary */
157 #define CONFIG_ENV_SIZE 0x8000
158 #define CONFIG_ENV_SECT_SIZE 0x20000
159 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SECT_SIZE)
160 #define CONFIG_ENV_OVERWRITE 1
161
162 /*
163 * Memory map
164 */
165 #define CONFIG_SYS_SDRAM_BASE 0x40000000
166 #define CONFIG_SYS_SDRAM_SIZE 0x4000000
167 #define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
168
169 /* no SRAM available */
170 #undef CONFIG_SYS_SRAM_BASE
171 #undef CONFIG_SYS_SRAM_SIZE
172
173 /* Always Run U-Boot from SDRAM */
174 #define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
175 #define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
176 #define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
177
178 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)
179
180 #define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
181 #define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
182
183 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
184 #define CONFIG_SYS_STACK_SIZE (0x10000-32)
185
186 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
187 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
188 # define CONFIG_SYS_RAMBOOT 1
189 #endif
190
191 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
192 #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
193 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
194
195 #define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
196 #define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
197
198 /* relocated monitor area */
199 #define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
200 #define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
201
202 /* make un relocated address from relocated address */
203 #define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
204
205 /*
206 * Ethernet configuration
207 */
208 #define CONFIG_GRETH 1
209
210 #define CONFIG_PHY_ADDR 0x00
211
212 /*
213 * Miscellaneous configurable options
214 */
215 #define CONFIG_SYS_LONGHELP /* undef to save memory */
216 #if defined(CONFIG_CMD_KGDB)
217 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
218 #else
219 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
220 #endif
221 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
222 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
223 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
224
225 #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
226 #define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
227
228 #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
229
230 /*
231 * Various low-level settings
232 */
233
234 /*-----------------------------------------------------------------------
235 * USB stuff
236 *-----------------------------------------------------------------------
237 */
238 #define CONFIG_USB_CLOCK 0x0001BBBB
239 #define CONFIG_USB_CONFIG 0x00005000
240
241 /***** Gaisler GRLIB IP-Cores Config ********/
242
243 #define CONFIG_SYS_GRLIB_SDRAM 0
244
245 /* No SDRAM Configuration */
246 #undef CONFIG_SYS_GRLIB_GAISLER_SDCTRL1
247
248 /* See, GRLIB Docs (grip.pdf) on how to set up
249 * These the memory controller registers.
250 */
251 #define CONFIG_SYS_GRLIB_ESA_MCTRL1
252 #define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1 (0x000000ff | (1<<11))
253 #define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x82206000
254 #define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3 0x00136000
255
256 /* GRLIB FT-MCTRL configuration */
257 #define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1
258 #define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1 (0x000000ff | (1<<11))
259 #define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 0x82206000
260 #define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3 0x00136000
261
262 /* no DDR controller */
263 #undef CONFIG_SYS_GRLIB_GAISLER_DDRSPA1
264
265 /* no DDR2 Controller */
266 #undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1
267
268 /* default kernel command line */
269 #define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
270
271 #endif /* __CONFIG_H */