include/configs/hammerhead.h

   1 /*
   2  * Copyright (C) 2008 Miromico AG
   3  *
   4  * Configuration settings for the Miromico Hammerhead AVR32 board
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8 #ifndef __CONFIG_H
   9 #define __CONFIG_H
  10
  11 #define CONFIG_AT32AP
  12 #define CONFIG_AT32AP7000
  13 #define CONFIG_HAMMERHEAD
  14
  15 /*
  16  * Set up the PLL to run at 125 MHz, the CPU to run at the PLL
  17  * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency
  18  * and the PBA bus to run at 1/4 the PLL frequency.
  19  */
  20 #define CONFIG_PLL
  21 #define CONFIG_SYS_POWER_MANAGER
  22 #define CONFIG_SYS_OSC0_HZ                      25000000
  23 #define CONFIG_SYS_PLL0_DIV                     1
  24 #define CONFIG_SYS_PLL0_MUL                     5
  25 #define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16
  26 #define CONFIG_SYS_CLKDIV_CPU                   0
  27 #define CONFIG_SYS_CLKDIV_HSB                   1
  28 #define CONFIG_SYS_CLKDIV_PBA                   2
  29 #define CONFIG_SYS_CLKDIV_PBB                   1
  30
  31 /* Reserve VM regions for SDRAM and NOR flash */
  32 #define CONFIG_SYS_NR_VM_REGIONS                2
  33
  34 /*
  35  * The PLLOPT register controls the PLL like this:
  36  *   icp = PLLOPT<2>
  37  *   ivco = PLLOPT<1:0>
  38  *
  39  * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz).
  40  */
  41 #define CONFIG_SYS_PLL0_OPT                     0x04
  42
  43 #define CONFIG_USART_BASE                       ATMEL_BASE_USART1
  44 #define CONFIG_USART_ID                         1
  45
  46 #define CONFIG_HOSTNAME                 hammerhead
  47
  48 /* User serviceable stuff */
  49 #define CONFIG_DOS_PARTITION
  50
  51 #define CONFIG_CMDLINE_TAG
  52 #define CONFIG_SETUP_MEMORY_TAGS
  53 #define CONFIG_INITRD_TAG
  54
  55 #define CONFIG_STACKSIZE                (2048)
  56
  57 #define CONFIG_BAUDRATE                 115200
  58 #define CONFIG_BOOTARGS                                                 \
  59         "console=ttyS0 root=mtd1 rootfstype=jffs2"
  60 #define CONFIG_BOOTCOMMAND                                              \
  61         "fsload; bootm"
  62
  63 /*
  64  * Only interrupt autoboot if <space> is pressed. Otherwise, garbage
  65  * data on the serial line may interrupt the boot sequence.
  66  */
  67 #define CONFIG_BOOTDELAY                1
  68 #define CONFIG_AUTOBOOT
  69 #define CONFIG_AUTOBOOT_KEYED
  70 #define CONFIG_AUTOBOOT_PROMPT                          \
  71         "Press SPACE to abort autoboot in %d seconds\n", bootdelay
  72 #define CONFIG_AUTOBOOT_DELAY_STR       "d"
  73 #define CONFIG_AUTOBOOT_STOP_STR        " "
  74
  75 /*
  76  * After booting the board for the first time, new ethernet address
  77  * should be generated and assigned to the environment variables
  78  * "ethaddr". This is normally done during production.
  79  */
  80 #define CONFIG_OVERWRITE_ETHADDR_ONCE
  81
  82 /*
  83  * BOOTP/DHCP options
  84  */
  85 #define CONFIG_BOOTP_SUBNETMASK
  86 #define CONFIG_BOOTP_GATEWAY
  87
  88 /*
  89  * Command line configuration.
  90  */
  91 #include <config_cmd_default.h>
  92
  93 #define CONFIG_CMD_ASKENV
  94 #define CONFIG_CMD_DHCP
  95 #define CONFIG_CMD_EXT2
  96 #define CONFIG_CMD_FAT
  97 #define CONFIG_CMD_JFFS2
  98 #define CONFIG_CMD_MMC
  99 #undef CONFIG_CMD_FPGA
 100 #undef CONFIG_CMD_SETGETDCR
 101
 102 #define CONFIG_ATMEL_USART
 103 #define CONFIG_MACB
 104 #define CONFIG_PORTMUX_PIO
 105 #define CONFIG_SYS_NR_PIOS                      5
 106 #define CONFIG_SYS_HSDRAMC
 107 #define CONFIG_MMC
 108 #define CONFIG_GENERIC_ATMEL_MCI
 109 #define CONFIG_GENERIC_MMC
 110
 111 #define CONFIG_SYS_DCACHE_LINESZ                32
 112 #define CONFIG_SYS_ICACHE_LINESZ                32
 113
 114 #define CONFIG_NR_DRAM_BANKS            1
 115
 116 #define CONFIG_SYS_FLASH_CFI
 117 #define CONFIG_FLASH_CFI_DRIVER
 118
 119 #define CONFIG_SYS_FLASH_BASE                   0x00000000
 120 #define CONFIG_SYS_FLASH_SIZE                   0x800000
 121 #define CONFIG_SYS_MAX_FLASH_BANKS              1
 122 #define CONFIG_SYS_MAX_FLASH_SECT               135
 123
 124 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 125 #define CONFIG_SYS_TEXT_BASE            0x00000000
 126
 127 #define CONFIG_SYS_INTRAM_BASE                  0x24000000
 128 #define CONFIG_SYS_INTRAM_SIZE                  0x8000
 129
 130 #define CONFIG_SYS_SDRAM_BASE                   0x10000000
 131
 132 #define CONFIG_ENV_IS_IN_FLASH
 133 #define CONFIG_ENV_SIZE                 65536
 134 #define CONFIG_ENV_ADDR                 (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
 135
 136 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE)
 137
 138 #define CONFIG_SYS_MALLOC_LEN                   (256*1024)
 139
 140 #define CONFIG_SYS_DMA_ALLOC_LEN                (16384)
 141
 142 /* Allow 4MB for the kernel run-time image */
 143 #define CONFIG_SYS_LOAD_ADDR                    (CONFIG_SYS_SDRAM_BASE + 0x00400000)
 144 #define CONFIG_SYS_BOOTPARAMS_LEN               (16 * 1024)
 145
 146 /* Other configuration settings that shouldn't have to change all that often */
 147 #define CONFIG_SYS_PROMPT                       "Hammerhead> "
 148 #define CONFIG_SYS_CBSIZE                       256
 149 #define CONFIG_SYS_MAXARGS                      16
 150 #define CONFIG_SYS_PBSIZE                       (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 151 #define CONFIG_SYS_LONGHELP
 152
 153 #define CONFIG_SYS_MEMTEST_START                CONFIG_SYS_SDRAM_BASE
 154 #define CONFIG_SYS_MEMTEST_END                  (CONFIG_SYS_MEMTEST_START + 0x1f00000)
 155
 156 #define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
 157
 158 #endif /* __CONFIG_H */