include/configs/hcu4.h

   1 /*
   2  *(C) Copyright 2005-2008 Netstal Maschinen AG
   3  *    Niklaus Giger (Niklaus.Giger@netstal.com)
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 /************************************************************************
  25  * hcu4.h - configuration for HCU4 board (similar to hcu5.h)
  26  ***********************************************************************/
  27
  28 #ifndef __CONFIG_H
  29 #define __CONFIG_H
  30
  31 /*-----------------------------------------------------------------------
  32  * High Level Configuration Options
  33  *----------------------------------------------------------------------*/
  34 #define CONFIG_HCU4             1               /* Board is HCU4        */
  35 #define CONFIG_4xx              1               /* ... PPC4xx family    */
  36 #define CONFIG_405GP 1
  37 #define CONFIG_4xx   1
  38
  39 #define CONFIG_SYS_CLK_FREQ     33333333        /* external freq to pll */
  40
  41 #define CONFIG_BOARD_EARLY_INIT_F 1             /* Call board_early_init_f */
  42 #define CONFIG_MISC_INIT_R      1               /* Call misc_init_r     */
  43
  44 /*-----------------------------------------------------------------------
  45  * Base addresses -- Note these are effective addresses where the
  46  * actual resources get mapped (not physical addresses)
  47 *----------------------------------------------------------------------*/
  48 #define CONFIG_SYS_MONITOR_LEN  (320 * 1024)    /* Reserve 320 kB for Monitor   */
  49 #define CONFIG_SYS_MALLOC_LEN           (256 * 1024) /* Reserve 256 kB for malloc() */
  50
  51
  52 #define CONFIG_SYS_SDRAM_BASE           0x00000000      /* _must_ be 0          */
  53 #define CONFIG_SYS_FLASH_BASE           0xfff80000      /* start of FLASH       */
  54 #define CONFIG_SYS_MONITOR_BASE TEXT_BASE
  55
  56 /* ... with on-chip memory here (4KBytes) */
  57 #define CONFIG_SYS_OCM_DATA_ADDR 0xF4000000
  58 #define CONFIG_SYS_OCM_DATA_SIZE 0x00001000
  59 /* Do not set up locked dcache as init ram. */
  60 #undef CONFIG_SYS_INIT_DCACHE_CS
  61
  62 /* Use the On-Chip-Memory (OCM) as a temporary stack for the startup code. */
  63 #define CONFIG_SYS_TEMP_STACK_OCM 1
  64
  65 #define CONFIG_SYS_INIT_RAM_ADDR        CONFIG_SYS_OCM_DATA_ADDR        /* OCM          */
  66 #define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_OCM_DATA_SIZE
  67 #define CONFIG_SYS_GBL_DATA_SIZE        256             /* num bytes initial data */
  68 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
  69 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_POST_WORD_ADDR
  70
  71 /*-----------------------------------------------------------------------
  72  * Serial Port
  73  *----------------------------------------------------------------------*/
  74 /*
  75  * If CONFIG_SYS_EXT_SERIAL_CLOCK, then the UART divisor is 1.
  76  * If CONFIG_SYS_405_UART_ERRATA_59, then UART divisor is 31.
  77  * Otherwise, UART divisor is determined by CPU Clock and CONFIG_SYS_BASE_BAUD value.
  78  * The Linux BASE_BAUD define should match this configuration.
  79  *    baseBaud = cpuClock/(uartDivisor*16)
  80  * If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock,
  81  * set Linux BASE_BAUD to 403200.
  82  */
  83 #undef CONFIG_SYS_EXT_SERIAL_CLOCK             /* external serial clock */
  84 #define CONFIG_SERIAL_MULTI  1
  85 /* needed to be able to define CONFIG_SERIAL_SOFTWARE_FIFO */
  86 #undef  CONFIG_SYS_405_UART_ERRATA_59          /* 405GP/CR Rev. D silicon */
  87 #define CONFIG_SYS_BASE_BAUD        691200
  88
  89 /* Size (bytes) of interrupt driven serial port buffer.
  90  * Set to 0 to use polling instead of interrupts.
  91  * Setting to 0 will also disable RTS/CTS handshaking.
  92  */
  93 #undef CONFIG_SERIAL_SOFTWARE_FIFO
  94
  95 /* Set console baudrate to 9600 */
  96 #define CONFIG_BAUDRATE         9600
  97
  98
  99 #define CONFIG_SYS_BAUDRATE_TABLE                                               \
 100         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
 101
 102 /*-----------------------------------------------------------------------
 103  * Flash
 104  *----------------------------------------------------------------------*/
 105
 106 /* Use common CFI driver */
 107 #define CONFIG_SYS_FLASH_CFI
 108 #define CONFIG_FLASH_CFI_DRIVER
 109 /* board provides its own flash_init code */
 110 #define CONFIG_FLASH_CFI_LEGACY         1
 111 #define CONFIG_SYS_FLASH_CFI_WIDTH              FLASH_CFI_8BIT
 112 #define CONFIG_SYS_FLASH_LEGACY_512Kx8 1
 113
 114 /* print 'E' for empty sector on flinfo */
 115 #define CONFIG_SYS_FLASH_EMPTY_INFO
 116
 117 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max number of memory banks */
 118 #define CONFIG_SYS_MAX_FLASH_SECT       8       /* max number of sectors on one chip */
 119
 120 /*-----------------------------------------------------------------------
 121  * Environment
 122  *----------------------------------------------------------------------*/
 123
 124 #undef  CONFIG_ENV_IS_IN_NVRAM
 125 #define CONFIG_ENV_IS_IN_FLASH
 126 #undef  CONFIG_ENV_IS_NOWHERE
 127
 128 #ifdef  CONFIG_ENV_IS_IN_EEPROM
 129 /* Put the environment after the SDRAM configuration */
 130 #define PROM_SIZE       2048
 131 #define CONFIG_ENV_OFFSET        512
 132 #define CONFIG_ENV_SIZE (PROM_SIZE-CONFIG_ENV_OFFSET)
 133 #endif
 134
 135 #ifdef CONFIG_ENV_IS_IN_FLASH
 136 /* Put the environment in Flash */
 137 #define CONFIG_ENV_SECT_SIZE    0x10000 /* size of one complete sector  */
 138 #define CONFIG_ENV_ADDR         ((-CONFIG_SYS_MONITOR_LEN)-CONFIG_ENV_SECT_SIZE)
 139 #define CONFIG_ENV_SIZE         8*1024  /* 8 KB Environment Sector      */
 140
 141 /* Address and size of Redundant Environment Sector     */
 142 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
 143 #define CONFIG_ENV_SIZE_REDUND  (CONFIG_ENV_SIZE)
 144 #endif
 145
 146 /*-----------------------------------------------------------------------
 147  * I2C stuff for a ATMEL AT24C16 (2kB holding ENV, we are using the
 148  * the first internal I2C controller of the PPC440EPx
 149  *----------------------------------------------------------------------*/
 150 #define CONFIG_SYS_SPD_BUS_NUM          0
 151
 152 #define CONFIG_HARD_I2C         1       /* I2C with hardware support    */
 153 #undef  CONFIG_SOFT_I2C                 /* I2C bit-banged               */
 154 #define CONFIG_SYS_I2C_SPEED            400000  /* I2C speed and slave address  */
 155 #define CONFIG_SYS_I2C_SLAVE            0x7F
 156
 157 /* This is the 7bit address of the device, not including P. */
 158 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
 159 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 160
 161 /* The EEPROM can do 16byte ( 1 << 4 ) page writes. */
 162 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW     0x07
 163 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
 164 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
 165 #undef CONFIG_SYS_I2C_MULTI_EEPROMS
 166
 167
 168 #define CONFIG_PREBOOT  "echo;"                                         \
 169         "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
 170         "echo"
 171
 172 #undef  CONFIG_BOOTARGS
 173
 174 /* Setup some board specific values for the default environment variables */
 175 #define CONFIG_HOSTNAME         hcu4
 176 #define CONFIG_IPADDR           172.25.1.99
 177 #define CONFIG_ETHADDR      00:60:13:00:00:00   /* Netstal Machines AG MAC */
 178 #define CONFIG_OVERWRITE_ETHADDR_ONCE
 179 #define CONFIG_SERVERIP         172.25.1.3
 180
 181 #define CONFIG_SYS_TFTP_LOADADDR 0x01000000 /* @16 MB */
 182
 183 #define CONFIG_EXTRA_ENV_SETTINGS                               \
 184         "netdev=eth0\0"                                                 \
 185         "loadaddr=0x01000000\0"                                         \
 186         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 187                 "nfsroot=${serverip}:${rootpath}\0"                     \
 188         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
 189         "addip=setenv bootargs ${bootargs} "                            \
 190                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
 191                 ":${hostname}:${netdev}:off panic=1\0"                  \
 192         "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\
 193         "nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;"         \
 194                 "bootm\0"                                               \
 195         "rootpath=/home/diagnose/eldk/ppc_4xx\0"                        \
 196         "bootfile=/tftpboot/hcu4/uImage\0"                              \
 197         "load=tftp 100000 hcu4/u-boot.bin\0"                            \
 198         "update=protect off FFFB0000 FFFFFFFF;era FFFB0000 FFFFFFFF;"   \
 199                 "cp.b 100000 FFFB0000 50000\0"                          \
 200         "upd=run load update\0"                                         \
 201         "vx_rom=hcu4/hcu4_vx_rom\0"                                     \
 202         "vx=tftp ${loadaddr} ${vx_rom};run vxargs; bootvx\0"            \
 203         "vxargs=setenv bootargs emac(0,0)c:${vx_rom} e=${ipaddr}"       \
 204         " h=${serverip} u=dpu pw=netstal8752 tn=hcu5 f=0x3008\0"        \
 205         ""
 206 #define CONFIG_BOOTCOMMAND      "run vx"
 207
 208 #define CONFIG_BOOTDELAY        5       /* autoboot after 5 seconds     */
 209
 210 #define CONFIG_LOADS_ECHO       1       /* echo on for serial download  */
 211 #define CONFIG_SYS_LOADS_BAUD_CHANGE    1       /* allow baudrate change        */
 212
 213 #define CONFIG_MII              1       /* MII PHY management           */
 214 #define CONFIG_PHY_ADDR 1       /* PHY address                  */
 215
 216 #define CONFIG_PHY_RESET        1       /* reset phy upon startup */
 217
 218 #define CONFIG_HAS_ETH0
 219 #define CONFIG_SYS_RX_ETH_BUFFER        16 /* Number of ethernet rx buffers & desC */
 220
 221 /*
 222  * BOOTP options
 223  */
 224 #define CONFIG_BOOTP_BOOTFILESIZE
 225 #define CONFIG_BOOTP_BOOTPATH
 226 #define CONFIG_BOOTP_GATEWAY
 227 #define CONFIG_BOOTP_HOSTNAME
 228
 229 /*
 230  * Command line configuration.
 231  */
 232 #include <config_cmd_default.h>
 233
 234 #define CONFIG_CMD_ASKENV
 235 #define CONFIG_CMD_CACHE
 236 #define CONFIG_CMD_DHCP
 237 #define CONFIG_CMD_DIAG
 238 #define CONFIG_CMD_EEPROM
 239 #define CONFIG_CMD_ELF
 240 #define CONFIG_CMD_FLASH
 241 #define CONFIG_CMD_I2C
 242 #define CONFIG_CMD_IMMAP
 243 #define CONFIG_CMD_IRQ
 244 #define CONFIG_CMD_MII
 245 #define CONFIG_CMD_NET
 246 #define CONFIG_CMD_PING
 247 #define CONFIG_CMD_REGINFO
 248 #define CONFIG_CMD_SDRAM
 249
 250 /* SPD EEPROM (sdram speed config) disabled */
 251 #define CONFIG_SPD_EEPROM          1
 252 #define SPD_EEPROM_ADDRESS      0x50
 253
 254 /* POST support */
 255 #define CONFIG_POST             (CONFIG_SYS_POST_MEMORY   | \
 256                                  CONFIG_SYS_POST_CPU       | \
 257                                  CONFIG_SYS_POST_UART      | \
 258                                  CONFIG_SYS_POST_I2C       | \
 259                                  CONFIG_SYS_POST_CACHE     | \
 260                                  CONFIG_SYS_POST_ETHER     | \
 261                                  CONFIG_SYS_POST_SPR)
 262
 263 #define CONFIG_SYS_POST_UART_TABLE      {UART0_BASE}
 264 #define CONFIG_SYS_POST_WORD_ADDR       (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
 265 #undef  CONFIG_LOGBUFFER
 266 #define CONFIG_SYS_POST_CACHE_ADDR      0x00800000 /* free virtual address      */
 267 #define CONFIG_SYS_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */
 268
 269 /*-----------------------------------------------------------------------
 270  * Miscellaneous configurable options
 271  *----------------------------------------------------------------------*/
 272 #define CONFIG_SYS_LONGHELP                     /* undef to save memory         */
 273 #define CONFIG_SYS_PROMPT       "=> "           /* Monitor Command Prompt       */
 274 #if defined(CONFIG_CMD_KGDB)
 275         #define CONFIG_SYS_CBSIZE       1024            /* Console I/O Buffer Size */
 276 #else
 277         #define CONFIG_SYS_CBSIZE       256             /* Console I/O Buffer Size */
 278 #endif
 279 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
 280 #define CONFIG_SYS_MAXARGS      16              /* max number of command args   */
 281 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size    */
 282
 283 #define CONFIG_SYS_MEMTEST_START        0x0400000       /* memtest works on     */
 284 #define CONFIG_SYS_MEMTEST_END          0x0C00000       /* 4 ... 12 MB in DRAM  */
 285
 286
 287 #define CONFIG_SYS_LOAD_ADDR            0x100000        /* default load address */
 288 #define CONFIG_SYS_EXTBDINFO            1       /* To use extended board_into (bd_t) */
 289
 290 #define CONFIG_SYS_HZ           1000            /* decrementer freq: 1 ms ticks */
 291
 292 #define CONFIG_CMDLINE_EDITING  1       /* add command line history     */
 293 #define CONFIG_LOOPW            1       /* enable loopw command         */
 294 #define CONFIG_VERSION_VARIABLE 1       /* include version env variable */
 295
 296 /*-----------------------------------------------------------------------
 297  * External Bus Controller (EBC) Setup
 298  */
 299
 300 #define CONFIG_SYS_EBC_CFG      0x98400000
 301
 302 /* Memory Bank 0 (Flash Bank 0) initialization  */
 303 #define CONFIG_SYS_EBC_PB0AP    0x02005400
 304 #define CONFIG_SYS_EBC_PB0CR    0xFFF18000  /* BAS=0xFFF,BS=1MB,BU=R/W,BW=8bit */
 305
 306 #define CONFIG_SYS_EBC_PB1AP    0x03041200
 307 #define CONFIG_SYS_EBC_PB1CR    0x7009A000  /* BAS=,BS=MB,BU=R/W,BW=bit */
 308
 309 #define CONFIG_SYS_EBC_PB2AP    0x02054500
 310 #define CONFIG_SYS_EBC_PB2CR    0x78018000  /* BAS=,BS=MB,BU=R/W,BW=bit */
 311
 312 #define CONFIG_SYS_EBC_PB3AP    0x01840300
 313 #define CONFIG_SYS_EBC_PB3CR    0x7c0ba000  /* BAS=,BS=MB,BU=R/W,BW=bit */
 314
 315 #define CONFIG_SYS_EBC_PB4AP    0x01800300
 316 #define CONFIG_SYS_EBC_PB4CR    0x7e0ba000  /* BAS=,BS=MB,BU=R/W,BW=bit */
 317
 318 #define CONFIG_SYS_GPIO0_OR     0xF27FFFFF  /* GPIO value */
 319 #define CONFIG_SYS_GPIO0_TCR    0x7FFE0000  /* GPIO value */
 320 #define CONFIG_SYS_GPIO0_ODR    0x00E897FC  /* GPIO value */
 321
 322 /*
 323  * For booting Linux, the board info and command line data
 324  * have to be in the first 8 MB of memory, since this is
 325  * the maximum mapped by the Linux kernel during initialization.
 326  */
 327 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)/* Initial Memory map for Linux */
 328
 329 /* Init Memory Controller:
 330  *
 331  * BR0/1 and OR0/1 (FLASH)
 332  */
 333
 334 #define FLASH_BASE0_PRELIM      CONFIG_SYS_FLASH_BASE   /* FLASH bank #0        */
 335 #define FLASH_BASE1_PRELIM      0               /* FLASH bank #1        */
 336
 337
 338 /* Configuration Port location */
 339 #define CONFIG_PORT_ADDR        0xF0000500
 340
 341 #define CONFIG_SYS_HUSH_PARSER                 /* use "hush" command parser    */
 342 #ifdef  CONFIG_SYS_HUSH_PARSER
 343 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 344 #endif
 345
 346 #if defined(CONFIG_CMD_KGDB)
 347 #define CONFIG_KGDB_BAUDRATE    230400  /* speed to run kgdb serial port */
 348 #define CONFIG_KGDB_SER_INDEX   2           /* which serial port to use */
 349 #endif
 350
 351 /* pass open firmware flat tree */
 352 #define CONFIG_OF_LIBFDT        1
 353 #define CONFIG_OF_BOARD_SETUP   1
 354
 355 #endif  /* __CONFIG_H */