include/configs/hcu5.h

   1 /*
   2  * (C) Copyright 2007-2008 Netstal Maschinen AG
   3  * Niklaus Giger (Niklaus.Giger@netstal.com)
   4  *
   5  * (C) Copyright 2006-2007
   6  * Stefan Roese, DENX Software Engineering, sr@denx.de.
   7  *
   8  * (C) Copyright 2006
   9  * Jacqueline Pira-Ferriol, AMCC/IBM, jpira-ferriol@fr.ibm.com
  10  * Alain Saurel,            AMCC/IBM, alain.saurel@fr.ibm.com
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License as
  14  * published by the Free Software Foundation; either version 2 of
  15  * the License, or (at your option) any later version.
  16  *
  17  * This program is distributed in the hope that it will be useful,
  18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20  * GNU General Public License for more details.
  21  *
  22  * You should have received a copy of the GNU General Public License
  23  * along with this program; if not, write to the Free Software
  24  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25  * MA 02111-1307 USA
  26  */
  27
  28 /************************************************************************
  29  * hcu5.h - configuration for HCU5 board (derived from sequoia.h)
  30  ***********************************************************************/
  31
  32 #ifndef __CONFIG_H
  33 #define __CONFIG_H
  34
  35 /*-----------------------------------------------------------------------
  36  * High Level Configuration Options
  37  *----------------------------------------------------------------------*/
  38 #define CONFIG_HCU5             1               /* Board is HCU5        */
  39 #define CONFIG_440EPX           1               /* Specific PPC440EPx   */
  40 #define CONFIG_440              1               /* ... PPC440 family    */
  41 #define CONFIG_4xx              1               /* ... PPC4xx family    */
  42 #define CONFIG_HOSTNAME         hcu5
  43
  44 /*
  45  * Include common defines/options for all boards produced by Netstal Maschinen
  46  */
  47 #include "netstal-common.h"
  48
  49 #define CONFIG_SYS_CLK_FREQ     33333333        /* external freq to pll */
  50 #define CONFIG_BOARD_EARLY_INIT_F 1             /* Call board_early_init_f */
  51 #define CONFIG_MISC_INIT_R      1               /* Call misc_init_r     */
  52
  53 /*-----------------------------------------------------------------------
  54  * Base addresses -- Note these are effective addresses where the
  55  * actual resources get mapped (not physical addresses)
  56  *----------------------------------------------------------------------*/
  57 #define CONFIG_SYS_MONITOR_LEN  (320 * 1024)    /* Reserve 320 kB for Monitor   */
  58 #define CONFIG_SYS_MALLOC_LEN           (256 * 1024) /* Reserve 256 kB for malloc() */
  59
  60 #define CONFIG_SYS_TLB_FOR_BOOT_FLASH  3
  61 #define CONFIG_SYS_BOOT_BASE_ADDR       0xfff00000
  62 #define CONFIG_SYS_SDRAM_BASE           0x00000000      /* _must_ be 0          */
  63 #define CONFIG_SYS_FLASH_BASE           0xfff80000      /* start of FLASH       */
  64 #define CONFIG_SYS_MONITOR_BASE TEXT_BASE
  65 #define CONFIG_SYS_OCM_BASE             0xe0010000      /* ocm                  */
  66 #define CONFIG_SYS_OCM_DATA_ADDR        CONFIG_SYS_OCM_BASE
  67 #define CONFIG_SYS_PCI_BASE             0xe0000000      /* Internal PCI regs    */
  68 #define CONFIG_SYS_PCI_MEMBASE          0x80000000      /* mapped pci memory    */
  69 #define CONFIG_SYS_PCI_MEMBASE1 CONFIG_SYS_PCI_MEMBASE  + 0x10000000
  70 #define CONFIG_SYS_PCI_MEMBASE2 CONFIG_SYS_PCI_MEMBASE1 + 0x10000000
  71 #define CONFIG_SYS_PCI_MEMBASE3 CONFIG_SYS_PCI_MEMBASE2 + 0x10000000
  72
  73 /* Don't change either of these */
  74 #define CONFIG_SYS_PERIPHERAL_BASE      0xef600000      /* internal peripherals */
  75
  76 #define CONFIG_SYS_USB2D0_BASE          0xe0000100
  77 #define CONFIG_SYS_USB_DEVICE           0xe0000000
  78 #define CONFIG_SYS_USB_HOST             0xe0000400
  79
  80 /*-----------------------------------------------------------------------
  81  * Initial RAM & stack pointer
  82  *----------------------------------------------------------------------*/
  83 /* 440EPx/440GRx have 16KB of internal SRAM, so no need for D-Cache     */
  84 #define CONFIG_SYS_INIT_RAM_ADDR        CONFIG_SYS_OCM_BASE     /* OCM                  */
  85
  86 #define CONFIG_SYS_INIT_RAM_END (4 << 10)
  87 #define CONFIG_SYS_GBL_DATA_SIZE        256             /* num bytes initial data */
  88 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
  89 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_POST_WORD_ADDR
  90
  91 /*-----------------------------------------------------------------------
  92  * Serial Port
  93  *----------------------------------------------------------------------*/
  94 #undef CONFIG_SYS_EXT_SERIAL_CLOCK             /* external serial clock */
  95 #define CONFIG_BAUDRATE         115200
  96 #undef CONFIG_SERIAL_SOFTWARE_FIFO
  97 #undef CONFIG_UART1_CONSOLE
  98
  99 /*-----------------------------------------------------------------------
 100  * Environment
 101  *----------------------------------------------------------------------*/
 102
 103 #undef  CONFIG_ENV_IS_IN_NVRAM
 104 #define  CONFIG_ENV_IS_IN_FLASH
 105 #undef  CONFIG_ENV_IS_IN_EEPROM
 106 #undef  CONFIG_ENV_IS_NOWHERE
 107
 108 #ifdef  CONFIG_ENV_IS_IN_EEPROM
 109 /* Put the environment after the SDRAM and bootstrap configuration */
 110 #define PROM_SIZE       2048
 111 #define CONFIG_SYS_BOOSTRAP_OPTION_OFFSET        512
 112 #define CONFIG_ENV_OFFSET        (CONFIG_SYS_BOOSTRAP_OPTION_OFFSET + 0x10)
 113 #define CONFIG_ENV_SIZE (PROM_SIZE-CONFIG_ENV_OFFSET)
 114 #endif
 115
 116 #ifdef CONFIG_ENV_IS_IN_FLASH
 117 /* Put the environment in Flash */
 118 #define CONFIG_ENV_SECT_SIZE    0x10000 /* size of one complete sector  */
 119 #define CONFIG_ENV_ADDR         ((-CONFIG_SYS_MONITOR_LEN)-CONFIG_ENV_SECT_SIZE)
 120 #define CONFIG_ENV_SIZE         8*1024  /* 8 KB Environment Sector      */
 121
 122 /* Address and size of Redundant Environment Sector     */
 123 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
 124 #define CONFIG_ENV_SIZE_REDUND  (CONFIG_ENV_SIZE)
 125
 126 #endif
 127
 128 /*-----------------------------------------------------------------------
 129  * DDR SDRAM
 130  *----------------------------------------------------------------------*/
 131 #define CONFIG_SYS_MBYTES_SDRAM        (128)            /* 128 MB or 256 MB     */
 132 #define CONFIG_SYS_DDR_CACHED_ADDR      0x50000000      /* setup 2nd TLB cached here */
 133 #undef  CONFIG_DDR_DATA_EYE             /* Do not use DDR2 optimization */
 134 #define CONFIG_DDR_ECC          1       /* enable ECC                   */
 135
 136 /* Following two definitions must be kept in sync with config.h of vxWorks */
 137 #define USER_RESERVED_MEM     (   0)  /* in kB */
 138 #define PM_RESERVED_MEM       (  64)  /* in kB: pmLib reserved area size */
 139 #define CONFIG_PRAM           ( USER_RESERVED_MEM + PM_RESERVED_MEM )
 140
 141 #define CONFIG_SYS_MEM_TOP_HIDE (4 << 10) /* don't use last 4kbytes     */
 142                                         /* 440EPx errata CHIP 11        */
 143
 144 /*-----------------------------------------------------------------------
 145  * I2C stuff for a ATMEL AT24C16 (2kB holding ENV, we are using the
 146  * the second internal I2C controller of the PPC440EPx
 147  *----------------------------------------------------------------------*/
 148 #define CONFIG_SYS_SPD_BUS_NUM  1
 149
 150 /* Setup some board specific values for the default environment variables */
 151 #define CONFIG_IPADDR           172.25.1.15
 152
 153 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 154         CONFIG_NETSTAL_DEF_ENV                                          \
 155         CONFIG_NETSTAL_DEF_ENV_POWERPC                                  \
 156         ""
 157
 158 #define CONFIG_M88E1111_PHY     1
 159 #define CONFIG_IBM_EMAC4_V4     1
 160
 161 #define CONFIG_HAS_ETH1 1       /* add support for "eth1addr" */
 162 #define CONFIG_PHY1_ADDR        2
 163
 164 /* USB */
 165 #define CONFIG_USB_OHCI
 166 #define CONFIG_USB_STORAGE
 167
 168 /* Comment this out to enable USB 1.1 device */
 169 #define USB_2_0_DEVICE
 170
 171 /* Partitions */
 172 #define CONFIG_MAC_PARTITION
 173 #define CONFIG_DOS_PARTITION
 174 #define CONFIG_ISO_PARTITION
 175
 176 /*
 177  * BOOTP options
 178  */
 179 #define CONFIG_BOOTP_BOOTFILESIZE
 180 #define CONFIG_BOOTP_BOOTPATH
 181 #define CONFIG_BOOTP_GATEWAY
 182 #define CONFIG_BOOTP_HOSTNAME
 183
 184 /*
 185  * Command line configuration.
 186  */
 187 #include <config_cmd_default.h>
 188
 189 #define CONFIG_CMD_ASKENV
 190 #define CONFIG_CMD_DHCP
 191 #define CONFIG_CMD_DIAG
 192 #define CONFIG_CMD_EEPROM
 193 #define CONFIG_CMD_ELF
 194 #define CONFIG_CMD_FLASH
 195 #define CONFIG_CMD_FAT
 196 #define CONFIG_CMD_I2C
 197 #define CONFIG_CMD_IMMAP
 198 #define CONFIG_CMD_IRQ
 199 #define CONFIG_CMD_MII
 200 #define CONFIG_CMD_NET
 201 #define CONFIG_CMD_NFS
 202 #define CONFIG_CMD_PING
 203 #define CONFIG_CMD_REGINFO
 204 #define CONFIG_CMD_SDRAM
 205 #define CONFIG_CMD_USB
 206
 207 /* POST support */
 208 #define CONFIG_POST             (CONFIG_SYS_POST_MEMORY   | \
 209                                  CONFIG_SYS_POST_UART      | \
 210                                  CONFIG_SYS_POST_I2C       | \
 211                                  CONFIG_SYS_POST_CACHE     | \
 212                                  CONFIG_SYS_POST_FPU       | \
 213                                  CONFIG_SYS_POST_ETHER     | \
 214                                  CONFIG_SYS_POST_SPR)
 215 #define CONFIG_SYS_POST_UART_TABLE      {UART0_BASE}
 216
 217 #define CONFIG_SYS_POST_WORD_ADDR       (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
 218 #define CONFIG_SYS_POST_CACHE_ADDR      0x7fff0000 /* free virtual address      */
 219 #define CONFIG_SYS_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */
 220
 221 #define CONFIG_SUPPORT_VFAT
 222
 223 /*-----------------------------------------------------------------------
 224  * Miscellaneous configurable options
 225  *----------------------------------------------------------------------*/
 226 #define CONFIG_SYS_LONGHELP                     /* undef to save memory         */
 227 #define CONFIG_SYS_PROMPT               "=> "   /* Monitor Command Prompt       */
 228 #if defined(CONFIG_CMD_KGDB)
 229 #define CONFIG_SYS_CBSIZE               1024    /* Console I/O Buffer Size      */
 230 #else
 231 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size      */
 232 #endif
 233 #define CONFIG_SYS_PBSIZE              (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
 234 #define CONFIG_SYS_MAXARGS              16      /* max number of command args   */
 235 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size  */
 236
 237 #define CONFIG_SYS_MEMTEST_START        0x0400000 /* memtest works on           */
 238 #define CONFIG_SYS_MEMTEST_END          0x0C00000 /* 4 ... 12 MB in DRAM        */
 239
 240 #define CONFIG_SYS_LOAD_ADDR            0x100000  /* default load address       */
 241
 242 /*-----------------------------------------------------------------------
 243  * PCI stuff
 244  *----------------------------------------------------------------------*/
 245 /* General PCI */
 246 #define CONFIG_PCI              1       /* include pci support          */
 247 #undef CONFIG_PCI_PNP                   /* do (not) pci plug-and-play   */
 248 #undef CONFIG_PCI_SCAN_SHOW             /* show pci devices on startup  */
 249 #define CONFIG_SYS_PCI_TARGBASE        0x80000000 /* PCIaddr map to CONFIG_SYS_PCI_MEMBASE*/
 250
 251 /* Board-specific PCI */
 252 #define CONFIG_SYS_PCI_TARGET_INIT
 253 #define CONFIG_SYS_PCI_MASTER_INIT
 254
 255 #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x10e8   /* AMCC                         */
 256 #define CONFIG_SYS_PCI_SUBSYS_ID       0xcafe   /* Whatever                     */
 257
 258 /*
 259  * For booting Linux, the board info and command line data
 260  * have to be in the first 8 MB of memory, since this is
 261  * the maximum mapped by the Linux kernel during initialization.
 262  */
 263 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20) /* Initial Memory map for Linux */
 264
 265 /*-----------------------------------------------------------------------
 266  * Flash
 267  *----------------------------------------------------------------------*/
 268
 269 /* Use common CFI driver */
 270 #define CONFIG_SYS_FLASH_CFI
 271 #define CONFIG_FLASH_CFI_DRIVER
 272 /* board provides its own flash_init code */
 273 #define CONFIG_FLASH_CFI_LEGACY         1
 274 #define CONFIG_SYS_FLASH_CFI_WIDTH              FLASH_CFI_8BIT
 275 #define CONFIG_SYS_FLASH_LEGACY_512Kx8 1
 276
 277 /* print 'E' for empty sector on flinfo */
 278 #define CONFIG_SYS_FLASH_EMPTY_INFO
 279
 280 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max number of memory banks */
 281 #define CONFIG_SYS_MAX_FLASH_SECT       8       /* max number of sectors on one chip */
 282
 283 /*-----------------------------------------------------------------------
 284  * External Bus Controller (EBC) Setup
 285  *----------------------------------------------------------------------*/
 286 #define CONFIG_SYS_FLASH                CONFIG_SYS_FLASH_BASE
 287 #define CONFIG_SYS_CS_1         0xC8000000 /* CAN */
 288 #define CONFIG_SYS_CS_2         0xCC000000 /* CPLD and IMC-Bus Standard */
 289 #define CONFIG_SYS_CPLD         CONFIG_SYS_CS_2
 290 #define CONFIG_SYS_CS_3         0xCE000000 /* CPLD and IMC-Bus Fast  */
 291
 292 #define CONFIG_SYS_BOOTFLASH_CS 0       /* Boot Flash chip connected to CSx */
 293 #define CONFIG_SYS_EBC_PB0AP            0x02005400
 294 #define CONFIG_SYS_EBC_PB0CR            0xFFF18000 /* (CONFIG_SYS_FLASH | 0xda000)  */
 295 #define FLASH_BASE0_PRELIM      CONFIG_SYS_FLASH_BASE   /* FLASH bank #0        */
 296
 297 /* Memory Bank 1 CAN-Chips initialization                               */
 298 #define CONFIG_SYS_EBC_PB1AP            0x02054500
 299 #define CONFIG_SYS_EBC_PB1CR            0xC8018000
 300
 301 /* Memory Bank 2 CPLD/IMC-Bus standard initialization                   */
 302 #define CONFIG_SYS_EBC_PB2AP            0x01840300
 303 #define CONFIG_SYS_EBC_PB2CR            0xCC0BA000
 304
 305 /* Memory Bank 3 IMC-Bus fast mode initialization                       */
 306 #define CONFIG_SYS_EBC_PB3AP            0x01800300
 307 #define CONFIG_SYS_EBC_PB3CR            0xCE0BA000
 308
 309 /* Memory Bank 4 (not used) initialization                              */
 310 #undef CONFIG_SYS_EBC_PB4AP
 311 #undef CONFIG_SYS_EBC_PB4CR
 312
 313 /* Memory Bank 5 (not used) initialization                              */
 314 #undef CONFIG_SYS_EBC_PB5AP
 315 #undef CONFIG_SYS_EBC_PB5CR
 316
 317 #define HCU_CPLD_VERSION_REGISTER ( CONFIG_SYS_CPLD + 0x0F00000 )
 318 #define HCU_HW_VERSION_REGISTER   ( CONFIG_SYS_CPLD + 0x1400000 )
 319
 320 #define CONFIG_SYS_HUSH_PARSER                 /* use "hush" command parser    */
 321 #ifdef  CONFIG_SYS_HUSH_PARSER
 322         #define CONFIG_SYS_PROMPT_HUSH_PS2     "> "
 323 #endif
 324
 325 #if defined(CONFIG_CMD_KGDB)
 326 #define CONFIG_KGDB_BAUDRATE    230400  /* speed to run kgdb serial port */
 327 #define CONFIG_KGDB_SER_INDEX   2           /* which serial port to use */
 328 #endif
 329
 330 #endif  /* __CONFIG_H */