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[people/ms/u-boot.git] / include / configs / ibf-dsp561.h
1 /*
2 * U-boot - Configuration file for IBF-DSP561 board
3 */
4
5 #ifndef __CONFIG_IBF_DSP561__H__
6 #define __CONFIG_IBF_DSP561__H__
7
8 #include <asm/config-pre.h>
9
10
11 /*
12 * Processor Settings
13 */
14 #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
15
16
17 /*
18 * Clock Settings
19 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
20 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
21 */
22 /* CONFIG_CLKIN_HZ is any value in Hz */
23 #define CONFIG_CLKIN_HZ 25000000
24 /* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
25 /* 1 = CLKIN / 2 */
26 #define CONFIG_CLKIN_HALF 0
27 /* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
28 /* 1 = bypass PLL */
29 #define CONFIG_PLL_BYPASS 0
30 /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
31 /* Values can range from 0-63 (where 0 means 64) */
32 #define CONFIG_VCO_MULT 24
33 /* CCLK_DIV controls the core clock divider */
34 /* Values can be 1, 2, 4, or 8 ONLY */
35 #define CONFIG_CCLK_DIV 1
36 /* SCLK_DIV controls the system clock divider */
37 /* Values can range from 1-15 */
38 #define CONFIG_SCLK_DIV 5
39
40
41 /*
42 * Memory Settings
43 */
44 #define CONFIG_MEM_ADD_WDTH 9
45 #define CONFIG_MEM_SIZE 64
46
47 #define CONFIG_EBIU_SDRRC_VAL 0x377
48 #define CONFIG_EBIU_SDGCTL_VAL 0x91998d
49 #define CONFIG_EBIU_SDBCTL_VAL 0x15
50
51 #define CONFIG_EBIU_AMGCTL_VAL 0x3F
52 #define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0
53 #define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0
54
55 #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
56 #define CONFIG_SYS_MALLOC_LEN (128 * 1024)
57
58
59 /*
60 * Network Settings
61 */
62 #define ADI_CMDS_NETWORK 1
63 #define CONFIG_NET_MULTI
64 #define CONFIG_DRIVER_AX88180 1
65 #define AX88180_BASE 0x2c000000
66 #define CONFIG_HOSTNAME ibf-dsp561
67 /* Uncomment next line to use fixed MAC address */
68 /* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */
69
70
71 /*
72 * Flash Settings
73 */
74 #define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */
75 #define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
76 #define CONFIG_SYS_FLASH_CFI_AMD_RESET
77 #define CONFIG_SYS_FLASH_BASE 0x20000000
78 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
79 #define CONFIG_SYS_MAX_FLASH_SECT 135 /* max number of sectors on one chip */
80 /* The BF561-EZKIT uses a top boot flash */
81 #define CONFIG_ENV_IS_IN_FLASH 1
82 #define CONFIG_ENV_ADDR 0x20004000
83 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
84 #define CONFIG_ENV_SIZE 0x2000
85 #define CONFIG_ENV_SECT_SIZE 0x10000 /* Total Size of Environment Sector */
86 #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS)
87 #define ENV_IS_EMBEDDED
88 #else
89 #define CONFIG_ENV_IS_EMBEDDED_IN_LDR
90 #endif
91 #ifdef ENV_IS_EMBEDDED
92 /* WARNING - the following is hand-optimized to fit within
93 * the sector before the environment sector. If it throws
94 * an error during compilation remove an object here to get
95 * it linked after the configuration sector.
96 */
97 # define LDS_BOARD_TEXT \
98 arch/blackfin/cpu/traps.o (.text .text.*); \
99 arch/blackfin/cpu/interrupt.o (.text .text.*); \
100 arch/blackfin/cpu/serial.o (.text .text.*); \
101 common/dlmalloc.o (.text .text.*); \
102 lib/crc32.o (.text .text.*); \
103 lib/zlib.o (.text .text.*); \
104 board/ibf-dsp561/ibf-dsp561.o (.text .text.*); \
105 . = DEFINED(env_offset) ? env_offset : .; \
106 common/env_embedded.o (.text .text.*);
107 #endif
108
109
110 /*
111 * I2C Settings
112 */
113 #define CONFIG_SOFT_I2C 1
114 #define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF0
115 #define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF1
116
117
118 /*
119 * Misc Settings
120 */
121 #define CONFIG_UART_CONSOLE 0
122
123
124 /*
125 * Pull in common ADI header for remaining command/environment setup
126 */
127 #include <configs/bfin_adi_common.h>
128
129 #endif