include/configs/igep0030.h

   1 /*
   2  * (C) Copyright 2010
   3  * ISEE 2007 SL, <www.iseebcn.com>
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License as
   7  * published by the Free Software Foundation; either version 2 of
   8  * the License, or (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  18  * MA 02111-1307 USA
  19  */
  20
  21 #ifndef __CONFIG_H
  22 #define __CONFIG_H
  23 #include <asm/sizes.h>
  24
  25 /*
  26  * High Level Configuration Options
  27  */
  28 #define CONFIG_ARMV7            1       /* This is an ARM V7 CPU core */
  29 #define CONFIG_OMAP             1       /* in a TI OMAP core */
  30 #define CONFIG_OMAP34XX         1       /* which is a 34XX */
  31 #define CONFIG_OMAP3430         1       /* which is in a 3430 */
  32 #define CONFIG_OMAP3_IGEP0030   1       /* working with IGEP0030 */
  33
  34 #define CONFIG_SDRC     /* The chip has SDRC controller */
  35
  36 #include <asm/arch/cpu.h>
  37 #include <asm/arch/omap3.h>
  38
  39 /*
  40  * Display CPU and Board information
  41  */
  42 #define CONFIG_DISPLAY_CPUINFO          1
  43 #define CONFIG_DISPLAY_BOARDINFO        1
  44
  45 /* Clock Defines */
  46 #define V_OSCK                  26000000        /* Clock output from T2 */
  47 #define V_SCLK                  (V_OSCK >> 1)
  48
  49 #define CONFIG_MISC_INIT_R
  50
  51 #define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs */
  52 #define CONFIG_SETUP_MEMORY_TAGS        1
  53 #define CONFIG_INITRD_TAG               1
  54 #define CONFIG_REVISION_TAG             1
  55
  56 /*
  57  * NS16550 Configuration
  58  */
  59
  60 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
  61
  62 #define CONFIG_SYS_NS16550
  63 #define CONFIG_SYS_NS16550_SERIAL
  64 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  65 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
  66
  67 /* select serial console configuration */
  68 #define CONFIG_CONS_INDEX               3
  69 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
  70 #define CONFIG_SERIAL3                  3
  71
  72 /* allow to overwrite serial and ethaddr */
  73 #define CONFIG_ENV_OVERWRITE
  74 #define CONFIG_BAUDRATE                 115200
  75 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600, 115200}
  76 #define CONFIG_GENERIC_MMC              1
  77 #define CONFIG_MMC                      1
  78 #define CONFIG_OMAP_HSMMC               1
  79 #define CONFIG_DOS_PARTITION            1
  80
  81 /* DDR  */
  82 #define CONFIG_OMAP3_NUMONYX_DDR        1
  83
  84 /* USB */
  85 #define CONFIG_MUSB_UDC                 1
  86 #define CONFIG_USB_OMAP3                1
  87 #define CONFIG_TWL4030_USB              1
  88
  89 /* USB device configuration */
  90 #define CONFIG_USB_DEVICE               1
  91 #define CONFIG_USB_TTY                  1
  92 #define CONFIG_SYS_CONSOLE_IS_IN_ENV    1
  93
  94 /* Change these to suit your needs */
  95 #define CONFIG_USBD_VENDORID            0x0451
  96 #define CONFIG_USBD_PRODUCTID           0x5678
  97 #define CONFIG_USBD_MANUFACTURER        "Texas Instruments"
  98 #define CONFIG_USBD_PRODUCT_NAME        "IGEP"
  99
 100 /* commands to include */
 101 #include <config_cmd_default.h>
 102
 103 #define CONFIG_CMD_CACHE
 104 #define CONFIG_CMD_EXT2         /* EXT2 Support                 */
 105 #define CONFIG_CMD_FAT          /* FAT support                  */
 106 #define CONFIG_CMD_I2C          /* I2C serial bus support       */
 107 #define CONFIG_CMD_MMC          /* MMC support                  */
 108 #define CONFIG_CMD_ONENAND      /* ONENAND support              */
 109 #define CONFIG_CMD_MTDPARTS     /* Enable MTD parts commands    */
 110 #define CONFIG_MTD_DEVICE
 111
 112 #undef CONFIG_CMD_NET           /* bootp, tftpboot, rarpboot    */
 113 #undef CONFIG_CMD_NFS           /* nfs                          */
 114 #undef CONFIG_CMD_FLASH         /* flinfo, erase, protect       */
 115 #undef CONFIG_CMD_IMLS          /* List all found images        */
 116
 117 #define CONFIG_SYS_NO_FLASH
 118 #define CONFIG_HARD_I2C                 1
 119 #define CONFIG_SYS_I2C_SPEED            100000
 120 #define CONFIG_SYS_I2C_SLAVE            1
 121 #define CONFIG_SYS_I2C_BUS              0
 122 #define CONFIG_SYS_I2C_BUS_SELECT       1
 123 #define CONFIG_DRIVER_OMAP34XX_I2C      1
 124
 125 /*
 126  * TWL4030
 127  */
 128 #define CONFIG_TWL4030_POWER            1
 129
 130 /* Environment information */
 131 #define CONFIG_BOOTCOMMAND \
 132         "mmc init 0 ; fatload mmc 0 0x80000000 setup.ini ; source \0"
 133
 134 #define CONFIG_BOOTDELAY                3
 135
 136 #define CONFIG_EXTRA_ENV_SETTINGS \
 137         "usbtty=cdc_acm\0"
 138
 139 #define CONFIG_AUTO_COMPLETE            1
 140
 141 /*
 142  * Miscellaneous configurable options
 143  */
 144 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 145 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
 146 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 147 #define CONFIG_SYS_PROMPT               "U-Boot # "
 148 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
 149 /* Print Buffer Size */
 150 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 151                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 152 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
 153 /* Boot Argument Buffer Size */
 154 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 155
 156 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)     /* memtest */
 157                                                                 /* works on */
 158 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
 159                                         0x01F00000) /* 31MB */
 160
 161 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)     /* default */
 162                                                         /* load address */
 163
 164 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)
 165
 166 /*
 167  * OMAP3 has 12 GP timers, they can be driven by the system clock
 168  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 169  * This rate is divided by a local divisor.
 170  */
 171 #define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
 172 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 173 #define CONFIG_SYS_HZ                   1000
 174
 175 /*
 176  * Stack sizes
 177  *
 178  * The stack sizes are set up in start.S using the settings below
 179  */
 180 #define CONFIG_STACKSIZE        (128 << 10)     /* regular stack 128 KiB */
 181
 182 /*
 183  * Physical Memory Map
 184  *
 185  */
 186 #define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
 187 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
 188 #define PHYS_SDRAM_1_SIZE       (32 << 20)      /* at least 32 meg */
 189 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
 190
 191 /* SDRAM Bank Allocation method */
 192 #define SDRC_R_B_C              1
 193
 194 /*
 195  * FLASH and environment organization
 196  */
 197
 198 #define PISMO1_ONEN_SIZE                GPMC_SIZE_128M /* Configure the PISMO */
 199
 200 #define CONFIG_SYS_ONENAND_BASE         ONENAND_MAP
 201
 202 #define ONENAND_ENV_OFFSET              0x260000 /* environment starts here */
 203
 204 #define CONFIG_ENV_IS_IN_ONENAND        1
 205 #define CONFIG_ENV_SIZE                 (512 << 10) /* Total Size Environment */
 206 #define CONFIG_ENV_ADDR                 ONENAND_ENV_OFFSET
 207
 208 /*
 209  * Size of malloc() pool
 210  */
 211 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
 212
 213 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 214 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 215 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 216 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 217                                          CONFIG_SYS_INIT_RAM_SIZE - \
 218                                          GENERATED_GBL_DATA_SIZE)
 219
 220 #endif /* __CONFIG_H */