include/configs/inka4x0.h

   1 /*
   2  * (C) Copyright 2003-2004
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #ifndef __CONFIG_H
  25 #define __CONFIG_H
  26
  27 /*
  28  * High Level Configuration Options
  29  * (easy to change)
  30  */
  31
  32 #define CONFIG_MPC5xxx          1       /* This is an MPC5xxx CPU               */
  33 #define CONFIG_MPC5200          1       /* (more precisely an MPC5200 CPU)      */
  34 #define CONFIG_INKA4X0          1       /* INKA4x0 board                        */
  35
  36 #define CFG_MPC5XXX_CLKIN       33000000 /* ... running at 33.000000MHz         */
  37
  38 #define BOOTFLAG_COLD           0x01    /* Normal Power-On: Boot from FLASH     */
  39 #define BOOTFLAG_WARM           0x02    /* Software reboot                      */
  40
  41 #define CONFIG_MISC_INIT_F      1       /* Use misc_init_f()                    */
  42
  43 #define CFG_CACHELINE_SIZE      32      /* For MPC5xxx CPUs                     */
  44 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
  45 #  define CFG_CACHELINE_SHIFT   5       /* log base 2 of the above value        */
  46 #endif
  47
  48 /*
  49  * Serial console configuration
  50  */
  51 #define CONFIG_PSC_CONSOLE      1       /* console is on PSC1   */
  52 #define CONFIG_BAUDRATE         115200  /* ... at 115200 bps    */
  53 #define CFG_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200, 230400 }
  54
  55 /*
  56  * PCI Mapping:
  57  * 0x40000000 - 0x4fffffff - PCI Memory
  58  * 0x50000000 - 0x50ffffff - PCI IO Space
  59  */
  60 #define CONFIG_PCI              1
  61 #define CONFIG_PCI_PNP          1
  62 #define CONFIG_PCI_SCAN_SHOW    1
  63
  64 #define CONFIG_PCI_MEM_BUS      0x40000000
  65 #define CONFIG_PCI_MEM_PHYS     CONFIG_PCI_MEM_BUS
  66 #define CONFIG_PCI_MEM_SIZE     0x10000000
  67
  68 #define CONFIG_PCI_IO_BUS       0x50000000
  69 #define CONFIG_PCI_IO_PHYS      CONFIG_PCI_IO_BUS
  70 #define CONFIG_PCI_IO_SIZE      0x01000000
  71
  72 #define CFG_XLB_PIPELINING      1
  73
  74 /* Partitions */
  75 #define CONFIG_MAC_PARTITION
  76 #define CONFIG_DOS_PARTITION
  77 #define CONFIG_ISO_PARTITION
  78
  79 /*
  80  * Supported commands
  81  */
  82 #define CONFIG_COMMANDS        (CONFIG_CMD_DFL  | \
  83                                 CFG_CMD_PCI     | \
  84                                 CFG_CMD_USB     )
  85
  86 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
  87 #include <cmd_confdefs.h>
  88
  89 #if (TEXT_BASE == 0xFFE00000)           /* Boot low */
  90 #   define CFG_LOWBOOT          1
  91 #endif
  92
  93 /*
  94  * Autobooting
  95  */
  96 #define CONFIG_BOOTDELAY        5       /* autoboot after 5 seconds */
  97
  98 #define CONFIG_PREBOOT  "echo;" \
  99         "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
 100         "echo"
 101
 102 #undef  CONFIG_BOOTARGS
 103
 104 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 105         "netdev=eth0\0"                                                 \
 106         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 107                 "nfsroot=$(serverip):$(rootpath)\0"                     \
 108         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
 109         "addip=setenv bootargs $(bootargs) "                            \
 110                 "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)"      \
 111                 ":$(hostname):$(netdev):off panic=1\0"                  \
 112         "flash_nfs=run nfsargs addip;"                                  \
 113                 "bootm $(kernel_addr)\0"                                \
 114         "net_nfs=tftp 200000 $(bootfile);run nfsargs addip;bootm\0"     \
 115         "rootpath=/opt/eldk/ppc_82xx\0"                                 \
 116         ""
 117
 118 #define CONFIG_BOOTCOMMAND      "run net_nfs"
 119
 120 /*
 121  * IPB Bus clocking configuration.
 122  */
 123 #define CFG_IPBSPEED_133                /* define for 133MHz speed */
 124
 125 /*
 126  * Flash configuration
 127  */
 128 #define CFG_FLASH_BASE          0xFFE00000
 129
 130 #define CFG_FLASH_SIZE          0x00200000 /* 2 MByte */
 131 #define CFG_MAX_FLASH_SECT      35      /* max num of sects on one chip */
 132
 133 #define CFG_ENV_ADDR            (CFG_FLASH_BASE + 0x4000) /* second sector */
 134 #define CFG_MAX_FLASH_BANKS     1       /* max num of flash banks
 135                                            (= chip selects) */
 136 #define CFG_FLASH_ERASE_TOUT    240000  /* Flash Erase Timeout (in ms)  */
 137 #define CFG_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (in ms)  */
 138
 139 /*
 140  * Environment settings
 141  */
 142 #define CFG_ENV_IS_IN_FLASH     1
 143 #define CFG_ENV_SIZE            0x2000
 144 #define CFG_ENV_SECT_SIZE       0x2000
 145 #define CONFIG_ENV_OVERWRITE    1
 146
 147 /*
 148  * Memory map
 149  */
 150 #define CFG_MBAR                0xF0000000
 151 #define CFG_SDRAM_BASE          0x00000000
 152 #define CFG_DEFAULT_MBAR        0x80000000
 153
 154 #define CONFIG_MPC5200_DDR
 155
 156 /* Use ON-Chip SRAM until RAM will be available */
 157 #define CFG_INIT_RAM_ADDR       MPC5XXX_SRAM
 158 #ifdef CONFIG_POST
 159 /* preserve space for the post_word at end of on-chip SRAM */
 160 #define CFG_INIT_RAM_END        MPC5XXX_SRAM_POST_SIZE
 161 #else
 162 #define CFG_INIT_RAM_END        MPC5XXX_SRAM_SIZE
 163 #endif
 164
 165
 166 #define CFG_GBL_DATA_SIZE       128     /* size in bytes reserved for initial data */
 167 #define CFG_GBL_DATA_OFFSET     (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
 168 #define CFG_INIT_SP_OFFSET      CFG_GBL_DATA_OFFSET
 169
 170 #define CFG_MONITOR_BASE    TEXT_BASE
 171 #if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
 172 #   define CFG_RAMBOOT          1
 173 #endif
 174
 175 #define CFG_MONITOR_LEN         (192 << 10)     /* Reserve 192 kB for Monitor   */
 176 #define CFG_MALLOC_LEN          (128 << 10)     /* Reserve 128 kB for malloc()  */
 177 #define CFG_BOOTMAPSZ           (8 << 20)       /* Initial Memory map for Linux */
 178
 179 /*
 180  * Ethernet configuration
 181  */
 182 #define CONFIG_MPC5xxx_FEC      1
 183 /*
 184  * Define CONFIG_FEC_10MBIT to force FEC at 10Mb
 185  */
 186 /* #define CONFIG_FEC_10MBIT 1 */
 187 #define CONFIG_PHY_ADDR         0x00
 188
 189 /*
 190  * GPIO configuration
 191  *
 192  * use pin gpio_wkup_6 as second SDRAM chip select (mem_cs1):
 193  *      Bit 0 (mask: 0x80000000): 1
 194  * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
 195  *      00 -> No Alternatives, I2C1 is used for onboard EEPROM
 196  *      01 -> CAN1 on I2C1, CAN2 on Tmr0/1 do not use on TQM5200 with onboard
 197  *            EEPROM
 198  * use PSC1 as UART: Bits 28-31 (mask: 0x00000007): 0100
 199  * use PSC6_1 and PSC6_3 as GPIO: Bits 9:11 (mask: 0x07000000):
 200  *      011 -> PSC6 could not be used as UART or CODEC. IrDA still possible.
 201  * GPIO on PSC6_3 is used in post_hotkeys_pressed() to enable extended POST
 202  * tests.
 203  */
 204 #if defined (CONFIG_MINIFAP)
 205 #define CFG_GPS_PORT_CONFIG     0x93000004
 206 #else
 207 #define CFG_GPS_PORT_CONFIG     0x81001004
 208 #endif
 209
 210 /*
 211  * RTC configuration
 212  */
 213 #define CONFIG_RTC_MPC5200      1       /* use internal MPC5200 RTC */
 214
 215 /*
 216  * Miscellaneous configurable options
 217  */
 218 #define CFG_LONGHELP                    /* undef to save memory     */
 219 #define CFG_PROMPT              "=> "   /* Monitor Command Prompt   */
 220 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
 221 #define CFG_CBSIZE              1024    /* Console I/O Buffer Size  */
 222 #else
 223 #define CFG_CBSIZE              256     /* Console I/O Buffer Size  */
 224 #endif
 225 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
 226 #define CFG_MAXARGS             16      /* max number of command args   */
 227 #define CFG_BARGSIZE            CFG_CBSIZE      /* Boot Argument Buffer Size    */
 228
 229 /* Enable an alternate, more extensive memory test */
 230 #define CFG_ALT_MEMTEST
 231
 232 #define CFG_MEMTEST_START       0x00100000      /* memtest works on */
 233 #define CFG_MEMTEST_END         0x00f00000      /* 1 ... 15 MB in DRAM  */
 234
 235 #define CFG_LOAD_ADDR           0x100000        /* default load address */
 236
 237 #define CFG_HZ                  1000    /* decrementer freq: 1 ms ticks */
 238
 239 /*
 240  * Enable loopw commando. This has only affect, if CFG_CMD_MEM is defined,
 241  * which is normally part of the default commands (CFV_CMD_DFL)
 242  */
 243 #define CONFIG_LOOPW
 244
 245 /*
 246  * Various low-level settings
 247  */
 248 #if defined(CONFIG_MPC5200)
 249 #define CFG_HID0_INIT           HID0_ICE | HID0_ICFI
 250 #define CFG_HID0_FINAL          HID0_ICE
 251 #else
 252 #define CFG_HID0_INIT           0
 253 #define CFG_HID0_FINAL          0
 254 #endif
 255
 256 #define CFG_BOOTCS_START        CFG_FLASH_BASE
 257 #define CFG_BOOTCS_SIZE         CFG_FLASH_SIZE
 258 #define CFG_BOOTCS_CFG          0x00087800 /* for pci_clk  = 66 MHz */
 259 #define CFG_CS0_START           CFG_FLASH_BASE
 260 #define CFG_CS0_SIZE            CFG_FLASH_SIZE
 261
 262 #define CFG_CS_BURST            0x00000000
 263 #define CFG_CS_DEADCYCLE        0x33333333
 264
 265 /*-----------------------------------------------------------------------
 266  * USB stuff
 267  *-----------------------------------------------------------------------
 268  */
 269 #define CONFIG_USB_OHCI
 270 #define CONFIG_USB_CLOCK        0x00015555
 271 #define CONFIG_USB_CONFIG       0x00001000
 272
 273 #endif /* __CONFIG_H */