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pl01x: Convert CONFIG_PL01X_SERIAL to Kconfig
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1 /*
2 * (C) Copyright 2012
3 * Linaro
4 * Linus Walleij <linus.walleij@linaro.org>
5 * Common ARM Integrator configuration settings
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10 #define CONFIG_SYS_TEXT_BASE 0x01000000
11 #define CONFIG_SYS_MEMTEST_START 0x100000
12 #define CONFIG_SYS_MEMTEST_END 0x10000000
13 #define CONFIG_SYS_TIMERBASE 0x13000100 /* Timer1 */
14 #define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */
15 #define CONFIG_SYS_LONGHELP
16 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) /* Size of malloc() pool */
17
18 #define CONFIG_CONS_INDEX 0
19
20 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
21 #define CONFIG_SETUP_MEMORY_TAGS
22 #define CONFIG_MISC_INIT_R /* call misc_init_r during start up */
23
24 /*
25 * There are various dependencies on the core module (CM) fitted
26 * Users should refer to their CM user guide
27 */
28 #include "armcoremodule.h"
29
30 /*
31 * Initialize and remap the core module, use SPD to detect memory size
32 * If CONFIG_SKIP_LOWLEVEL_INIT is not defined &
33 * the core module has a CM_INIT register
34 * then the U-Boot initialisation code will
35 * e.g. ARM Boot Monitor or pre-loader is repeated once
36 * (to re-initialise any existing CM_INIT settings to safe values).
37 *
38 * This is usually not the desired behaviour since the platform
39 * will either reboot into the ARM monitor (or pre-loader)
40 * or continuously cycle thru it without U-Boot running,
41 * depending upon the setting of Integrator/CP switch S2-4.
42 *
43 * However it may be needed if Integrator/CP switch S2-1
44 * is set OFF to boot direct into U-Boot.
45 * In that case comment out the line below.
46 */
47 #define CONFIG_CM_INIT
48 #define CONFIG_CM_REMAP
49 #define CONFIG_CM_SPD_DETECT
50
51 /*
52 * The ARM boot monitor initializes the board.
53 * However, the default U-Boot code also performs the initialization.
54 * If desired, this can be prevented by defining SKIP_LOWLEVEL_INIT
55 * - see documentation supplied with board for details of how to choose the
56 * image to run at reset/power up
57 * e.g. whether the ARM Boot Monitor runs before U-Boot
58 */
59 /* #define CONFIG_SKIP_LOWLEVEL_INIT */
60
61 /*
62 * The ARM boot monitor does not relocate U-Boot.
63 * However, the default U-Boot code performs the relocation check,
64 * and may relocate the code if the memory map is changed.
65 * If necessary this can be prevented by defining SKIP_RELOCATE_UBOOT
66 */
67 /* #define SKIP_CONFIG_RELOCATE_UBOOT */
68
69 /*
70 * Physical Memory Map
71 */
72 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
73 #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
74 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
75 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
76 #define CONFIG_SYS_INIT_RAM_SIZE PHYS_SDRAM_1_SIZE
77 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \
78 CONFIG_SYS_INIT_RAM_SIZE - \
79 GENERATED_GBL_DATA_SIZE)
80 #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET
81
82 /*
83 * FLASH and environment organization
84 * Top varies according to amount fitted
85 * Reserve top 4 blocks of flash
86 * - ARM Boot Monitor
87 * - Unused
88 * - SIB block
89 * - U-Boot environment
90 */
91 #define CONFIG_SYS_FLASH_CFI 1
92 #define CONFIG_FLASH_CFI_DRIVER 1
93 #define CONFIG_SYS_FLASH_BASE 0x24000000
94 #define CONFIG_SYS_MAX_FLASH_BANKS 1
95
96 /* Timeout values in ticks */
97 #define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */
98 #define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */
99 #define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */
100 #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */