include/configs/ixdp425.h

   1 /*
   2  * (C) Copyright 2003
   3  * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
   4  *
   5  * Configuation settings for the IXDP425 board.
   6  *
   7  * See file CREDITS for list of people who contributed to this
   8  * project.
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License as
  12  * published by the Free Software Foundation; either version 2 of
  13  * the License, or (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23  * MA 02111-1307 USA
  24  */
  25
  26 #ifndef __CONFIG_H
  27 #define __CONFIG_H
  28
  29 /*
  30  * High Level Configuration Options
  31  * (easy to change)
  32  */
  33 #define CONFIG_IXP425           1       /* This is an IXP425 CPU    */
  34 #define CONFIG_IXDP425          1       /* on an IXDP425 Board      */
  35
  36 #define CONFIG_DISPLAY_CPUINFO  1       /* display cpu info (and speed) */
  37 #define CONFIG_DISPLAY_BOARDINFO 1      /* display board info           */
  38
  39 /***************************************************************
  40  * U-boot generic defines start here.
  41  ***************************************************************/
  42
  43 #undef CONFIG_USE_IRQ                   /* we don't need IRQ/FIQ stuff */
  44
  45 /*
  46  * Size of malloc() pool
  47  */
  48 #define CFG_MALLOC_LEN      (CFG_ENV_SIZE + 128*1024)
  49 #define CFG_GBL_DATA_SIZE       128     /* size in bytes reserved for initial data */
  50
  51 /* allow to overwrite serial and ethaddr */
  52 #define CONFIG_ENV_OVERWRITE
  53
  54 #define CONFIG_BAUDRATE         115200
  55
  56 #define CONFIG_COMMANDS         (CONFIG_CMD_DFL | CFG_CMD_ELF | CFG_CMD_PCI)
  57
  58 #define CONFIG_PCI
  59 #define CONFIG_NET_MULTI
  60 #define CONFIG_EEPRO100
  61 /* This must be included AFTER the definition of CONFIG_COMMANDS (if any) */
  62 /* These are u-boot generic parameters */
  63 #include <cmd_confdefs.h>
  64
  65 #define CONFIG_BOOTDELAY        3
  66 /*#define CONFIG_ETHADDR          08:00:3e:26:0a:5b*/
  67 #define CONFIG_NETMASK          255.255.255.0
  68 #define CONFIG_IPADDR           192.168.0.21
  69 #define CONFIG_SERVERIP         192.168.0.148
  70 #define CONFIG_BOOTCOMMAND      "bootm 50040000"
  71 #define CONFIG_BOOTARGS         "root=/dev/mtdblock2 rootfstype=cramfs console=ttyS0,115200"
  72 #define CONFIG_CMDLINE_TAG
  73
  74 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
  75 #define CONFIG_KGDB_BAUDRATE    230400          /* speed to run kgdb serial port */
  76 #define CONFIG_KGDB_SER_INDEX   2               /* which serial port to use */
  77 #endif
  78
  79 /*
  80  * Miscellaneous configurable options
  81  */
  82 #define CFG_LONGHELP                            /* undef to save memory         */
  83 #define CFG_PROMPT              "=> "   /* Monitor Command Prompt       */
  84 #define CFG_CBSIZE              256             /* Console I/O Buffer Size      */
  85 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
  86 #define CFG_MAXARGS             16              /* max number of command args   */
  87 #define CFG_BARGSIZE            CFG_CBSIZE      /* Boot Argument Buffer Size    */
  88
  89 #define CFG_MEMTEST_START       0x00400000      /* memtest works on     */
  90 #define CFG_MEMTEST_END         0x00800000      /* 4 ... 8 MB in DRAM   */
  91
  92 #undef  CFG_CLKS_IN_HZ          /* everything, incl board info, in Hz */
  93
  94 #define CFG_LOAD_ADDR           0x00010000      /* default load address */
  95
  96 #define CFG_HZ                  3333333         /* spec says 66.666 MHz, but it appears to be 33 */
  97                                                 /* valid baudrates */
  98 #define CFG_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200 }
  99
 100 /*
 101  * Stack sizes
 102  *
 103  * The stack sizes are set up in start.S using the settings below
 104  */
 105 #define CONFIG_STACKSIZE        (128*1024)      /* regular stack */
 106 #ifdef CONFIG_USE_IRQ
 107 #define CONFIG_STACKSIZE_IRQ    (4*1024)        /* IRQ stack */
 108 #define CONFIG_STACKSIZE_FIQ    (4*1024)        /* FIQ stack */
 109 #endif
 110
 111 /***************************************************************
 112  * Platform/Board specific defines start here.
 113  ***************************************************************/
 114
 115 /*
 116  * Hardware drivers
 117  */
 118
 119
 120 /*
 121  * select serial console configuration
 122  */
 123 #define CFG_IXP425_CONSOLE      IXP425_UART1   /* we use UART1 for console */
 124
 125 /*
 126  * Physical Memory Map
 127  */
 128 #define CONFIG_NR_DRAM_BANKS    1          /* we have 2 banks of DRAM */
 129 #define PHYS_SDRAM_1            0x00000000 /* SDRAM Bank #1 */
 130 #define PHYS_SDRAM_1_SIZE       0x01000000 /* 16 MB */
 131
 132 #define PHYS_FLASH_1            0x50000000 /* Flash Bank #1 */
 133 #define PHYS_FLASH_SIZE         0x00800000 /* 8 MB */
 134 #define PHYS_FLASH_BANK_SIZE    0x00800000 /* 8 MB Banks */
 135 #define PHYS_FLASH_SECT_SIZE    0x00020000 /* 128 KB sectors (x1) */
 136
 137 #define CFG_DRAM_BASE           0x00000000
 138 #define CFG_DRAM_SIZE           0x01000000
 139
 140 #define CFG_FLASH_BASE          PHYS_FLASH_1
 141 #define CFG_MONITOR_BASE        CFG_FLASH_BASE
 142 #define CFG_MONITOR_LEN         (256 << 10)     /* Reserve 256 kB for Monitor   */
 143
 144 /*
 145  * Expansion bus settings
 146  */
 147 #define CFG_EXP_CS0                             0xbcd23c42
 148
 149 /*
 150  * SDRAM settings
 151  */
 152 #define CFG_SDR_CONFIG          0xd
 153 #define CFG_SDR_MODE_CONFIG     0x1
 154 #define CFG_SDRAM_REFRESH_CNT   0x81a
 155
 156 /*
 157  * GPIO settings
 158  */
 159
 160 /*
 161  * FLASH and environment organization
 162  */
 163 /*
 164  * FLASH and environment organization
 165  */
 166 #define CFG_MAX_FLASH_BANKS     1       /* max number of memory banks           */
 167 #define CFG_MAX_FLASH_SECT      128     /* max number of sectors on one chip    */
 168
 169 #define CFG_FLASH_CFI                           /* The flash is CFI compatible  */
 170 #define CFG_FLASH_CFI_DRIVER                    /* Use common CFI driver        */
 171 #define CFG_ENV_IS_IN_FLASH     1
 172
 173 #define CFG_FLASH_BANKS_LIST    { PHYS_FLASH_1 }
 174
 175 #define CFG_FLASH_CFI_WIDTH     FLASH_CFI_16BIT /* no byte writes on IXP4xx     */
 176
 177 #define CFG_FLASH_ERASE_TOUT    120000  /* Timeout for Flash Erase (in ms)      */
 178 #define CFG_FLASH_WRITE_TOUT    500     /* Timeout for Flash Write (in ms)      */
 179
 180 #define CFG_FLASH_EMPTY_INFO            /* print 'E' for empty sector on flinfo */
 181
 182 #define CFG_ENV_SECT_SIZE       0x20000         /* size of one complete sector  */
 183 #define CFG_ENV_ADDR            (PHYS_FLASH_1 + 0x20000)
 184 #define CFG_ENV_SIZE            0x2000  /* Total Size of Environment Sector     */
 185
 186 #endif  /* __CONFIG_H */