include/configs/km_arm.h

   1 /*
   2  * (C) Copyright 2009
   3  * Marvell Semiconductor <www.marvell.com>
   4  * Prafulla Wadaskar <prafulla@marvell.com>
   5  *
   6  * (C) Copyright 2009
   7  * Stefan Roese, DENX Software Engineering, sr@denx.de.
   8  *
   9  * (C) Copyright 2010-2011
  10  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
  11  *
  12  * See file CREDITS for list of people who contributed to this
  13  * project.
  14  *
  15  * This program is free software; you can redistribute it and/or
  16  * modify it under the terms of the GNU General Public License as
  17  * published by the Free Software Foundation; either version 2 of
  18  * the License, or (at your option) any later version.
  19  *
  20  * This program is distributed in the hope that it will be useful,
  21  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  * GNU General Public License for more details.
  24  *
  25  * You should have received a copy of the GNU General Public License
  26  * along with this program; if not, write to the Free Software
  27  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  28  * MA 02110-1301 USA
  29  */
  30
  31 /*
  32  * for linking errors see
  33  * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
  34  */
  35
  36 #ifndef _CONFIG_KM_ARM_H
  37 #define _CONFIG_KM_ARM_H
  38
  39 /*
  40  * High Level Configuration Options (easy to change)
  41  */
  42 #define CONFIG_MARVELL
  43 #define CONFIG_ARM926EJS                /* Basic Architecture */
  44 #define CONFIG_FEROCEON_88FR131         /* CPU Core subversion */
  45 #define CONFIG_KIRKWOOD                 /* SOC Family Name */
  46 #define CONFIG_KW88F6281                /* SOC Name */
  47 #define CONFIG_MACH_KM_KIRKWOOD         /* Machine type */
  48
  49 /* include common defines/options for all Keymile boards */
  50 #include "keymile-common.h"
  51
  52 #define CONFIG_SYS_TEXT_BASE    0x04000000      /* code address after reloc */
  53 #define CONFIG_ENV_SIZE         (128 << 10)     /* NAND chip block size */
  54 #define CONFIG_SYS_MEMTEST_START 0x00400000     /* 4M */
  55 #define CONFIG_SYS_MEMTEST_END  0x007fffff      /*(_8M -1) */
  56 #define CONFIG_SYS_LOAD_ADDR    0x00800000      /* default load adr- 8M */
  57
  58 /* pseudo-non volatile RAM [hex] */
  59 #define CONFIG_KM_PNVRAM        0x80000
  60 /* physical RAM MTD size [hex] */
  61 #define CONFIG_KM_PHRAM         0x17F000
  62
  63 #define CONFIG_KM_CRAMFS_ADDR   0x2400000
  64 #define CONFIG_KM_KERNEL_ADDR   0x2000000       /* 4096KBytes */
  65
  66 #define CONFIG_KM_DEF_ENV_CPU                                           \
  67         "addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0"         \
  68         "boot=bootm ${actual_kernel_addr} - -\0"                        \
  69         "cramfsloadfdt=echo \\\\c\0"                                    \
  70         "tftpfdt=echo \\\\c\0"                                          \
  71         CONFIG_KM_DEF_ENV_UPDATE                                        \
  72         ""
  73
  74
  75
  76 #define CONFIG_MD5      /* get_random_hex on krikwood needs MD5 support */
  77 #define CONFIG_SKIP_LOWLEVEL_INIT       /* disable board lowlevel_init */
  78 #define CONFIG_KIRKWOOD_EGIGA_INIT      /* Enable GbePort0/1 for kernel */
  79 #undef  CONFIG_KIRKWOOD_PCIE_INIT       /* Disable PCIE Port0 for kernel */
  80 #define CONFIG_KIRKWOOD_RGMII_PAD_1V8   /* Set RGMII Pad voltage to 1.8V */
  81
  82 #define CONFIG_MISC_INIT_R
  83
  84 /*
  85  * NS16550 Configuration
  86  */
  87 #define CONFIG_SYS_NS16550
  88 #define CONFIG_SYS_NS16550_SERIAL
  89 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  90 #define CONFIG_SYS_NS16550_CLK          CONFIG_SYS_TCLK
  91 #define CONFIG_SYS_NS16550_COM1         KW_UART0_BASE
  92
  93 /*
  94  * Serial Port configuration
  95  * The following definitions let you select what serial you want to use
  96  * for your console driver.
  97  */
  98
  99 #define CONFIG_CONS_INDEX       1       /* Console on UART0 */
 100
 101 /*
 102  * For booting Linux, the board info and command line data
 103  * have to be in the first 8 MB of memory, since this is
 104  * the maximum mapped by the Linux kernel during initialization.
 105  */
 106 #define CONFIG_BOOTMAPSZ        (8 << 20)       /* Initial Memmap for Linux */
 107 #define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs  */
 108 #define CONFIG_INITRD_TAG               /* enable INITRD tag */
 109 #define CONFIG_SETUP_MEMORY_TAGS        /* enable memory tag */
 110
 111 /*
 112  * Commands configuration
 113  */
 114 #define CONFIG_CMD_ELF
 115 #define CONFIG_CMD_MTDPARTS
 116 #define CONFIG_CMD_NAND
 117 #define CONFIG_CMD_NFS
 118
 119 /*
 120  * Without NOR FLASH we need this
 121  */
 122 #define CONFIG_SYS_NO_FLASH
 123 #undef CONFIG_CMD_FLASH
 124 #undef CONFIG_CMD_IMLS
 125
 126 /*
 127  * NAND Flash configuration
 128  */
 129 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 130 #define NAND_MAX_CHIPS                  1
 131 #define CONFIG_NAND_KIRKWOOD
 132 #define CONFIG_SYS_NAND_BASE            0xd8000000
 133
 134 #define BOOTFLASH_START         0x0
 135
 136 #define CONFIG_KM_CONSOLE_TTY   "ttyS0"
 137
 138 /* size in bytes reserved for initial data */
 139
 140 /*
 141  * Other required minimal configurations
 142  */
 143 #define CONFIG_CONSOLE_INFO_QUIET       /* some code reduction */
 144 #define CONFIG_ARCH_CPU_INIT            /* call arch_cpu_init() */
 145 #define CONFIG_ARCH_MISC_INIT           /* call arch_misc_init() */
 146 #define CONFIG_DISPLAY_CPUINFO          /* Display cpu info */
 147 #define CONFIG_NR_DRAM_BANKS    4
 148 #define CONFIG_STACKSIZE        0x00100000      /* regular stack- 1M */
 149 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000     /* Rst Vector Adr */
 150
 151 /*
 152  * Ethernet Driver configuration
 153  */
 154 #define CONFIG_NETCONSOLE       /* include NetConsole support   */
 155 #define CONFIG_NET_MULTI        /* specify more that one ports available */
 156 #define CONFIG_MII              /* expose smi ove miiphy interface */
 157 #define CONFIG_MVGBE            /* Enable Marvell Gbe Controller Driver */
 158 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */
 159 #define CONFIG_MVGBE_PORTS      {1, 0}  /* enable port 0 only */
 160 #define CONFIG_PHY_BASE_ADR     0
 161 #define CONFIG_ENV_OVERWRITE    /* ethaddr can be reprogrammed */
 162 #define CONFIG_RESET_PHY_R      /* use reset_phy() to init 88E1118 PHY */
 163
 164 /*
 165  * UBI related stuff
 166  */
 167 #define CONFIG_SYS_USE_UBI
 168
 169 /*
 170  * I2C related stuff
 171  */
 172 #define CONFIG_SOFT_I2C         /* I2C bit-banged       */
 173
 174 #define CONFIG_KIRKWOOD_GPIO            /* Enable GPIO Support */
 175 #if defined(CONFIG_SOFT_I2C)
 176 #ifndef __ASSEMBLY__
 177 #include <asm/arch-kirkwood/gpio.h>
 178 extern void __set_direction(unsigned pin, int high);
 179 void set_sda (int state);
 180 void set_scl (int state);
 181 int get_sda (void);
 182 int get_scl (void);
 183 #define KM_KIRKWOOD_SDA_PIN     8
 184 #define KM_KIRKWOOD_SCL_PIN     9
 185 #define KM_KIRKWOOD_ENV_WP      38
 186
 187 #define I2C_ACTIVE      __set_direction(KM_KIRKWOOD_SDA_PIN, 0)
 188 #define I2C_TRISTATE    __set_direction(KM_KIRKWOOD_SDA_PIN, 1)
 189 #define I2C_READ        (kw_gpio_get_value(KM_KIRKWOOD_SDA_PIN) ? 1 : 0)
 190 #define I2C_SDA(bit)    kw_gpio_set_value(KM_KIRKWOOD_SDA_PIN, bit)
 191 #define I2C_SCL(bit)    kw_gpio_set_value(KM_KIRKWOOD_SCL_PIN, bit)
 192 #endif
 193
 194 #define I2C_DELAY       udelay(3)       /* 1/4 I2C clock duration */
 195 #define I2C_SOFT_DECLARATIONS
 196
 197 #define CONFIG_SYS_I2C_SLAVE            0x0
 198 #define CONFIG_SYS_I2C_SPEED            100000
 199 #endif
 200
 201 #define CONFIG_SYS_I2C_EEPROM_ADDR      0x50
 202 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  2
 203
 204 /*
 205  *  Environment variables configurations
 206  */
 207 #define CONFIG_ENV_IS_IN_EEPROM         /* use EEPROM for environment vars */
 208 #define CONFIG_SYS_DEF_EEPROM_ADDR      0x50
 209 #define CONFIG_ENV_EEPROM_IS_ON_I2C
 210 #define CONFIG_SYS_EEPROM_WREN
 211 #define CONFIG_ENV_OFFSET               0x0 /* no bracets! */
 212 #undef  CONFIG_ENV_SIZE
 213 #define CONFIG_ENV_SIZE                 (0x2000 - CONFIG_ENV_OFFSET)
 214 #define CONFIG_I2C_ENV_EEPROM_BUS       "pca9547:70:d\0"
 215
 216 /* offset redund: (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */
 217 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
 218 #define CONFIG_ENV_OFFSET_REDUND        0x2000 /* no bracets! */
 219 #define CONFIG_ENV_SIZE_REDUND          (CONFIG_ENV_SIZE)
 220
 221 #define CONFIG_CMD_SF
 222
 223 #define CONFIG_SPI_FLASH
 224 #define CONFIG_HARD_SPI
 225 #define CONFIG_KIRKWOOD_SPI
 226 #define CONFIG_SPI_FLASH_STMICRO
 227 #define CONFIG_ENV_SPI_BUS              0
 228 #define CONFIG_ENV_SPI_CS               0
 229 #define CONFIG_ENV_SPI_MAX_HZ           50000000        /* 50Mhz */
 230
 231 #define FLASH_GPIO_PIN                  0x00010000
 232
 233 #define MTDIDS_DEFAULT          "nand0=orion_nand"
 234 /* test-only: partitioning needs some tuning, this is just for tests */
 235 #define MTDPARTS_DEFAULT        "mtdparts="                             \
 236         "orion_nand:"                                                   \
 237                 "-(" CONFIG_KM_UBI_PARTITION_NAME ")"
 238
 239 #define CONFIG_KM_DEF_ENV_UPDATE                                        \
 240         "update="                                                       \
 241                 "spi on;sf probe 0;sf erase 0 50000;"                   \
 242                 "sf write ${u-boot_addr_r} 0 ${filesize};"              \
 243                 "spi off\0"
 244
 245 #if defined(CONFIG_SYS_NO_FLASH)
 246 #define CONFIG_KM_UBI_PARTITION_NAME   "ubi0"
 247 #undef  CONFIG_FLASH_CFI_MTD
 248 #undef  CONFIG_JFFS2_CMDLINE
 249 #endif
 250
 251 /* additions for new relocation code, must be added to all boards */
 252 #define CONFIG_SYS_SDRAM_BASE           0x00000000
 253 /* Kirkwood has 2k of Security SRAM, use it for SP */
 254 #define CONFIG_SYS_INIT_SP_ADDR         0xC8012000
 255 /* Do early setups now in board_init_f() */
 256 #define CONFIG_BOARD_EARLY_INIT_F
 257
 258 /*
 259  * resereved pram area at the end of memroy [hex]
 260  * 8Mbytes for switch + 4Kbytes for bootcount
 261  */
 262 #define CONFIG_KM_RESERVED_PRAM 0x801000
 263
 264 #endif /* _CONFIG_KM_ARM_H */