include/configs/lager.h

   1 /*
   2  * include/configs/lager.h
   3  *     This file is lager board configuration.
   4  *
   5  * Copyright (C) 2013 Renesas Electronics Corporation
   6  *
   7  * SPDX-License-Identifier: GPL-2.0
   8  */
   9
  10 #ifndef __LAGER_H
  11 #define __LAGER_H
  12
  13 #undef DEBUG
  14 #define CONFIG_ARMV7
  15 #define CONFIG_R8A7790
  16 #define CONFIG_RMOBILE
  17 #define CONFIG_RMOBILE_BOARD_STRING "Lager"
  18 #define CONFIG_SH_GPIO_PFC
  19 #define MACH_TYPE_LAGER         4538
  20 #define CONFIG_MACH_TYPE        MACH_TYPE_LAGER
  21
  22 #include <asm/arch/rmobile.h>
  23
  24 #define CONFIG_CMD_EDITENV
  25 #define CONFIG_CMD_SAVEENV
  26 #define CONFIG_CMD_MEMORY
  27 #define CONFIG_CMD_DFL
  28 #define CONFIG_CMD_SDRAM
  29 #define CONFIG_CMD_RUN
  30 #define CONFIG_CMD_LOADS
  31 #define CONFIG_CMD_NET
  32 #define CONFIG_CMD_MII
  33 #define CONFIG_CMD_PING
  34 #define CONFIG_CMD_DHCP
  35 #define CONFIG_CMD_NFS
  36 #define CONFIG_CMD_BOOTZ
  37
  38 #if defined(CONFIG_SYS_USE_BOOT_NORFLASH)
  39 #define CONFIG_CMD_FLASH
  40 #define CONFIG_SYS_TEXT_BASE    0x00000000
  41 #else
  42 #define CONFIG_CMD_SF
  43 #define CONFIG_CMD_SPI
  44 #define CONFIG_SYS_TEXT_BASE    0xE8080000
  45 #endif
  46
  47 #define CONFIG_CMDLINE_TAG
  48 #define CONFIG_SETUP_MEMORY_TAGS
  49 #define CONFIG_INITRD_TAG
  50 #define CONFIG_CMDLINE_EDITING
  51 #define CONFIG_OF_LIBFDT
  52
  53 /* #define CONFIG_OF_LIBFDT */
  54 #define BOARD_LATE_INIT
  55
  56 #define CONFIG_BAUDRATE         38400
  57 #define CONFIG_BOOTDELAY        3
  58 #define CONFIG_BOOTARGS         ""
  59
  60 #define CONFIG_VERSION_VARIABLE
  61 #undef  CONFIG_SHOW_BOOT_PROGRESS
  62
  63 #define CONFIG_ARCH_CPU_INIT
  64 #define CONFIG_DISPLAY_CPUINFO
  65 #define CONFIG_DISPLAY_BOARDINFO
  66 #define CONFIG_BOARD_EARLY_INIT_F
  67 #define CONFIG_USE_ARCH_MEMSET
  68 #define CONFIG_USE_ARCH_MEMCPY
  69 #define CONFIG_TMU_TIMER
  70
  71 /* STACK */
  72 #define CONFIG_SYS_INIT_SP_ADDR         0xE827fffc
  73 #define STACK_AREA_SIZE                         0xC000
  74 #define LOW_LEVEL_MERAM_STACK   \
  75                 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
  76
  77 /* MEMORY */
  78 #define LAGER_SDRAM_BASE        0x40000000
  79 #define LAGER_SDRAM_SIZE        (2048u * 1024 * 1024)
  80 #define LAGER_UBOOT_SDRAM_SIZE  (512 * 1024 * 1024)
  81
  82 #define CONFIG_SYS_LONGHELP
  83 #define CONFIG_SYS_CBSIZE               256
  84 #define CONFIG_SYS_PBSIZE               256
  85 #define CONFIG_SYS_MAXARGS              16
  86 #define CONFIG_SYS_BARGSIZE             512
  87 #define CONFIG_SYS_BAUDRATE_TABLE       { 38400, 115200 }
  88
  89 /* SCIF */
  90 #define CONFIG_SCIF_CONSOLE
  91 #define CONFIG_CONS_SCIF0
  92 #define SCIF0_BASE              0xe6e60000
  93 #undef  CONFIG_SYS_CONSOLE_INFO_QUIET
  94 #undef  CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
  95 #undef  CONFIG_SYS_CONSOLE_ENV_OVERWRITE
  96
  97 #define CONFIG_SYS_MEMTEST_START        (LAGER_SDRAM_BASE)
  98 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + \
  99                                          504 * 1024 * 1024)
 100 #undef  CONFIG_SYS_ALT_MEMTEST
 101 #undef  CONFIG_SYS_MEMTEST_SCRATCH
 102 #undef  CONFIG_SYS_LOADS_BAUD_CHANGE
 103
 104 #define CONFIG_SYS_SDRAM_BASE           (LAGER_SDRAM_BASE)
 105 #define CONFIG_SYS_SDRAM_SIZE           (LAGER_UBOOT_SDRAM_SIZE)
 106 #define CONFIG_SYS_LOAD_ADDR            (CONFIG_SYS_SDRAM_BASE + 0x7fc0)
 107 #define CONFIG_NR_DRAM_BANKS            1
 108
 109 #define CONFIG_SYS_MONITOR_BASE         0x00000000
 110 #define CONFIG_SYS_MONITOR_LEN          (256 * 1024)
 111 #define CONFIG_SYS_MALLOC_LEN           (1 * 1024 * 1024)
 112 #define CONFIG_SYS_GBL_DATA_SIZE        (256)
 113 #define CONFIG_SYS_BOOTMAPSZ            (8 * 1024 * 1024)
 114
 115 #if defined(CONFIG_SYS_USE_BOOT_NORFLASH)
 116 /* USE NOR FLASH */
 117 #define CONFIG_SYS_FLASH_CFI
 118 #define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_16BIT
 119 #define CONFIG_FLASH_CFI_DRIVER
 120 #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
 121 #define CONFIG_FLASH_SHOW_PROGRESS      45
 122 #define CONFIG_SYS_FLASH_BASE           0x00000000
 123 #define CONFIG_SYS_FLASH_SIZE           0x04000000      /* 64 MB */
 124 #define CONFIG_SYS_MAX_FLASH_SECT       1024
 125 #define CONFIG_SYS_MAX_FLASH_BANKS      1
 126 #define CONFIG_SYS_FLASH_BANKS_LIST     { (CONFIG_SYS_FLASH_BASE) }
 127 #define CONFIG_SYS_FLASH_BANKS_SIZES    { (CONFIG_SYS_FLASH_SIZE) }
 128 #define CONFIG_SYS_FLASH_ERASE_TOUT     3000
 129 #define CONFIG_SYS_FLASH_WRITE_TOUT     3000
 130 #define CONFIG_SYS_FLASH_LOCK_TOUT      3000
 131 #define CONFIG_SYS_FLASH_UNLOCK_TOUT    3000
 132
 133 /* ENV setting */
 134 #define CONFIG_ENV_IS_IN_FLASH
 135 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + \
 136                                  CONFIG_SYS_MONITOR_LEN)
 137
 138 #else /* CONFIG_SYS_USE_BOOT_NORFLASH */
 139
 140 /* USE SPI */
 141 #define CONFIG_SPI
 142 #define CONFIG_SPI_FLASH_BAR
 143 #define CONFIG_SH_QSPI
 144 #define CONFIG_SPI_FLASH
 145 #define CONFIG_SPI_FLASH_SPANSION
 146 #define CONFIG_SYS_NO_FLASH
 147
 148 /* ENV setting */
 149 #define CONFIG_ENV_IS_IN_SPI_FLASH
 150 #define CONFIG_ENV_ADDR 0xC0000
 151 #endif
 152
 153 /* Common ENV setting */
 154 #define CONFIG_ENV_OVERWRITE
 155 #define CONFIG_ENV_SECT_SIZE    (256 * 1024)
 156 #define CONFIG_ENV_OFFSET       (CONFIG_ENV_ADDR)
 157 #define CONFIG_ENV_SIZE         (CONFIG_ENV_SECT_SIZE)
 158 #define CONFIG_ENV_SIZE_REDUND  (CONFIG_SYS_MONITOR_LEN)
 159
 160 /* SH Ether */
 161 #define CONFIG_NET_MULTI
 162 #define CONFIG_SH_ETHER
 163 #define CONFIG_SH_ETHER_USE_PORT        0
 164 #define CONFIG_SH_ETHER_PHY_ADDR        0x1
 165 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
 166 #define CONFIG_SH_ETHER_ALIGNE_SIZE     64
 167 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
 168 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
 169 #define CONFIG_PHYLIB
 170 #define CONFIG_PHY_MICREL
 171 #define CONFIG_BITBANGMII
 172 #define CONFIG_BITBANGMII_MULTI
 173
 174 /* I2C */
 175 #define CONFIG_SYS_I2C
 176 #define CONFIG_SYS_I2C_RCAR
 177 #define CONFIG_SYS_RCAR_I2C0_BASE       0xE6508000
 178 #define CONFIG_SYS_RCAR_I2C0_SPEED      400000
 179 #define CONFIG_SYS_RCAR_I2C1_BASE       0xE6518000
 180 #define CONFIG_SYS_RCAR_I2C1_SPEED      400000
 181 #define CONFIG_SYS_RCAR_I2C2_BASE       0xE6530000
 182 #define CONFIG_SYS_RCAR_I2C2_SPEED      400000
 183 #define CONFIG_SYS_RCAR_I2C3_BASE       0xE6540000
 184 #define CONFIG_SYS_RCAR_I2C3_SPEED      400000
 185 #define CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS     4
 186
 187 #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
 188
 189 /* Board Clock */
 190 #define CONFIG_BASE_CLK_FREQ    20000000u
 191 #define CONFIG_SH_TMU_CLK_FREQ  (CONFIG_BASE_CLK_FREQ / 2) /* EXT / 2 */
 192 #define CONFIG_PLL1_CLK_FREQ    (CONFIG_BASE_CLK_FREQ * 156 / 2)
 193 #define CONFIG_PLL1_DIV2_CLK_FREQ       (CONFIG_PLL1_CLK_FREQ / 2)
 194 #define CONFIG_MP_CLK_FREQ      (CONFIG_PLL1_DIV2_CLK_FREQ / 15)
 195 #define CONFIG_HP_CLK_FREQ      (CONFIG_PLL1_CLK_FREQ / 12)
 196 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_MP_CLK_FREQ
 197
 198 #define CONFIG_SYS_TMU_CLK_DIV  4
 199 #define CONFIG_SYS_HZ           1000
 200
 201 #endif  /* __LAGER_H */