]> git.ipfire.org Git - thirdparty/u-boot.git/blob - include/configs/ls1046a_common.h
scsi: Drop CONFIG_SYS_SCSI_MAX_DEVICE
[thirdparty/u-boot.git] / include / configs / ls1046a_common.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3 * Copyright 2016 Freescale Semiconductor
4 * Copyright 2019-2021 NXP
5 */
6
7 #ifndef __LS1046A_COMMON_H
8 #define __LS1046A_COMMON_H
9
10 /* SPL build */
11 #ifdef CONFIG_SPL_BUILD
12 #define SPL_NO_QBMAN
13 #define SPL_NO_FMAN
14 #define SPL_NO_ENV
15 #define SPL_NO_MISC
16 #define SPL_NO_QSPI
17 #define SPL_NO_USB
18 #define SPL_NO_SATA
19 #endif
20 #if defined(CONFIG_SPL_BUILD) && \
21 (defined(CONFIG_NAND_BOOT) || defined(CONFIG_QSPI_BOOT))
22 #define SPL_NO_MMC
23 #endif
24 #if defined(CONFIG_SPL_BUILD) && \
25 !defined(CONFIG_SPL_FSL_LS_PPA)
26 #define SPL_NO_IFC
27 #endif
28
29 #include <asm/arch/config.h>
30 #include <asm/arch/stream_id_lsch2.h>
31
32 /* Link Definitions */
33 #ifdef CONFIG_TFABOOT
34 #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
35 #else
36 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
37 #endif
38
39 #define CONFIG_VERY_BIG_RAM
40 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
41 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
42 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
43 #define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL
44
45 #define CPU_RELEASE_ADDR secondary_boot_addr
46
47 /* Generic Timer Definitions */
48 #define COUNTER_FREQUENCY 25000000 /* 25MHz */
49
50 /* Serial Port */
51 #define CONFIG_SYS_NS16550_SERIAL
52 #define CONFIG_SYS_NS16550_REG_SIZE 1
53 #define CONFIG_SYS_NS16550_CLK (get_serial_clock())
54
55 /* SD boot SPL */
56 #ifdef CONFIG_SD_BOOT
57 #define CONFIG_SPL_MAX_SIZE 0x1f000 /* 124 KiB */
58 #define CONFIG_SPL_STACK 0x10020000
59 #define CONFIG_SPL_PAD_TO 0x21000 /* 132 KiB */
60 #define CONFIG_SPL_BSS_START_ADDR 0x8f000000
61 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
62 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
63 CONFIG_SPL_BSS_MAX_SIZE)
64 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
65
66 #ifdef CONFIG_NXP_ESBC
67 #define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
68 /*
69 * HDR would be appended at end of image and copied to DDR along
70 * with U-Boot image. Here u-boot max. size is 512K. So if binary
71 * size increases then increase this size in case of secure boot as
72 * it uses raw u-boot image instead of fit image.
73 */
74 #define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
75 #else
76 #define CONFIG_SYS_MONITOR_LEN 0x100000
77 #endif /* ifdef CONFIG_NXP_ESBC */
78 #endif
79
80 #if defined(CONFIG_QSPI_BOOT) && defined(CONFIG_SPL)
81 #define CONFIG_SPL_TARGET "spl/u-boot-spl.pbl"
82 #define CONFIG_SPL_MAX_SIZE 0x1f000
83 #define CONFIG_SPL_STACK 0x10020000
84 #define CONFIG_SPL_PAD_TO 0x20000
85 #define CONFIG_SPL_BSS_START_ADDR 0x8f000000
86 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
87 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
88 CONFIG_SPL_BSS_MAX_SIZE)
89 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
90 #define CONFIG_SYS_MONITOR_LEN 0x100000
91 #endif
92
93 /* NAND SPL */
94 #ifdef CONFIG_NAND_BOOT
95 #define CONFIG_SPL_PBL_PAD
96
97 #define CONFIG_SPL_MAX_SIZE 0x17000 /* 90 KiB */
98 #define CONFIG_SPL_STACK 0x1001f000
99 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
100 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
101
102 #define CONFIG_SPL_BSS_START_ADDR 0x8f000000
103 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
104 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
105 CONFIG_SPL_BSS_MAX_SIZE)
106 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
107 #define CONFIG_SYS_MONITOR_LEN 0xa0000
108 #endif
109
110 /* GPIO */
111
112 /* I2C */
113
114 /* PCIe */
115 #define CONFIG_PCIE1 /* PCIE controller 1 */
116 #define CONFIG_PCIE2 /* PCIE controller 2 */
117 #define CONFIG_PCIE3 /* PCIE controller 3 */
118
119 #ifdef CONFIG_PCI
120 #define CONFIG_PCI_SCAN_SHOW
121 #endif
122
123 /* SATA */
124 #ifndef SPL_NO_SATA
125 #define CONFIG_SCSI_AHCI_PLAT
126
127 #define CONFIG_SYS_SATA AHCI_BASE_ADDR
128
129 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
130 #define CONFIG_SYS_SCSI_MAX_LUN 1
131 #endif
132
133 /* FMan ucode */
134 #ifndef SPL_NO_FMAN
135 #define CONFIG_SYS_DPAA_FMAN
136 #ifdef CONFIG_SYS_DPAA_FMAN
137 #define CONFIG_SYS_FM_MURAM_SIZE 0x60000
138 #endif
139 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
140 #endif
141
142 /* Miscellaneous configurable options */
143
144 #define CONFIG_HWCONFIG
145 #define HWCONFIG_BUFFER_SIZE 128
146
147 #ifndef CONFIG_SPL_BUILD
148 #define BOOT_TARGET_DEVICES(func) \
149 func(SCSI, scsi, 0) \
150 func(MMC, mmc, 0) \
151 func(USB, usb, 0) \
152 func(DHCP, dhcp, na)
153 #include <config_distro_bootcmd.h>
154 #endif
155
156 #if defined(CONFIG_TARGET_LS1046AFRWY)
157 #define LS1046A_BOOT_SRC_AND_HDR\
158 "boot_scripts=ls1046afrwy_boot.scr\0" \
159 "boot_script_hdr=hdr_ls1046afrwy_bs.out\0"
160 #elif defined(CONFIG_TARGET_LS1046AQDS)
161 #define LS1046A_BOOT_SRC_AND_HDR\
162 "boot_scripts=ls1046aqds_boot.scr\0" \
163 "boot_script_hdr=hdr_ls1046aqds_bs.out\0"
164 #else
165 #define LS1046A_BOOT_SRC_AND_HDR\
166 "boot_scripts=ls1046ardb_boot.scr\0" \
167 "boot_script_hdr=hdr_ls1046ardb_bs.out\0"
168 #endif
169 #ifndef SPL_NO_MISC
170 /* Initial environment variables */
171 #define CONFIG_EXTRA_ENV_SETTINGS \
172 "hwconfig=fsl_ddr:bank_intlv=auto\0" \
173 "ramdisk_addr=0x800000\0" \
174 "ramdisk_size=0x2000000\0" \
175 "bootm_size=0x10000000\0" \
176 "fdt_addr=0x64f00000\0" \
177 "kernel_addr=0x61000000\0" \
178 "scriptaddr=0x80000000\0" \
179 "scripthdraddr=0x80080000\0" \
180 "fdtheader_addr_r=0x80100000\0" \
181 "kernelheader_addr_r=0x80200000\0" \
182 "load_addr=0xa0000000\0" \
183 "kernel_addr_r=0x81000000\0" \
184 "fdt_addr_r=0x90000000\0" \
185 "ramdisk_addr_r=0xa0000000\0" \
186 "kernel_start=0x1000000\0" \
187 "kernelheader_start=0x600000\0" \
188 "kernel_load=0xa0000000\0" \
189 "kernel_size=0x2800000\0" \
190 "kernelheader_size=0x40000\0" \
191 "kernel_addr_sd=0x8000\0" \
192 "kernel_size_sd=0x14000\0" \
193 "kernelhdr_addr_sd=0x3000\0" \
194 "kernelhdr_size_sd=0x10\0" \
195 "console=ttyS0,115200\0" \
196 CONFIG_MTDPARTS_DEFAULT "\0" \
197 BOOTENV \
198 LS1046A_BOOT_SRC_AND_HDR \
199 "scan_dev_for_boot_part=" \
200 "part list ${devtype} ${devnum} devplist; " \
201 "env exists devplist || setenv devplist 1; " \
202 "for distro_bootpart in ${devplist}; do " \
203 "if fstype ${devtype} " \
204 "${devnum}:${distro_bootpart} " \
205 "bootfstype; then " \
206 "run scan_dev_for_boot; " \
207 "fi; " \
208 "done\0" \
209 "boot_a_script=" \
210 "load ${devtype} ${devnum}:${distro_bootpart} " \
211 "${scriptaddr} ${prefix}${script}; " \
212 "env exists secureboot && load ${devtype} " \
213 "${devnum}:${distro_bootpart} " \
214 "${scripthdraddr} ${prefix}${boot_script_hdr}; " \
215 "env exists secureboot " \
216 "&& esbc_validate ${scripthdraddr};" \
217 "source ${scriptaddr}\0" \
218 "qspi_bootcmd=echo Trying load from qspi..;" \
219 "sf probe && sf read $load_addr " \
220 "$kernel_start $kernel_size; env exists secureboot " \
221 "&& sf read $kernelheader_addr_r $kernelheader_start " \
222 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
223 "bootm $load_addr#$board\0" \
224 "nand_bootcmd=echo Trying load from nand..;" \
225 "nand info; nand read $load_addr " \
226 "$kernel_start $kernel_size; env exists secureboot " \
227 "&& nand read $kernelheader_addr_r $kernelheader_start " \
228 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
229 "bootm $load_addr#$board\0" \
230 "nor_bootcmd=echo Trying load from nor..;" \
231 "cp.b $kernel_addr $load_addr " \
232 "$kernel_size; env exists secureboot " \
233 "&& cp.b $kernelheader_addr $kernelheader_addr_r " \
234 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
235 "bootm $load_addr#$board\0" \
236 "sd_bootcmd=echo Trying load from SD ..;" \
237 "mmcinfo; mmc read $load_addr " \
238 "$kernel_addr_sd $kernel_size_sd && " \
239 "env exists secureboot && mmc read $kernelheader_addr_r " \
240 "$kernelhdr_addr_sd $kernelhdr_size_sd " \
241 " && esbc_validate ${kernelheader_addr_r};" \
242 "bootm $load_addr#$board\0"
243
244 #endif
245
246 /* Monitor Command Prompt */
247 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
248
249 #define CONFIG_SYS_MAXARGS 64 /* max command args */
250
251 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
252
253 #include <asm/arch/soc.h>
254
255 #endif /* __LS1046A_COMMON_H */