include/configs/mcx.h

   1 /*
   2  * Copyright (C) 2011 Ilya Yanok, Emcraft Systems
   3  *
   4  * Based on omap3_evm_config.h
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc.
  19  */
  20
  21 #ifndef __CONFIG_H
  22 #define __CONFIG_H
  23
  24 /*
  25  * High Level Configuration Options
  26  */
  27 #define CONFIG_OMAP                     /* in a TI OMAP core */
  28 #define CONFIG_OMAP34XX                 /* which is a 34XX */
  29 #define CONFIG_OMAP3_MCX                /* working with mcx */
  30
  31 #define MACH_TYPE_MCX                   3656
  32 #define CONFIG_MACH_TYPE        MACH_TYPE_MCX
  33
  34 #define CONFIG_SYS_CACHELINE_SIZE       64
  35
  36 #define CONFIG_EMIF4    /* The chip has EMIF4 controller */
  37
  38 #include <asm/arch/cpu.h>               /* get chip and board defs */
  39 #include <asm/arch/omap3.h>
  40
  41 #define CONFIG_OF_LIBFDT
  42 #define CONFIG_FIT
  43
  44 /*
  45  * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader
  46  * and older u-boot.bin with the new U-Boot SPL.
  47  */
  48 #define CONFIG_SYS_TEXT_BASE            0x80008000
  49
  50 /*
  51  * Display CPU and Board information
  52  */
  53 #define CONFIG_DISPLAY_CPUINFO
  54 #define CONFIG_DISPLAY_BOARDINFO
  55
  56 /* Clock Defines */
  57 #define V_OSCK                  26000000        /* Clock output from T2 */
  58 #define V_SCLK                  (V_OSCK >> 1)
  59
  60 #define CONFIG_MISC_INIT_R
  61
  62 #define CONFIG_CMDLINE_TAG                      /* enable passing of ATAGs */
  63 #define CONFIG_SETUP_MEMORY_TAGS
  64 #define CONFIG_INITRD_TAG
  65 #define CONFIG_REVISION_TAG
  66
  67 /*
  68  * Size of malloc() pool
  69  */
  70 #define CONFIG_ENV_SIZE                 (128 << 10)     /* 128 KiB sector */
  71 #define CONFIG_SYS_MALLOC_LEN           (1024 << 10)
  72 /*
  73  * DDR related
  74  */
  75 #define CONFIG_SYS_CS0_SIZE             (256 * 1024 * 1024)
  76
  77 /*
  78  * Hardware drivers
  79  */
  80
  81 /*
  82  * NS16550 Configuration
  83  */
  84 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
  85
  86 #define CONFIG_SYS_NS16550
  87 #define CONFIG_SYS_NS16550_SERIAL
  88 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  89 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
  90
  91 /*
  92  * select serial console configuration
  93  */
  94 #define CONFIG_CONS_INDEX               3
  95 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
  96 #define CONFIG_SERIAL3                  3       /* UART3 */
  97
  98 /* allow to overwrite serial and ethaddr */
  99 #define CONFIG_ENV_OVERWRITE
 100 #define CONFIG_BAUDRATE                 115200
 101 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
 102                                         115200}
 103 #define CONFIG_MMC
 104 #define CONFIG_OMAP_HSMMC
 105 #define CONFIG_GENERIC_MMC
 106 #define CONFIG_DOS_PARTITION
 107
 108 /* EHCI */
 109 #define CONFIG_USB_STORAGE
 110 #define CONFIG_OMAP3_GPIO_5
 111 #define CONFIG_USB_EHCI
 112 #define CONFIG_USB_EHCI_OMAP
 113 #define CONFIG_USB_ULPI
 114 #define CONFIG_USB_ULPI_VIEWPORT_OMAP
 115 /*#define CONFIG_EHCI_DCACHE*/ /* leave it disabled for now */
 116 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO        154
 117 #define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO        152
 118 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
 119
 120 /* commands to include */
 121 #include <config_cmd_default.h>
 122
 123 #define CONFIG_CMD_EXT2         /* EXT2 Support                 */
 124 #define CONFIG_CMD_FAT          /* FAT support                  */
 125 #define CONFIG_CMD_JFFS2        /* JFFS2 Support                */
 126
 127 #define CONFIG_CMD_DATE
 128 #define CONFIG_CMD_I2C          /* I2C serial bus support       */
 129 #define CONFIG_CMD_MMC          /* MMC support                  */
 130 #define CONFIG_CMD_FAT          /* FAT support                  */
 131 #define CONFIG_CMD_USB
 132 #define CONFIG_CMD_NAND         /* NAND support                 */
 133 #define CONFIG_CMD_DHCP
 134 #define CONFIG_CMD_PING
 135 #define CONFIG_CMD_CACHE
 136 #define CONFIG_CMD_UBI
 137 #define CONFIG_CMD_UBIFS
 138 #define CONFIG_RBTREE
 139 #define CONFIG_LZO
 140 #define CONFIG_MTD_PARTITIONS
 141 #define CONFIG_MTD_DEVICE
 142 #define CONFIG_CMD_MTDPARTS
 143
 144 #undef CONFIG_CMD_FLASH         /* flinfo, erase, protect       */
 145 #undef CONFIG_CMD_FPGA          /* FPGA configuration Support   */
 146 #undef CONFIG_CMD_IMI           /* iminfo                       */
 147 #undef CONFIG_CMD_IMLS          /* List all found images        */
 148
 149 #define CONFIG_SYS_NO_FLASH
 150 #define CONFIG_HARD_I2C
 151 #define CONFIG_SYS_I2C_SPEED            100000
 152 #define CONFIG_SYS_I2C_SLAVE            1
 153 #define CONFIG_SYS_I2C_BUS              0
 154 #define CONFIG_DRIVER_OMAP34XX_I2C
 155
 156 /* RTC */
 157 #define CONFIG_RTC_DS1337
 158 #define CONFIG_SYS_I2C_RTC_ADDR         0x68
 159
 160 #define CONFIG_CMD_NET
 161 #define CONFIG_CMD_MII
 162 #define CONFIG_CMD_NFS
 163 /*
 164  * Board NAND Info.
 165  */
 166 #define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
 167                                                         /* to access nand */
 168 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
 169                                                         /* to access */
 170                                                         /* nand at CS0 */
 171
 172 #define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of */
 173                                                         /* NAND devices */
 174 #define CONFIG_SYS_64BIT_VSPRINTF               /* needed for nand_util.c */
 175
 176 #define CONFIG_JFFS2_NAND
 177 /* nand device jffs2 lives on */
 178 #define CONFIG_JFFS2_DEV                "nand0"
 179 /* start of jffs2 partition */
 180 #define CONFIG_JFFS2_PART_OFFSET        0x680000
 181 #define CONFIG_JFFS2_PART_SIZE          0xf980000       /* sz of jffs2 part */
 182
 183 /* Environment information */
 184 #define CONFIG_BOOTDELAY        10
 185
 186 #define CONFIG_BOOTFILE         "uImage"
 187
 188 #define CONFIG_EXTRA_ENV_SETTINGS \
 189         "loadaddr=0x82000000\0" \
 190         "console=ttyO2,115200n8\0" \
 191         "mmcargs=setenv bootargs console=${console} " \
 192                 "root=/dev/mmcblk0p2 rw " \
 193                 "rootfstype=ext3 rootwait\0" \
 194         "nandargs=setenv bootargs console=${console} " \
 195                 "root=/dev/mtdblock4 rw " \
 196                 "rootfstype=jffs2\0" \
 197         "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \
 198         "bootscript=echo Running bootscript from mmc ...; " \
 199                 "source ${loadaddr}\0" \
 200         "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \
 201         "mmcboot=echo Booting from mmc ...; " \
 202                 "run mmcargs; " \
 203                 "bootm ${loadaddr}\0" \
 204         "nandboot=echo Booting from nand ...; " \
 205                 "run nandargs; " \
 206                 "nand read ${loadaddr} 280000 400000; " \
 207                 "bootm ${loadaddr}\0" \
 208
 209 #define CONFIG_BOOTCOMMAND \
 210         "if mmc init; then " \
 211                 "if run loadbootscript; then " \
 212                         "run bootscript; " \
 213                 "else " \
 214                         "if run loaduimage; then " \
 215                                 "run mmcboot; " \
 216                         "else run nandboot; " \
 217                         "fi; " \
 218                 "fi; " \
 219         "else run nandboot; fi"
 220
 221 #define CONFIG_AUTO_COMPLETE
 222 /*
 223  * Miscellaneous configurable options
 224  */
 225 #define V_PROMPT                        "mcx # "
 226
 227 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 228 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
 229 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 230 #define CONFIG_SYS_PROMPT               V_PROMPT
 231 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
 232 /* Print Buffer Size */
 233 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 234                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 235 #define CONFIG_SYS_MAXARGS              16      /* max number of command */
 236                                                 /* args */
 237 /* Boot Argument Buffer Size */
 238 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 239 /* memtest works on */
 240 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)
 241 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
 242                                         0x01F00000) /* 31MB */
 243
 244 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0) /* default load */
 245                                                                 /* address */
 246
 247 /*
 248  * AM3517 has 12 GP timers, they can be driven by the system clock
 249  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 250  * This rate is divided by a local divisor.
 251  */
 252 #define CONFIG_SYS_TIMERBASE            OMAP34XX_GPT2
 253 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 254 #define CONFIG_SYS_HZ                   1000
 255
 256 /*
 257  * Stack sizes
 258  *
 259  * The stack sizes are set up in start.S using the settings below
 260  */
 261 #define CONFIG_STACKSIZE        (128 << 10)     /* regular stack 128 KiB */
 262
 263 /*
 264  * Physical Memory Map
 265  */
 266 #define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
 267 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
 268 #define PHYS_SDRAM_1_SIZE       (32 << 20)      /* at least 32 MiB */
 269 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
 270
 271 /*
 272  * FLASH and environment organization
 273  */
 274
 275 /* **** PISMO SUPPORT *** */
 276
 277 /* Configure the PISMO */
 278 #define PISMO1_NAND_SIZE                GPMC_SIZE_128M
 279
 280 #define CONFIG_NAND_OMAP_GPMC
 281 #define GPMC_NAND_ECC_LP_x16_LAYOUT
 282 #define CONFIG_ENV_IS_IN_NAND
 283 #define SMNAND_ENV_OFFSET               0x260000 /* environment starts here */
 284
 285 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 286 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
 287 #define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
 288
 289 /*
 290  * CFI FLASH driver setup
 291  */
 292 /* timeout values are in ticks */
 293 #define CONFIG_SYS_FLASH_ERASE_TOUT     (100 * CONFIG_SYS_HZ)
 294 #define CONFIG_SYS_FLASH_WRITE_TOUT     (100 * CONFIG_SYS_HZ)
 295
 296 /* Flash banks JFFS2 should use */
 297 #define CONFIG_SYS_MAX_MTD_BANKS        (CONFIG_SYS_MAX_FLASH_BANKS + \
 298                                         CONFIG_SYS_MAX_NAND_DEVICE)
 299 #define CONFIG_SYS_JFFS2_MEM_NAND
 300 /* use flash_info[2] */
 301 #define CONFIG_SYS_JFFS2_FIRST_BANK     CONFIG_SYS_MAX_FLASH_BANKS
 302 #define CONFIG_SYS_JFFS2_NUM_BANKS      1
 303
 304 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 305 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 306 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 307 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 308                                          CONFIG_SYS_INIT_RAM_SIZE - \
 309                                          GENERATED_GBL_DATA_SIZE)
 310
 311 /* Defines for SPL */
 312 #define CONFIG_SPL
 313 #define CONFIG_SPL_NAND_SIMPLE
 314 #define CONFIG_SPL_NAND_SOFTECC
 315
 316 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 317 #define CONFIG_SPL_LIBDISK_SUPPORT
 318 #define CONFIG_SPL_I2C_SUPPORT
 319 #define CONFIG_SPL_MMC_SUPPORT
 320 #define CONFIG_SPL_FAT_SUPPORT
 321 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 322 #define CONFIG_SPL_SERIAL_SUPPORT
 323 #define CONFIG_SPL_POWER_SUPPORT
 324 #define CONFIG_SPL_NAND_SUPPORT
 325 #define CONFIG_SPL_LDSCRIPT             "$(CPUDIR)/omap-common/u-boot-spl.lds"
 326
 327 #define CONFIG_SPL_TEXT_BASE            0x40200000 /*CONFIG_SYS_SRAM_START*/
 328 #define CONFIG_SPL_MAX_SIZE             (45 << 10)
 329 #define CONFIG_SPL_STACK                LOW_LEVEL_SRAM_STACK
 330
 331 /* move malloc and bss high to prevent clashing with the main image */
 332 #define CONFIG_SYS_SPL_MALLOC_START     0x8f000000
 333 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x80000
 334 #define CONFIG_SPL_BSS_START_ADDR       0x8f080000 /* end of RAM */
 335 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
 336
 337 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
 338 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION    1
 339 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME        "u-boot.img"
 340
 341 /* NAND boot config */
 342 #define CONFIG_SYS_NAND_PAGE_COUNT      64
 343 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
 344 #define CONFIG_SYS_NAND_OOBSIZE         64
 345 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
 346 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 347 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0
 348 #define CONFIG_SYS_NAND_ECCPOS          {40, 41, 42, 43, 44, 45, 46, 47,\
 349                                          48, 49, 50, 51, 52, 53, 54, 55,\
 350                                          56, 57, 58, 59, 60, 61, 62, 63}
 351 #define CONFIG_SYS_NAND_ECCSIZE         256
 352 #define CONFIG_SYS_NAND_ECCBYTES        3
 353
 354 #define CONFIG_SYS_NAND_ECCSTEPS        (CONFIG_SYS_NAND_PAGE_SIZE / \
 355                                                 CONFIG_SYS_NAND_ECCSIZE)
 356 #define CONFIG_SYS_NAND_ECCTOTAL       (CONFIG_SYS_NAND_ECCBYTES * \
 357                                                 CONFIG_SYS_NAND_ECCSTEPS)
 358
 359 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
 360
 361 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
 362
 363 /*
 364  * ethernet support
 365  *
 366  */
 367 #if defined(CONFIG_CMD_NET)
 368 #define CONFIG_DRIVER_TI_EMAC
 369 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
 370 #define CONFIG_MII
 371 #define CONFIG_BOOTP_DEFAULT
 372 #define CONFIG_BOOTP_DNS
 373 #define CONFIG_BOOTP_DNS2
 374 #define CONFIG_BOOTP_SEND_HOSTNAME
 375 #define CONFIG_NET_RETRY_COUNT 10
 376 #endif
 377
 378 #endif /* __CONFIG_H */