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[people/ms/u-boot.git] / include / configs / mimc200.h
1 /*
2 * Copyright (C) 2006 Atmel Corporation
3 *
4 * Configuration settings for the AVR32 Network Gateway
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8 #ifndef __CONFIG_H
9 #define __CONFIG_H
10
11 #include <asm/arch/hardware.h>
12
13 #define CONFIG_AVR32
14 #define CONFIG_AT32AP
15 #define CONFIG_AT32AP7000
16 #define CONFIG_MIMC200
17
18 #define CONFIG_MIMC200_EXT_FLASH
19
20 /*
21 * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
22 * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency
23 * and the PBA bus to run at 1/4 the PLL frequency.
24 */
25 #define CONFIG_PLL
26 #define CONFIG_SYS_POWER_MANAGER
27 #define CONFIG_SYS_OSC0_HZ 10000000
28 #define CONFIG_SYS_PLL0_DIV 1
29 #define CONFIG_SYS_PLL0_MUL 15
30 #define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16
31 #define CONFIG_SYS_CLKDIV_CPU 0
32 #define CONFIG_SYS_CLKDIV_HSB 1
33 #define CONFIG_SYS_CLKDIV_PBA 2
34 #define CONFIG_SYS_CLKDIV_PBB 1
35
36 /* Reserve VM regions for SDRAM, NOR flash and FRAM */
37 #define CONFIG_SYS_NR_VM_REGIONS 3
38
39 /*
40 * The PLLOPT register controls the PLL like this:
41 * icp = PLLOPT<2>
42 * ivco = PLLOPT<1:0>
43 *
44 * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz).
45 */
46 #define CONFIG_SYS_PLL0_OPT 0x04
47
48 #define CONFIG_USART_BASE ATMEL_BASE_USART1
49 #define CONFIG_USART_ID 1
50
51 #define CONFIG_MIMC200_DBGLINK 1
52
53 /* User serviceable stuff */
54 #define CONFIG_DOS_PARTITION
55
56 #define CONFIG_CMDLINE_TAG
57 #define CONFIG_SETUP_MEMORY_TAGS
58 #define CONFIG_INITRD_TAG
59
60 #define CONFIG_STACKSIZE (2048)
61
62 #define CONFIG_BAUDRATE 115200
63 #define CONFIG_BOOTARGS \
64 "root=/dev/mtdblock1 rootfstype=jffs2 fbmem=512k console=ttyS1"
65 #define CONFIG_BOOTCOMMAND \
66 "fsload boot/uImage; bootm"
67
68 #define CONFIG_SILENT_CONSOLE /* enable silent startup */
69 #define CONFIG_DISABLE_CONSOLE /* disable console */
70 #define CONFIG_SYS_DEVICE_NULLDEV /* include nulldev device */
71
72 #define CONFIG_LCD 1
73
74 /*
75 * Only interrupt autoboot if <space> is pressed. Otherwise, garbage
76 * data on the serial line may interrupt the boot sequence.
77 */
78 #define CONFIG_BOOTDELAY 0
79 #define CONFIG_ZERO_BOOTDELAY_CHECK
80 #define CONFIG_AUTOBOOT
81
82 /*
83 * After booting the board for the first time, new ethernet addresses
84 * should be generated and assigned to the environment variables
85 * "ethaddr" and "eth1addr". This is normally done during production.
86 */
87 #define CONFIG_OVERWRITE_ETHADDR_ONCE
88
89 /*
90 * BOOTP/DHCP options
91 */
92 #define CONFIG_BOOTP_SUBNETMASK
93 #define CONFIG_BOOTP_GATEWAY
94
95 /*
96 * Command line configuration.
97 */
98 #include <config_cmd_default.h>
99
100 #define CONFIG_CMD_ASKENV
101 #define CONFIG_CMD_DHCP
102 #define CONFIG_CMD_EXT2
103 #define CONFIG_CMD_FAT
104 #define CONFIG_CMD_JFFS2
105 #define CONFIG_CMD_MMC
106 #define CONFIG_CMD_NET
107
108 #define CONFIG_ATMEL_USART
109 #define CONFIG_MACB
110 #define CONFIG_PORTMUX_PIO
111 #define CONFIG_SYS_NR_PIOS 5
112 #define CONFIG_SYS_HSDRAMC
113 #define CONFIG_MMC
114 #define CONFIG_GENERIC_ATMEL_MCI
115 #define CONFIG_GENERIC_MMC
116
117 #if defined(CONFIG_LCD)
118 #define CONFIG_CMD_BMP
119 #define CONFIG_ATMEL_LCD 1
120 #define LCD_BPP LCD_COLOR16
121 #define CONFIG_BMP_16BPP 1
122 #define CONFIG_FB_ADDR 0x10600000
123 #define CONFIG_WHITE_ON_BLACK 1
124 #define CONFIG_VIDEO_BMP_GZIP 1
125 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE 262144
126 #define CONFIG_ATMEL_LCD_BGR555 1
127 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
128 #define CONFIG_SPLASH_SCREEN 1
129 #endif
130
131 #define CONFIG_SYS_DCACHE_LINESZ 32
132 #define CONFIG_SYS_ICACHE_LINESZ 32
133
134 #define CONFIG_NR_DRAM_BANKS 1
135
136 #define CONFIG_SYS_FLASH_CFI
137 #define CONFIG_FLASH_CFI_DRIVER
138
139 #define CONFIG_SYS_FLASH_BASE 0x00000000
140 #define CONFIG_SYS_FLASH_SIZE 0x800000
141 #define CONFIG_SYS_MAX_FLASH_BANKS 1
142 #define CONFIG_SYS_MAX_FLASH_SECT 135
143
144 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
145 #define CONFIG_SYS_TEXT_BASE 0x00000000
146
147 #define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE
148 #define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
149 #define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE
150
151 #define CONFIG_SYS_FRAM_BASE 0x08000000
152 #define CONFIG_SYS_FRAM_SIZE 0x20000
153
154 #define CONFIG_ENV_IS_IN_FLASH
155 #define CONFIG_ENV_SIZE 65536
156 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
157
158 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE)
159
160 #define CONFIG_SYS_MALLOC_LEN (1024*1024)
161 #define CONFIG_SYS_DMA_ALLOC_LEN (16384)
162
163 /* Allow 4MB for the kernel run-time image */
164 #define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000)
165 #define CONFIG_SYS_BOOTPARAMS_LEN (16 * 1024)
166
167 /* Other configuration settings that shouldn't have to change all that often */
168 #define CONFIG_SYS_PROMPT "U-Boot> "
169 #define CONFIG_SYS_CBSIZE 256
170 #define CONFIG_SYS_MAXARGS 16
171 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
172 #define CONFIG_SYS_LONGHELP
173
174 #define CONFIG_SYS_MEMTEST_START EBI_SDRAM_BASE
175 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x1f00000)
176
177 #define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
178
179 #endif /* __CONFIG_H */