include/configs/mp2usb.h

   1 /*
   2  * 2004-2005 Gary Jennejohn <garyj@denx.de>
   3  *
   4  * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
   5  * ebenard@eukrea.com
   6  *
   7  * Configuration settings for the MP2USB board.
   8  *
   9  * See file CREDITS for list of people who contributed to this
  10  * project.
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License as
  14  * published by the Free Software Foundation; either version 2 of
  15  * the License, or (at your option) any later version.
  16  *
  17  * This program is distributed in the hope that it will be useful,
  18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  * GNU General Public License for more details.
  21  *
  22  * You should have received a copy of the GNU General Public License
  23  * along with this program; if not, write to the Free Software
  24  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25  * MA 02111-1307 USA
  26  */
  27
  28 #ifndef __CONFIG_H
  29 #define __CONFIG_H
  30
  31 /* ARM asynchronous clock */
  32 #define AT91C_MAIN_CLOCK        179712000       /* from 18.432 MHz crystal (18432000 / 4 * 45) */
  33 #define AT91C_MASTER_CLOCK      (AT91C_MAIN_CLOCK/3)    /* peripheral clock */
  34
  35 #define AT91_SLOW_CLOCK         32768   /* slow clock */
  36
  37 #define CONFIG_ARM920T          1       /* This is an ARM920T Core      */
  38 #define CONFIG_AT91RM9200       1       /* It's an Atmel AT91RM9200 SoC */
  39 #define CONFIG_AT91RM9200DK     1       /* on an AT91RM9200DK Board     */
  40 #define CONFIG_MP2USB           1       /* on an MP2USB Board           */
  41 #undef  CONFIG_USE_IRQ                  /* we don't need IRQ/FIQ stuff  */
  42 #define USE_920T_MMU            1
  43
  44 #define CONFIG_CMDLINE_TAG      1       /* enable passing of ATAGs      */
  45 #define CONFIG_SETUP_MEMORY_TAGS 1
  46 #define CONFIG_INITRD_TAG       1
  47
  48 #define CFG_ATMEL_PLL_INIT_BUG  1
  49 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
  50 #define CFG_USE_MAIN_OSCILLATOR         1
  51 /* flash */
  52 #define MC_PUIA_VAL     0x00000000
  53 #define MC_PUP_VAL      0x00000000
  54 #define MC_PUER_VAL     0x00000000
  55 #define MC_ASR_VAL      0x00000000
  56 #define MC_AASR_VAL     0x00000000
  57 #define EBI_CFGR_VAL    0x00000000
  58 #define SMC2_CSR_VAL    0x00003084 /* 16bit, 2 TDF, 4 WS */
  59
  60 /* clocks */
  61 #define PLLAR_VAL       0x20263E04 /* 180 MHz for PCK */
  62 #define PLLBR_VAL       0x10483E0E /* 48 MHz (divider by 2 for USB) */
  63 #define MCKR_VAL        0x00000202 /* PCK/3 = MCK Master Clock = 60MHz from PLLA */
  64
  65 /* sdram */
  66 #define PIOC_ASR_VAL    0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */
  67 #define PIOC_BSR_VAL    0x00000000
  68 #define PIOC_PDR_VAL    0xFFFF0000
  69 #define EBI_CSA_VAL     0x00000002 /* CS1=SDRAM */
  70 #define SDRC_CR_VAL     0x3211295A /* set up the SDRAM */
  71 #define SDRAM           0x20000000 /* address of the SDRAM */
  72 #define SDRAM1          0x20000020 /* address of the SDRAM */
  73 #define SDRAM_VAL       0x00000000 /* value written to SDRAM */
  74 #define SDRC_MR_VAL     0x00000002 /* Precharge All */
  75 #define SDRC_MR_VAL1    0x00000004 /* refresh */
  76 #define SDRC_MR_VAL2    0x00000003 /* Load Mode Register */
  77 #define SDRC_MR_VAL3    0x00000000 /* Normal Mode */
  78 #define SDRC_TR_VAL     0x000002E0 /* Write refresh rate */
  79 #endif  /* CONFIG_SKIP_LOWLEVEL_INIT */
  80
  81 /*
  82  * Size of malloc() pool
  83  */
  84 #define CFG_MALLOC_LEN  (CFG_ENV_SIZE + 128*1024)
  85 #define CFG_GBL_DATA_SIZE       128     /* size in bytes reserved for initial data */
  86
  87 #define CONFIG_BAUDRATE         115200
  88
  89 #define CFG_AT91C_BRGR_DIVISOR  33      /* hardcode so no __divsi3 : AT91C_MASTER_CLOCK /(baudrate * 16) */
  90
  91 /*
  92  * Hardware drivers
  93  */
  94
  95 /* define one of these to choose the DBGU, USART0  or USART1 as console */
  96 #define CONFIG_DBGU
  97 #undef CONFIG_USART0
  98 #undef CONFIG_USART1
  99
 100 #undef  CONFIG_HWFLOW                   /* don't include RTS/CTS flow control support   */
 101
 102 #undef  CONFIG_MODEM_SUPPORT            /* disable modem initialization stuff */
 103
 104 #undef CONFIG_HARD_I2C
 105
 106 #ifdef CONFIG_HARD_I2C
 107 #define CFG_I2C_SPEED           0       /* not used */
 108 #define CFG_I2C_SLAVE           0       /* not used */
 109 #define CONFIG_RTC_RS5C372A             /* RICOH I2C RTC */
 110 #define CFG_I2C_RTC_ADDR        0x32
 111 #define CFG_I2C_EEPROM_ADDR     0x50
 112 #define CFG_I2C_EEPROM_ADDR_LEN 1
 113 #define CFG_I2C_EEPROM_ADDR_OVERFLOW
 114 #endif
 115 /* still about 20 kB free with this defined */
 116 #define CFG_LONGHELP
 117
 118 #define CONFIG_BOOTDELAY      3
 119
 120 #ifdef CONFIG_HARD_I2C
 121 #define CONFIG_COMMANDS         \
 122                        ((CONFIG_CMD_DFL | \
 123                         CFG_CMD_DATE    | \
 124                         CFG_CMD_DHCP    | \
 125                         CFG_CMD_EEPROM  | \
 126                         CFG_CMD_I2C     | \
 127                         CFG_CMD_NFS     | \
 128                         CFG_CMD_SNTP    | \
 129                         CFG_CMD_MISC))
 130 #else
 131 #define CONFIG_COMMANDS         \
 132                        ((CONFIG_CMD_DFL | \
 133                         CFG_CMD_DHCP    | \
 134                         CFG_CMD_NFS     | \
 135                         CFG_CMD_SNTP    | \
 136                         CFG_CMD_CACHE)  & \
 137                       ~(CFG_CMD_BDI | \
 138                         CFG_CMD_IMI | \
 139                         CFG_CMD_AUTOSCRIPT | \
 140                         CFG_CMD_FPGA | \
 141                         CFG_CMD_MISC | \
 142                         CFG_CMD_LOADS ))
 143 #define CONFIG_TIMESTAMP
 144 #endif
 145 #define CFG_LONGHELP
 146
 147 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
 148 #include <cmd_confdefs.h>
 149
 150 #define CONFIG_NR_DRAM_BANKS    1
 151 #define PHYS_SDRAM              0x20000000
 152 #define PHYS_SDRAM_SIZE         0x08000000      /* 128 megs */
 153
 154 #define CFG_MEMTEST_START       PHYS_SDRAM
 155 #define CFG_MEMTEST_END         CFG_MEMTEST_START + PHYS_SDRAM_SIZE - 262144
 156
 157 #define CONFIG_DRIVER_ETHER
 158 #define CONFIG_NET_RETRY_COUNT          20
 159 #undef CONFIG_AT91C_USE_RMII
 160
 161 #define PHYS_FLASH_1                    0x10000000
 162 #define PHYS_FLASH_SIZE                 0x1000000  /* 16 megs main flash */
 163 #define CFG_FLASH_BASE                  PHYS_FLASH_1
 164 #define CFG_MONITOR_BASE                CFG_FLASH_BASE
 165 #define CFG_MAX_FLASH_BANKS             1
 166 #define CFG_MAX_FLASH_SECT              256
 167 #define CFG_FLASH_ERASE_TOUT            (2 * CFG_HZ)    /* Timeout for Flash Erase */
 168 #define CFG_FLASH_WRITE_TOUT            (2 * CFG_HZ)    /* Timeout for Flash Write */
 169 #define CFG_FLASH_LOCK_TOUT             (10*CFG_HZ)     /* Timeout for Flash Set Lock Bit */
 170 #define CFG_FLASH_UNLOCK_TOUT           (10*CFG_HZ)     /* Timeout for Flash Clear Lock Bits */
 171 #define CFG_FLASH_PROTECTION                            /* "Real" (hardware) sectors protection */
 172
 173 #define CFG_ENV_IS_IN_FLASH             1
 174 #define CFG_ENV_OFFSET                  0x20000         /* after u-boot.bin */
 175 #define CFG_ENV_ADDR                    (CFG_FLASH_BASE+CFG_ENV_OFFSET)
 176 #define CFG_ENV_SIZE                    0x20000
 177
 178 #define CFG_LOAD_ADDR           0x21000000  /* default load address */
 179
 180 #define CFG_BAUDRATE_TABLE      { 115200, 57600, 38400, 19200, 9600 }
 181
 182 #define CFG_PROMPT              "=> "           /* Monitor Command Prompt */
 183 #define CFG_CBSIZE              256             /* Console I/O Buffer Size */
 184 #define CFG_MAXARGS             32              /* max number of command args */
 185 #define CFG_PBSIZE              (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
 186
 187 #ifndef __ASSEMBLY__
 188 /*-----------------------------------------------------------------------
 189  * Board specific extension for bd_info
 190  *
 191  * This structure is embedded in the global bd_info (bd_t) structure
 192  * and can be used by the board specific code (eg board/...)
 193  */
 194
 195 struct bd_info_ext {
 196         /* helper variable for board environment handling
 197          *
 198          * env_crc_valid == 0    =>   uninitialised
 199          * env_crc_valid  > 0    =>   environment crc in flash is valid
 200          * env_crc_valid  < 0    =>   environment crc in flash is invalid
 201          */
 202         int env_crc_valid;
 203 };
 204 #endif  /* __ASSEMBLY__ */
 205
 206 #define CFG_HZ 1000
 207 #define CFG_HZ_CLOCK (AT91C_MASTER_CLOCK/2)     /* AT91C_TC0_CMR is implicitly set to */
 208                                                 /* AT91C_TC_TIMER_DIV1_CLOCK */
 209
 210 #define CONFIG_STACKSIZE        (32*1024)       /* regular stack */
 211
 212 #ifdef CONFIG_USE_IRQ
 213 #error CONFIG_USE_IRQ not supported
 214 #endif
 215
 216 #define CFG_DEVICE_NULLDEV       1      /* enble null device            */
 217 #undef CONFIG_SILENT_CONSOLE            /* enable silent startup        */
 218
 219 #define CONFIG_AUTOBOOT_KEYED
 220 #define CONFIG_AUTOBOOT_PROMPT "Press SPACE to abort autoboot in %d seconds\n"
 221 #define CONFIG_AUTOBOOT_STOP_STR " "
 222 #define CONFIG_AUTOBOOT_DELAY_STR "d"
 223
 224 #define CONFIG_VERSION_VARIABLE 1       /* include version env variable */
 225
 226 #endif  /* __CONFIG_H */