include/configs/mucmc52.h

   1 /*
   2  * (C) Copyright 2008-2009
   3  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
   4  *
   5  * (C) Copyright 2003-2005
   6  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   7  *
   8  * See file CREDITS for list of people who contributed to this
   9  * project.
  10  *
  11  * This program is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU General Public License as
  13  * published by the Free Software Foundation; either version 2 of
  14  * the License, or (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  * GNU General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24  * MA 02111-1307 USA
  25  */
  26
  27 #ifndef __CONFIG_H
  28 #define __CONFIG_H
  29
  30 /*
  31  * High Level Configuration Options
  32  * (easy to change)
  33  */
  34
  35 #define CONFIG_MUCMC52          1       /* MUCMC52 board        */
  36 #define CONFIG_HOSTNAME         mucmc52
  37
  38 #include "manroland/common.h"
  39 #include "manroland/mpc5200-common.h"
  40
  41 #define CONFIG_LAST_STAGE_INIT
  42 /*
  43  * Serial console configuration
  44  */
  45 #define CONFIG_BAUDRATE         38400   /* ... at 38400 bps     */
  46
  47 #define CONFIG_CMD_PCI
  48
  49 /*
  50  * Flash configuration
  51  */
  52 #define CONFIG_SYS_MAX_FLASH_SECT       67
  53
  54 /*
  55  * Environment settings
  56  */
  57 #define CONFIG_ENV_SECT_SIZE    0x20000
  58
  59 /*
  60  * Memory map
  61  */
  62 #define CONFIG_SYS_STATUS1_BASE 0x80600200
  63 #define CONFIG_SYS_STATUS2_BASE 0x80600300
  64 #define CONFIG_SYS_PMI_UNI_BASE 0x80800000
  65 #define CONFIG_SYS_PMI_BROAD_BASE       0x80810000
  66
  67 /*
  68  * GPIO configuration
  69  */
  70 #define CONFIG_SYS_GPS_PORT_CONFIG      0x8D550644
  71
  72 #define CONFIG_SYS_MEMTEST_START        0x00100000
  73 #define CONFIG_SYS_MEMTEST_END          0x00f00000
  74
  75 #define CONFIG_SYS_LOAD_ADDR            0x100000
  76
  77 #define CONFIG_SYS_BOOTCS_CFG           0x0004FB00
  78
  79 /* 8Mbit SRAM @0x80100000 */
  80 #define CONFIG_SYS_CS1_SIZE             0x00100000
  81 #define CONFIG_SYS_CS1_CFG              0x00019B00
  82
  83 /* FRAM 32Kbyte @0x80700000 */
  84 #define CONFIG_SYS_CS2_START            0x80700000
  85 #define CONFIG_SYS_CS2_SIZE             0x00008000
  86 #define CONFIG_SYS_CS2_CFG              0x00019800
  87
  88 /* Display H1, Status Inputs, EPLD @0x80600000 */
  89 #define CONFIG_SYS_CS3_START            0x80600000
  90 #define CONFIG_SYS_CS3_SIZE             0x00100000
  91 #define CONFIG_SYS_CS3_CFG              0x00019800
  92
  93 /* PMI Unicast 32Kbyte @0x80800000 */
  94 #define CONFIG_SYS_CS6_START            CONFIG_SYS_PMI_UNI_BASE
  95 #define CONFIG_SYS_CS6_SIZE             0x00008000
  96 #define CONFIG_SYS_CS6_CFG              0xFFFFF930
  97
  98 /* PMI Broadcast 32Kbyte @0x80810000 */
  99 #define CONFIG_SYS_CS7_START            CONFIG_SYS_PMI_BROAD_BASE
 100 #define CONFIG_SYS_CS7_SIZE             0x00008000
 101 #define CONFIG_SYS_CS7_CFG              0xFF00F930
 102
 103 /*-----------------------------------------------------------------------
 104  * IDE/ATA stuff Supports IDE harddisk
 105  *-----------------------------------------------------------------------
 106  */
 107 #define CONFIG_SYS_IDE_MAXDEVICE        1       /* max. 2 drives per IDE bus    */
 108
 109 /*
 110  * PCI Mapping:
 111  * 0x40000000 - 0x4fffffff - PCI Memory
 112  * 0x50000000 - 0x50ffffff - PCI IO Space
 113  */
 114 #define CONFIG_PCI              1
 115 #define CONFIG_PCI_PNP          1
 116 #define CONFIG_PCI_SCAN_SHOW    1
 117 #define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
 118
 119 #define CONFIG_PCI_MEM_BUS      0x40000000
 120 #define CONFIG_PCI_MEM_PHYS     CONFIG_PCI_MEM_BUS
 121 #define CONFIG_PCI_MEM_SIZE     0x10000000
 122
 123 #define CONFIG_PCI_IO_BUS       0x50000000
 124 #define CONFIG_PCI_IO_PHYS      CONFIG_PCI_IO_BUS
 125 #define CONFIG_PCI_IO_SIZE      0x01000000
 126
 127 #define CONFIG_SYS_ISA_IO               CONFIG_PCI_IO_BUS
 128
 129 /*---------------------------------------------------------------------*/
 130 /* Display addresses                                                   */
 131 /*---------------------------------------------------------------------*/
 132
 133 #define CONFIG_SYS_DISP_CHR_RAM (CONFIG_SYS_DISPLAY_BASE + 0x38)
 134 #define CONFIG_SYS_DISP_CWORD           (CONFIG_SYS_DISPLAY_BASE + 0x30)
 135
 136 #endif /* __CONFIG_H */