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[thirdparty/u-boot.git] / include / configs / munices.h
1 /*
2 * (C) Copyright 2007
3 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8 #ifndef __CONFIG_H
9 #define __CONFIG_H
10 /*
11 * High Level Configuration Options
12 * (easy to change)
13 */
14 #define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */
15 #define CONFIG_MPC5200_DDR 1 /* (with DDR-SDRAM) */
16 #define CONFIG_MUNICES 1 /* ... on MUNICes board */
17
18 #ifndef CONFIG_SYS_TEXT_BASE
19 #define CONFIG_SYS_TEXT_BASE 0xFFF00000
20 #endif
21
22 #define CONFIG_SYS_MPC5XXX_CLKIN 33333333 /* ... running at 33.333333MHz */
23 #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
24 #define CONFIG_HIGH_BATS 1 /* High BATs supported */
25
26 /*
27 * Command line configuration.
28 */
29 #include <config_cmd_default.h>
30
31 #define CONFIG_CMD_ASKENV
32 #define CONFIG_CMD_ELF
33 #define CONFIG_CMD_IMMAP
34 #define CONFIG_CMD_PING
35 #define CONFIG_CMD_REGINFO
36
37 #if defined(CONFIG_CMD_KGDB)
38 # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
39 #endif
40
41 /*
42 * Serial console configuration
43 */
44 #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
45 #define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
46 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
47
48 #define CONFIG_TIMESTAMP 1 /* Print image info with timestamp */
49 #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
50 #undef CONFIG_BOOTARGS
51
52 #define CONFIG_PREBOOT "echo;" \
53 "echo Type \"run net_nfs\" to load Kernel over TFTP and to mount root filesystem over NFS;" \
54 "echo"
55
56 #define CONFIG_EXTRA_ENV_SETTINGS \
57 "netdev=eth0\0" \
58 "nfsargs=setenv bootargs root=/dev/nfs rw " \
59 "nfsroot=$(serverip):$(rootpath)\0" \
60 "ramargs=setenv bootargs root=/dev/ram rw\0" \
61 "addip=setenv bootargs $(bootargs) " \
62 "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \
63 ":$(hostname):$(netdev):off panic=5\0" \
64 "flash_nfs=run nfsargs addip;" \
65 "bootm $(kernel_addr)\0" \
66 "flash_self=run ramargs addip;" \
67 "bootm $(kernel_addr) $(ramdisk_addr)\0" \
68 "net_nfs=tftp 200000 $(bootfile);run nfsargs addip;bootm\0" \
69 "rootpath=/opt/eldk/ppc_6xx\0" \
70 "bootfile=/tftpboot/munices/u-boot.bin\0" \
71 "update=tftpboot 200000 ${bootfile};protect off fff00000 fff3ffff;" \
72 "erase fff00000 fff3ffff; cp.b 200000 FFF00000 ${filesize}\0" \
73 ""
74 #define CONFIG_BOOTCOMMAND "run net_nfs"
75
76 /*
77 * IPB Bus clocking configuration.
78 */
79 #define CONFIG_SYS_IPBSPEED_133 /* define for 133MHz speed */
80 #if defined(CONFIG_SYS_IPBSPEED_133)
81 /*
82 * PCI Bus clocking configuration
83 *
84 * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
85 * CONFIG_SYS_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't
86 * been tested with a IPB Bus Clock of 66 MHz.
87 */
88 #define CONFIG_SYS_PCISPEED_66 /* define for 66MHz speed */
89 #else
90 #undef CONFIG_SYS_PCISPEED_66 /* for 33MHz speed */
91 #endif
92
93 /*
94 * Memory map
95 */
96 #define CONFIG_SYS_MBAR 0xF0000000 /* MBAR hast to be switched by other bootloader or debugger config */
97
98 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
99 #define CONFIG_SYS_SDRAM_BASE 0x00000000
100 /* Use SRAM until RAM will be available */
101 #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
102 #define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */
103 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
104 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
105
106 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
107 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
108 # define CONFIG_SYS_RAMBOOT 1
109 #endif
110
111 #define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
112 #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
113 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
114
115 /*
116 * Flash configuration
117 */
118 #define CONFIG_SYS_FLASH_BASE 0xFF000000
119 #define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */
120 #define CONFIG_FLASH_CFI_DRIVER 1 /* Use the common driver */
121 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
122 #define CONFIG_SYS_FLASH_EMPTY_INFO
123 #define CONFIG_SYS_FLASH_SIZE 0x01000000 /* 16 MByte */
124 #define CONFIG_SYS_MAX_FLASH_SECT 128 /* max num of sects on one chip */
125 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks (= chip selects) */
126 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* not supported yet for AMD */
127
128 /*
129 * Chip selects configuration
130 */
131 /* Boot Chipselect */
132 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
133 #define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
134 #define CONFIG_SYS_BOOTCS_CFG 0x00047800
135
136 /*
137 * Environment settings
138 */
139 #define CONFIG_ENV_IS_IN_FLASH 1
140 #define CONFIG_ENV_OFFSET 0x40000
141 #define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE + CONFIG_ENV_OFFSET)
142 #define CONFIG_ENV_SECT_SIZE 0x20000
143 #define CONFIG_ENV_SIZE 0x4000
144 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE)
145 #define CONFIG_ENV_ADDR_REDUND (CONFIG_SYS_TEXT_BASE + CONFIG_ENV_OFFSET_REDUND)
146 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
147 #define CONFIG_ENV_OVERWRITE 1
148
149 /*
150 * Ethernet configuration
151 */
152 #define CONFIG_MPC5xxx_FEC 1
153 #define CONFIG_MPC5xxx_FEC_MII100
154 #define CONFIG_PHY_ADDR 0x01
155 #define CONFIG_MII 1
156
157 /*
158 * GPIO configuration
159 */
160 #define CONFIG_SYS_GPS_PORT_CONFIG 0x00058044 /* PSC1=UART, PSC2=UART ; Ether=100MBit with MD
161 no PCI */
162
163 /*
164 * Miscellaneous configurable options
165 */
166 #define CONFIG_SYS_LONGHELP /* undef to save memory */
167 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
168 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
169 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
170 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
171
172 #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
173 #define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
174
175 #define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */
176
177 #define CONFIG_DISPLAY_BOARDINFO 1
178 #define CONFIG_CMDLINE_EDITING 1
179
180 /*
181 * Various low-level settings
182 */
183 #define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
184 #define CONFIG_SYS_HID0_FINAL HID0_ICE
185
186 #define CONFIG_SYS_CS_BURST 0x00000000
187 #define CONFIG_SYS_CS_DEADCYCLE 0x33333333
188 #define CONFIG_SYS_RESET_ADDRESS 0xff000000
189
190 /* pass open firmware flat tree */
191 #define CONFIG_OF_LIBFDT 1
192 #define CONFIG_OF_BOARD_SETUP 1
193
194 #define OF_CPU "PowerPC,5200@0"
195 #define OF_TBCLK (bd->bi_busfreq / 4)
196 #define OF_SOC "soc5200@f0000000"
197 #define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
198
199 #endif /* __CONFIG_H */